:85( 53hisilicon,hi3798cv200-poplarhisilicon,hi3798cv200 +#7HiSilicon Poplar Development Boardpsci arm,psci-0.2=smccpus+cpu@0arm,cortex-a53DcpuPTpscibo@@cpu@1arm,cortex-a53DcpuPTpscibo@@cpu@2arm,cortex-a53DcpuPTpscibo@@cpu@3arm,cortex-a53DcpuPTpscibo@@l2-cachecachedq@interrupt-controller@f1001000 arm,gic-400@P @ `    timerarm,armv8-timer0   soc@f0000000 simple-bus+clock-reset-controller@8a22000,hisilicon,hi3798cv200-crgsysconsimple-mfdP %2reset-controllerti,syscon-reset28?   system-controller@8000000%hisilicon,hi3798cv200-sysctrlsysconP%2peripheral-controller@8a200001hisilicon,hi3798cv200-perictrlsysconsimple-mfdP+ usb2_phy@120hisilicon,hi3798cv200-usb2-phyP M( T+phy@0P[ Tphy@1P[ T usb2_phy@124hisilicon,hi3798cv200-usb2-phyP$M) T+phy@0P[ T phy@850hisilicon,hi3798cv200-combphyPP[M* Tf*vphy@858hisilicon,hi3798cv200-combphyPX[M! T f!v  pinconf@8a21000pinconf-singleP   VW"%&).6@GHNOPFX gpio-rangeemmc-pins-1H1 $E b}emmc-pins-21(E b}emmc-pins-31,E b}00 emmc-pins-410E b}00 serial@8b00000arm,pl011arm,primecellP 1Muartclkapb_pclkokayserial@8b02000arm,pl011arm,primecellP  3Muartclkapb_pclkokay LS-UART0i2c@8b10000hisilicon,hix5hd2-i2cP+ &MokayLS-I2C0i2c@8b11000hisilicon,hix5hd2-i2cP+ 'M disabledi2c@8b12000hisilicon,hix5hd2-i2cP + (MokayLS-I2C1i2c@8b13000hisilicon,hix5hd2-i2cP0+ )M  disabledi2c@8b14000hisilicon,hix5hd2-i2cP@+ *M  disabledspi@8b1a000arm,pl022arm,primecellP - M  sspclkapb_pclk+okayLS-SPI0mmc@9820000 snps,dw-mshcP  "Mbiuciu Tresetokaymmc@9830000hisilicon,hi3798cv200-dw-mshcP  # Mciubiuciu-sampleciu-drive Tresetokaydefault" , 7IVegpio@8b20000arm,pl061arm,primecellP ls  M apb_pclk disabledgpio@8b21000arm,pl061arm,primecellP ms P       M apb_pclkokayGPIO-EGPIO-FGPIO-Jgpio@8b22000arm,pl061arm,primecellP  ns    M apb_pclkokay&GPIO-HGPIO-IGPIO-LGPIO-GGPIO-Kgpio@8b23000arm,pl061arm,primecellP0 os @   V WM apb_pclkokayGPIO-CGPIO-Bgpio@8b24000arm,pl061arm,primecellP@ ps 0  " %M apb_pclkokayGPIO-Dgpio@8004000arm,pl061arm,primecellP@ qs M apb_pclkokay"USER-LED-1USER-LED-2GPIO-Agpio@8b26000arm,pl061arm,primecellP` rs   & )M apb_pclkokayUSER-LED-0gpio@8b27000arm,pl061arm,primecellPp ss  .M apb_pclk disabledgpio@8b28000arm,pl061arm,primecellP ts  6M apb_pclk disabledgpio@8b29000arm,pl061arm,primecellP us  @ GM apb_pclk disabledgpio@8b2a000arm,pl061arm,primecellP vs 0 H N OM apb_pclkokayUSER-LED-3gpio@8b2b000arm,pl061arm,primecellP ws   P FM apb_pclk disabledgpio@8b2c000arm,pl061arm,primecellP xs  XM apb_pclk disabledethernet@98400002hisilicon,hi3798cv200-gmachisilicon,hisi-gmac-v2P  0  GMmac_coremac_ifc T mac_coremac_ifcphy disabledethernet@98410002hisilicon,hi3798cv200-gmachisilicon,hisi-gmac-v2P  0 HM mac_coremac_ifc T  mac_coremac_ifcphyokay+ rgmii ''u0phy@3P ir@8001000hisilicon,hix5hd2-irP /Mokayrc-hisi-poplarpcie@9860000hisilicon,hi3798cv200-pcieP  controlrc-dbiconfig+Dpci0  msi 0 Mauxpipesysbus$T softsysbus>Cphyokay MYusb@9880000 generic-ohciP  CM"%&busclk12clk48 T bus>Cusbokayusb@9890000 generic-ehciP  BM"#$ busphyutmi$T   busphyutmi>Cusbokayaliasesf/soc@f0000000/serial@8b00000n/soc@f0000000/serial@8b02000chosenvserial0:115200n8memory@0DmemoryPleds gpio-ledsuser-led0 green:user1  heartbeatoffuser-led1 green:user2 mmc0offuser-led2 green:user3 mmc1offuser-led3 green:user4 noneoffregulator-pcieregulator-fixed 3V3_PCIE02Z2Z  compatibleinterrupt-parent#address-cells#size-cellsmodelmethoddevice_typeregenable-methodd-cache-sized-cache-line-sized-cache-setsi-cache-sizei-cache-line-sizei-cache-setsnext-level-cachecache-unifiedcache-levelphandleinterrupts#interrupt-cellsinterrupt-controllerranges#clock-cells#reset-cellsti,reset-bitsclocksresets#phy-cellsassigned-clocksassigned-clock-rateshisilicon,fixed-modehisilicon,mode-select-bitspinctrl-single,register-widthpinctrl-single,function-maskpinctrl-single,gpio-range#pinctrl-single,gpio-range-cellspinctrl-single,pinspinctrl-single,bias-pulldownpinctrl-single,bias-pulluppinctrl-single,slew-ratepinctrl-single,drive-strengthclock-namesstatuslabelclock-frequencynum-cscs-gpiosreset-namesbus-widthcap-sd-highspeedpinctrl-namespinctrl-0fifo-depthcap-mmc-highspeedmmc-ddr-1_8vmmc-hs200-1_8vnon-removablegpio-controller#gpio-cellsgpio-rangesgpio-line-namesphy-handlephy-modehisilicon,phy-reset-delays-uslinux,rc-map-namereg-namesbus-rangenum-lanesinterrupt-namesinterrupt-map-maskinterrupt-mapphysphy-namesreset-gpiosvpcie-supplyserial0serial2stdout-pathlinux,default-triggerdefault-statepanic-indicatorregulator-nameregulator-min-microvoltregulator-max-microvoltgpioenable-active-high