8(  ,Qualcomm SA8540P Ride2qcom,sa8540p-rideqcom,sa8540pclocksxo-board-clk 2fixed-clock=JIZsleep-clk 2fixed-clock=JZ4cpus cpu@0bcpu2arm,cortex-a78cnrypsci%psci Zl2-cache2cache(4Zl3-cache2cache(4Zcpu@100bcpu2arm,cortex-a78cnrypsci% psci Zl2-cache2cache(4Zcpu@200bcpu2arm,cortex-a78cnrypsci%  psci Zl2-cache2cache(4Z cpu@300bcpu2arm,cortex-a78cnrypsci%  psci Zl2-cache2cache(4Z cpu@400bcpu2arm,cortex-x1cnrypsciNpsci Zl2-cache2cache(4Zcpu@500bcpu2arm,cortex-x1cnrypsciNpsci Zl2-cache2cache(4Zcpu@600bcpu2arm,cortex-x1cnrypsciNpsci Zl2-cache2cache(4Zcpu@700bcpu2arm,cortex-x1cnrypsciNpsci Zl2-cache2cache(4Zcpu-mapcluster0core0Bcore1Bcore2Bcore3Bcore4Bcore5Bcore6Bcore7Bidle-statesFpscicpu-sleep-0-02arm,idle-stateSlittle-rail-power-collapsec@zc^Z&cpu-sleep-1-02arm,idle-stateSbig-rail-power-collapsec@zZ'domain-idle-statescluster-sleep-02domain-idle-statecADz 'Z(firmwarescm2qcom,scm-sc8280xpqcom,scm  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B`opp-table-qup100mhz2operating-points-v2ZAopp-75000000xh#opp-100000000$pmu2arm,armv8-pmuv3 psci 2arm,psci-1.0smcpower-domain-cpu0*%>&Zpower-domain-cpu1*%>&Z power-domain-cpu2*%>&Z power-domain-cpu3*%>&Z power-domain-cpu4*%>'Zpower-domain-cpu5*%>'Zpower-domain-cpu6*%>'Zpower-domain-cpu7*%>'Zpower-domain-cpu-cluster0*>(Z%reserved-memory Qreserved-region@80000000nXcmd-db-region@80860000 2qcom,cmd-dbnXreserved-region@80880000nXsmem-region@80900000 2qcom,smemn X_)reserved-region@80b00000nXreserved-region@83b00000npXreserved-region@85b00000nXadsp-region@86c00000nXZ_cdsp0-region@8a100000nXZcdsp1-region@8c600000n`XZreserved-region@aeb00000n`Xsmp2p-adsp 2qcom,smp2pgq* *master-kernelmaster-kernelZaslave-kernel slave-kernelZ^smp2p-nsp0 2qcom,smp2pg^q* *master-kernelmaster-kernelZslave-kernel slave-kernelZsmp2p-nsp1 2qcom,smp2pgihq* * master-kernelmaster-kernelZslave-kernel slave-kernelZsoc@0 2simple-bus Qethernet@200002qcom,sc8280xp-ethqos n`stmmacethrgmii r+3+8+4+6 stmmacethpclkptp_refrgmiimacirqeth_lpi ),+ 09 BP^okaye-x./ rgmii-txiddefault0mdio2snps,dwmac-mdio phy@82ethernet-phy-id0141.0dd4n q1 2*p bethernet-phy Z/rx-queues-configZ-queue0':R`queue1':nqueue2}:queue3}:` tx-queues-configZ.queue0'queue1'queue2}queue3}clock-controller@1000002qcom,gcc-sc8280xpn=*r3456789:;<Z+mailbox@4080002qcom,sc8280xp-ipccqcom,ipccn@ Z*efuse@784000!2qcom,sc8280xp-qfpromqcom,qfpromnx@0 gpu-speed-bin@18bn!geniqup@8c00002qcom,geni-se-qupn r++  m-ahbs-ahb ), Q^okayi2c@8800002qcom,geni-i2cn@ r+ se u<H ==>?.@ &qup-corequp-configqup-memory ^disabledspi@8800002qcom,geni-spin@ r+ se u<H ==>?.@ &qup-corequp-configqup-memory ^disabledi2c@8840002qcom,geni-i2cn@@ r+ se G<H ==>?.@ &qup-corequp-configqup-memory ^disabledspi@8840002qcom,geni-spin@@ r+ se G<H ==>?.@ &qup-corequp-configqup-memory ^disabledserial@8840002qcom,geni-debug-uartn@@r+ se GA<0 ==>?.&qup-corequp-config^okayi2c@8880002qcom,geni-i2cn@ r+ se H<H ==>?.@ &qup-corequp-configqup-memory^okaydefaultBspi@8880002qcom,geni-spin@ r+ se H<H ==>?.@ &qup-corequp-configqup-memory ^disabledi2c@88c0002qcom,geni-i2cn@ r+ se I<H ==>?.@ &qup-corequp-configqup-memory ^disabledspi@88c0002qcom,geni-spin@ r+ se I<H ==>?.@ &qup-corequp-configqup-memory ^disabledi2c@8900002qcom,geni-i2cn@ r+ se J<H ==>?.@ &qup-corequp-configqup-memory ^disabledspi@8900002qcom,geni-spin@ r+ se J<H ==>?.@ &qup-corequp-configqup-memory ^disabledi2c@8940002qcom,geni-i2cn@@ ser+ K <H ==>?.@ &qup-corequp-configqup-memory ^disabledspi@8940002qcom,geni-spin@@ r+ se K<H ==>?.@ &qup-corequp-configqup-memory ^disabledi2c@8980002qcom,geni-i2cn@  ser+ A<H ==>?.@ &qup-corequp-configqup-memory ^disabledspi@8980002qcom,geni-spin@ r+ se A<H ==>?.@ &qup-corequp-configqup-memory ^disabledi2c@89c0002qcom,geni-i2cn@  ser+ B<H ==>?.@ &qup-corequp-configqup-memory ^disabledspi@89c0002qcom,geni-spin@ r+ se B<H ==>?.@ &qup-corequp-configqup-memory ^disabledgeniqup@9c00002qcom,geni-se-qupn`r++  m-ahbs-ahb ),c Q^okayi2c@9800002qcom,geni-i2cn@  ser+ Y<H ==>?,@ &qup-corequp-configqup-memory^okaydefaultCspi@9800002qcom,geni-spin@ r+ se Y<H ==>?,@ &qup-corequp-configqup-memory ^disabledi2c@9840002qcom,geni-i2cn@@  ser+ Z<H ==>?,@ &qup-corequp-configqup-memory^okaydefaultDspi@9840002qcom,geni-spin@@ r+ se Z<H ==>?,@ &qup-corequp-configqup-memory ^disabledi2c@9880002qcom,geni-i2cn@  ser+ [<H ==>?,@ &qup-corequp-configqup-memory ^disabledspi@9880002qcom,geni-spin@ r+ se [<H ==>?,@ &qup-corequp-configqup-memory ^disabledserial@9880002qcom,geni-uartn@r+ se [A<0 ==>?,&qup-corequp-config ^disabledi2c@98c0002qcom,geni-i2cn@  ser+ \<H ==>?,@ &qup-corequp-configqup-memory ^disabledspi@98c0002qcom,geni-spin@ r+ se \<H ==>?,@ &qup-corequp-configqup-memory ^disabledi2c@9900002qcom,geni-i2cn@ ser+ ] <H ==>?,@ &qup-corequp-configqup-memory ^disabledspi@9900002qcom,geni-spin@ r+ se ]<H ==>?,@ &qup-corequp-configqup-memory ^disabledi2c@9940002qcom,geni-i2cn@@  ser+ ^<H ==>?,@ &qup-corequp-configqup-memory ^disabledspi@9940002qcom,geni-spin@@ r+ se ^<H ==>?,@ &qup-corequp-configqup-memory ^disabledi2c@9980002qcom,geni-i2cn@  ser+ _<H ==>?,@ &qup-corequp-configqup-memory ^disabledspi@9980002qcom,geni-spin@ r+ se _<H ==>?,@ &qup-corequp-configqup-memory ^disabledi2c@99c0002qcom,geni-i2cn@  ser+ `<H ==>?,@ &qup-corequp-configqup-memory ^disabledspi@99c0002qcom,geni-spin@ r+ se `<H ==>?,@ &qup-corequp-configqup-memory ^disabledgeniqup@ac00002qcom,geni-se-qupn`r++  m-ahbs-ahb ), Q^okayi2c@a800002qcom,geni-i2cn@ r+ se a<H ==>?-@ &qup-corequp-configqup-memory ^disabledspi@a800002qcom,geni-spin@ r+ se a<H ==>?-@ &qup-corequp-configqup-memory ^disabledi2c@a840002qcom,geni-i2cn@@ r+ se b<H ==>?-@ &qup-corequp-configqup-memory ^disabledspi@a840002qcom,geni-spin@@ r+ se b<H ==>?-@ &qup-corequp-configqup-memory ^disabledi2c@a880002qcom,geni-i2cn@ r+ se c<H ==>?-@ &qup-corequp-configqup-memory ^disabledspi@a880002qcom,geni-spin@ r+ se c<H ==>?-@ &qup-corequp-configqup-memory ^disabledi2c@a8c0002qcom,geni-i2cn@ r+ se d<H ==>?-@ &qup-corequp-configqup-memory ^disabledspi@a8c0002qcom,geni-spin@ r+ se d<H ==>?-@ &qup-corequp-configqup-memory ^disabledi2c@a900002qcom,geni-i2cn@ r+ se e<H ==>?-@ &qup-corequp-configqup-memory^okaydefaultEspi@a900002qcom,geni-spin@ r+ se e<H ==>?-@ &qup-corequp-configqup-memory ^disabledi2c@a940002qcom,geni-i2cn@@ r+ se f<H ==>?-@ &qup-corequp-configqup-memory ^disabledspi@a940002qcom,geni-spin@@ r+ se f<H ==>?-@ &qup-corequp-configqup-memory ^disabledi2c@a980002qcom,geni-i2cn@ r+ se C<H ==>?-@ &qup-corequp-configqup-memory ^disabledspi@a980002qcom,geni-spin@ r+ se C<H ==>?-@ &qup-corequp-configqup-memory ^disabledi2c@a9c0002qcom,geni-i2cn@ r+ se D<H ==>?-@ &qup-corequp-configqup-memory^okaydefaultFspi@a9c0002qcom,geni-spin@ r+ se D<H ==>?-@ &qup-corequp-configqup-memory ^disabledrng@10d3000 2qcom,prng-een 0r3 corepcie@1c00000bpci2qcom,pcie-sa8540p`n000 000parfdbielbiatuconfigmhi 8Q0 00009CPakG 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ifacefswr_audio_cgcrWSAs??    >&K  ^disabledclock-controller@32a90002qcom,sc8280xp-lpassaudioccn*=Zfsoundwire@33300002qcom,soundwire-v1.6.0n3  corewakeuprj ifacekswr_audio_cgcrTXK s >& ^disabledcodec@33700002qcom,sc8280xp-lpass-va-macron70rb9bfbgb: mclkmacrodcodecnpl b9$=fsgenK ^disabledZcpinctrl@33c0000 2qcom,sc8280xp-lpass-lpi-pinctrl n<U[kwlrbfbg  coreaudio ^disabledZltx-swr-default-stateZgclk-pinsgpio0 swr_tx_clkdata-pins gpio1gpio2 swr_tx_datarx-swr-default-stateZdclk-pinsgpio3 swr_rx_clkdata-pins gpio4gpio5 swr_rx_datadmic01-default-stateclk-pinsgpio6 dmic1_clkdata-pinsgpio7 dmic1_datadmic01-sleep-stateclk-pinsgpio6 dmic1_clkdata-pinsgpio7 dmic1_datadmic23-default-stateclk-pinsgpio8 dmic2_clkdata-pinsgpio9 dmic2_datadmic23-sleep-stateclk-pinsgpio8 dmic2_clkdata-pinsgpio9 dmic2_datawsa-swr-default-stateZhclk-pinsgpio10 wsa_swr_clkdata-pinsgpio11 wsa_swr_datawsa2-swr-default-stateclk-pinsgpio15 wsa2_swr_clkdata-pinsgpio16wsa2_swr_dataclock-controller@33e00002qcom,sc8280xp-lpassccn> =Zkmmc@8804000&2qcom,sc8280xp-sdhciqcom,sdhci-msm-v5n@hc_irqpwr_irqr++3 ifacecorexo+.0  >?/&sdhc-ddrcpu-sdhc ),<mC ^disabledopp-table2operating-points-v2Zmopp-100000000#w@ opp-202000000 FnRej  @phy@88eb0002qcom,sc8280xp-qmp-usb43dp-phyn@ r+=+`+?+@ auxrefcom_auxusb3_pipe+ +9+F phycommon=^okay$K4ZZ5ports port@0nendpointport@2nendpointphy@890200022qcom,sc8280xp-usb-hs-phyqcom,usb-snps-hs-5nm-phyn r3 ref+- ^disabledZzphy@89030002qcom,sc8280xp-qmp-usb43dp-phyn0@ r+B+^+D+E auxrefcom_auxusb3_pipe+ +:+B phycommon= ^disabledZ6ports port@0nendpointport@2nendpointphy@8909a002qcom,sc8280xp-dp-phy@nroo  auxcfg_ahb< = ^disabledZphy@890ca002qcom,sc8280xp-dp-phy@nroo  auxcfg_ahb< = ^disabledZpmu@909100002qcom,sc8280xp-llcc-bwmonqcom,sc7280-llcc-bwmonn  Q  popp-table2operating-points-v2Zpopp-0 opp-1>opp-2popp-3'opp-4,hopp-5;0Xopp-6N(opp-7Zopp-8ci8opp-9yopp-10|%@opp-11Aopp-12pmu@90b6400*2qcom,sc8280xp-cpu-bwmonqcom,sdm845-bwmonn d E >>qopp-table2operating-points-v2Zqopp-0"opp-1Eopp-2l}popp-3opp-4opp-59`opp-6ёsystem-cache-controller@92000002qcom,sc8280xp-llccn  ( 0 8 @ H P X `lllcc0_basellcc1_basellcc2_basellcc3_basellcc4_basellcc5_basellcc6_basellcc7_basellcc_broadcast_base Fusb@a4f8800 2qcom,sc8280xp-dwc3-mpqcom,dwc3n O QHr++ + +%+"++++R cfg_noccoreifacesleepmock_utminoc_aggrnoc_aggr_northnoc_aggr_southnoc_sys+"+ $ qYX\[rr~rrrrrrrrpwr_event_1pwr_event_2pwr_event_3pwr_event_4hs_phy_1hs_phy_2hs_phy_3hs_phy_4dp_hs_phy_1dm_hs_phy_1dp_hs_phy_2dm_hs_phy_2dp_hs_phy_3dm_hs_phy_3dp_hs_phy_4dm_hs_phy_4ss_phy_1ss_phy_2+ H+40 @ >?;&usb-ddrapps-usb  ^disabledusb@a400000 2snps,dwc3n @  ),stuvwx*usb2-0usb3-0usb2-1usb3-1usb2-2usb2-3 hostusb@a6f88002qcom,sc8280xp-dwc3qcom,dwc3n o QHr+ +&++++(++++R cfg_noccoreifacesleepmock_utminoc_aggrnoc_aggr_northnoc_aggr_southnoc_sys+(+&$ Dq$%rrr<pwr_evenths_phy_irqdp_hs_phy_irqdm_hs_phy_irqss_phy_irq+ H+50 @ >?9&usb-ddrapps-usb ^okayusb@a600000 2snps,dwc3n ` # ),  y5usb2-phyusb3-phy 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busnrt_busifacelutcorevsync<oK$ports port@0nendpoint /Zport@4nendpoint /Zport@5nendpoint /Zport@6nendpoint /Zopp-table2operating-points-v2Zopp-200000000 #opp-300000000$opp-375000000Z nopp-500000000eHopp-600000000#Fdisplayport-controller@220900002qcom,sc8280xp-dpPn" " " " " (rooooo; core_ifacecore_auxctrl_linkctrl_link_ifacestream_pixel dp<oo ?K ^disabledports port@0nendpoint /Zport@1nopp-table2operating-points-v2Zopp-160000000 h#opp-270000000߀$opp-540000000 /nopp-8100000000GHdisplayport-controller@220980002qcom,sc8280xp-dpPn" " " " " (rooooo ; core_ifacecore_auxctrl_linkctrl_link_ifacestream_pixel dp<oo! ?K ^disabledports port@0nendpoint /Zport@1nopp-table2operating-points-v2Zopp-160000000 h#opp-270000000߀$opp-540000000 /nopp-8100000000GHdisplayport-controller@2209a0002qcom,sc8280xp-dpPn" " " " " (roo%o'o*o+; core_ifacecore_auxctrl_linkctrl_link_ifacestream_pixeldp<o(o, ?K ^disabledports port@0nendpoint /Zport@1nopp-table2operating-points-v2Zopp-160000000 h#opp-270000000߀$opp-540000000 /nopp-8100000000GHdisplayport-controller@220a00002qcom,sc8280xp-dpPn" " " " " (roo/o1o4o5; core_ifacecore_auxctrl_linkctrl_link_ifacestream_pixeldp<o2o6 ?K ^disabledports port@0nendpoint /Zport@1nopp-table2operating-points-v2Zopp-160000000 h#opp-270000000߀$opp-540000000 /nopp-8100000000GHphy@220c2a002qcom,sc8280xp-dp-phy@n" *" "" &" ro%o  auxcfg_ahb< = ^disabledZphy@220c5a002qcom,sc8280xp-dp-phy@n" Z" R" V" Pro/o  auxcfg_ahb< = ^disabledZclock-controller@221000002qcom,sc8280xp-dispcc1n"dr+-3<=* ^disabledZoethernet@230000002qcom,sc8280xp-ethqos n##`stmmacethrgmii r+9+>+:+< stmmacethpclkptp_refrgmiimacirqeth_lpi ),@+ 09 BP^okayex rgmii-txiddefaultfixed-link rx-queues-configZqueue0':R`queue1':nqueue2}:queue3}:` tx-queues-configZqueue0'queue1'queue2}queue3}soundthermal-zonescpu0-thermal  -tripscpu-crit = I icriticalcpu1-thermal  -tripscpu-crit = I icriticalcpu2-thermal  -tripscpu-crit = I icriticalcpu3-thermal  -tripscpu-crit = I icriticalcpu4-thermal  -tripscpu-crit = I icriticalcpu5-thermal  -tripscpu-crit = I icriticalcpu6-thermal  -tripscpu-crit = I icriticalcpu7-thermal  -tripscpu-crit = I icriticalcluster0-thermal  - tripscpu-crit = I icriticalgpu-thermal  -cooling-mapsmap0 T Ytripstrip-point0 =L IipassiveZtrip-point1 = I icriticalmem-thermal  -tripstrip-point0 =_ Iihottimer2arm,armv8-timer0   aliases! h/soc@0/geniqup@9c0000/i2c@980000! m/soc@0/geniqup@9c0000/i2c@984000! r/soc@0/geniqup@ac0000/i2c@a90000! x/soc@0/geniqup@ac0000/i2c@a9c000! ~/soc@0/geniqup@8c0000/i2c@888000$ /soc@0/geniqup@8c0000/serial@884000chosen serial0:115200n8 interrupt-parent#address-cells#size-cellsmodelcompatible#clock-cellsclock-frequencyphandledevice_typeregclocksenable-methodcapacity-dmips-mhzdynamic-power-coefficientnext-level-cachepower-domainspower-domain-namesqcom,freq-domainoperating-points-v2interconnects#cooling-cellscache-levelcache-unifiedcpuentry-methodidle-state-namearm,psci-suspend-paramentry-latency-usexit-latency-usmin-residency-uslocal-timer-stopqcom,dload-mode#interconnect-cellsqcom,bcm-votersopp-sharedopp-hzopp-peak-kBpsrequired-oppsinterrupts#power-domain-cellsdomain-idle-statesrangesno-maphwlocksqcom,smeminterrupts-extendedmboxesqcom,local-pidqcom,remote-pidqcom,entry-name#qcom,smem-state-cellsinterrupt-controller#interrupt-cellsdma-rangesreg-namesclock-namesinterrupt-namesiommussnps,tsosnps,pblrx-fifo-depthtx-fifo-depthstatussnps,mtl-rx-configsnps,mtl-tx-configmax-speedphy-handlephy-modepinctrl-namespinctrl-0reset-gpiosreset-assert-usreset-deassert-usmarvell,reg-initsnps,rx-queues-to-usesnps,rx-sched-spsnps,dcb-algorithmsnps,map-to-dma-channelsnps,route-upsnps,prioritysnps,route-ptpsnps,avb-algorithmsnps,route-avcpsnps,tx-queues-to-usesnps,tx-sched-spsnps,send_slopesnps,idle_slopesnps,high_creditsnps,low_credit#reset-cells#mbox-cellsbitsinterconnect-namesbus-rangedma-coherentlinux,pci-domainnum-lanesmsi-mapinterrupt-map-maskinterrupt-mapassigned-clocksassigned-clock-ratesresetsreset-namesphysphy-namesclock-output-names#phy-cellsperst-gpioswake-gpiosqcom,4ln-config-selvdda-phy-supplyvdda-pll-supplylanes-per-directionfreq-table-hzvcc-supplyvccq-supply#hwlock-cellsqcom,gmuopp-level#iommu-cells#global-interruptsvdda18-supplyvdda33-supplymemory-regionqcom,qmpqcom,smem-statesqcom,smem-state-nameslabelqcom,glink-channelsqcom,domainqcom,intents#sound-dai-cellsqcom,protection-domainqcom,din-portsqcom,dout-portsqcom,ports-sinterval-lowqcom,ports-offset1qcom,ports-offset2qcom,ports-hstartqcom,ports-hstopqcom,ports-word-lengthqcom,ports-block-pack-modeqcom,ports-lane-controlqcom,ports-block-group-countgpio-controller#gpio-cellsgpio-rangespinsfunctiondrive-strengthslew-ratebias-disablebias-bus-holdoutput-highinput-enableoutput-lowbias-pull-downbus-widthopp-avg-kBpswakeup-sourcedr_modepinctrl-1remote-endpointassigned-clock-parentsqcom,pdc-ranges#qcom,sensors#thermal-sensor-cellsqcom,eeqcom,channelnvmem-cellsnvmem-cell-nameswakeup-parentbias-pull-up#redistributor-regionsredistributor-stridemsi-controller#msi-cellsframe-numberqcom,tcs-offsetqcom,drv-idqcom,tcs-configqcom,pmic-idregulator-nameregulator-min-microvoltregulator-max-microvoltregulator-initial-moderegulator-allowed-modesregulator-allow-set-load#freq-domain-cellsfirmware-namefull-duplexpolling-delay-passivethermal-sensorstemperaturehysteresistripcooling-devicei2c0i2c1i2c12i2c15i2c18serial0stdout-path