8<( 2friendlyarm,nanopi-r4s-enterpriserockchip,rk3399 ++7FriendlyElec NanoPi R4S Enterprise Editionaliases=/pinctrl/gpio@ff720000C/pinctrl/gpio@ff730000I/pinctrl/gpio@ff780000O/pinctrl/gpio@ff788000U/pinctrl/gpio@ff790000[/i2c@ff3c0000`/i2c@ff110000e/i2c@ff120000j/i2c@ff130000o/i2c@ff3d0000t/i2c@ff140000y/i2c@ff150000~/i2c@ff160000/i2c@ff3e0000/serial@ff180000/serial@ff190000/serial@ff1a0000/serial@ff1b0000/serial@ff370000/spi@ff1c0000/spi@ff1d0000/spi@ff1e0000/spi@ff350000/spi@ff1f0000/spi@ff200000/ethernet@fe300000/mmc@fe310000/mmc@fe320000/mmc@fe330000cpus+cpu-mapcluster0core0core1core2core3cluster1core0core1cpu@0cpuarm,cortex-a53psci #2dL \i@{@   cpu@1cpuarm,cortex-a53psci #2dL \i@{@   cpu@2cpuarm,cortex-a53psci #2dL \i@{@   cpu@3cpuarm,cortex-a53psci #2dL \i@{@   cpu@100cpuarm,cortex-a72psci  #2L \i@{@thermal-idle#'cpu@101cpuarm,cortex-a72psci  #2L \i@{@thermal-idle#'l2-cache-cluster0cache^k@} l2-cache-cluster1cache^k@}idle-states"pscicpu-sleeparm,idle-state/@Wxh cluster-sleeparm,idle-state/@Wh memory-controllerrockchip,rk3399-dmcydmc_clk disabledpmu_a53arm,cortex-a53-pmupmu_a72arm,cortex-a72-pmupsci arm,psci-1.0smctimerarm,armv8-timer@   xin24m fixed-clockn6xin24mpcie@f8000000rockchip,rk3399-pcie axi-baseapb-basepci+! Gaclkaclk-perfhclkpm0123+syslegacyclient;`N\k s,xpcie-phy-0pcie-phy-1pcie-phy-2pcie-phy-388(coremgmtmgmt-stickypipepmpclkaclkokayinterrupt-controllerpcie-ep@f8000000rockchip,rk3399-pcie-ep apb-basemem-base Gaclkaclk-perfhclkpm8(coremgmtmgmt-stickypipepmpclkaclk s,xpcie-phy-0pcie-phy-1pcie-phy-2pcie-phy-3 default% disabledethernet@fe300000rockchip,rk3399-gmac0 +macirq8ighfjfMstmmacethmac_clk_rxmac_clk_txclk_mac_refclk_mac_refoutaclk_macpclk_mac/ stmmaceth=JokayUl|inputdefault % !"rgmii#($ mac-addressmdiosnps,dwmac-mdio+ethernet-phy@1 % 'u0 %"mmc@fe3100000rockchip,rk3399-dw-mshcrockchip,rk3288-dw-mshc1@@р Mbiuciuciu-driveciu-sample/yreset disabled(9F\&gdefault %'()ummc@fe3200000rockchip,rk3399-dw-mshcrockchip,rk3288-dw-mshc2@Aрl  Lbiuciuciu-driveciu-sample/zresetokay( *default%+,-.u/0mmc@fe330000+rockchip,rk3399-sdhci-5.1arasan,sdhci-5.13 lN Nclk_xinclk_ahbemmc_cardclocks1 xphy_arasan/ disabledgusb@fe380000 generic-ehci82s3xusbokayusb@fe3a0000 generic-ohci:2s3xusbokayusb@fe3c0000 generic-ehci<4s5xusbokayusb@fe3e0000 generic-ohci> 4s5xusbokaydebug@fe430000&arm,coresight-cpu-debugarm,primecellCM apb_pclkdebug@fe432000&arm,coresight-cpu-debugarm,primecellC M apb_pclkdebug@fe434000&arm,coresight-cpu-debugarm,primecellC@M apb_pclkdebug@fe436000&arm,coresight-cpu-debugarm,primecellC`M apb_pclkdebug@fe610000&arm,coresight-cpu-debugarm,primecellaL apb_pclkdebug@fe710000&arm,coresight-cpu-debugarm,primecellqL apb_pclkusb@fe800000rockchip,rk3399-dwc3+0Gref_clksuspend_clkbus_clkaclk_usb3_rksoc_axi_perfaclk_usb3grf_clk% usb3-otgokayusb@fe800000 snps,dwc3irefbus_earlysuspend hosts67xusb2-phyusb3-phy utmi_wide6Wp/okayusb@fe900000rockchip,rk3399-dwc3+0Gref_clksuspend_clkbus_clkaclk_usb3_rksoc_axi_perfaclk_usb3grf_clk& usb3-otgokayusb@fe900000 snps,dwc3nrefbus_earlysuspend hosts89xusb2-phyusb3-phy utmi_wide6Wp/okaydp@fec00000rockchip,rk3399-cdn-dp lr  ruocore-clkpclkspdifgrfs:;/ HJspdifdptxapbcore= disabledportsport+endpoint@0<endpoint@1=interrupt-controller@fee00000 arm,gic-v3+P  msi-controller@fee20000arm,gic-v3-itsppi-partitionsinterrupt-partition-0interrupt-partition-1saradc@ff100000rockchip,rk3399-saradc>Pesaradcapb_pclk saradc-apbokay crypto@ff8b0000rockchip,rk3399-crypto@hclk_masterhclk_slavesclkmasterslavecrypto-rstcrypto@ff8b8000rockchip,rk3399-crypto@hclk_masterhclk_slavesclkmasterslavecrypto-rsti2c@ff110000rockchip,rk3399-i2clA AU i2cpclk;default%>+okay @,i2c@ff120000rockchip,rk3399-i2clB BV i2cpclk#default%?+okayeeprom@51microchip,24c02atmel,24c02QDd+mac-address@fa$i2c@ff130000rockchip,rk3399-i2clC CW i2cpclk"default%@+ disabledi2c@ff140000rockchip,rk3399-i2clD DX i2cpclk&default%A+ disabledi2c@ff150000rockchip,rk3399-i2clE EY i2cpclk%default%B+ disabledi2c@ff160000rockchip,rk3399-i2clF FZ i2cpclk$default%C+okayserial@ff180000&rockchip,rk3399-uartsnps,dw-apb-uartQ`baudclkapb_pclkcMWdefault %DEF disabledbluetoothbrcm,bcm43438-btGlpo dH x* * = default %IJKLserial@ff190000&rockchip,rk3399-uartsnps,dw-apb-uartRabaudclkapb_pclkbMWdefault%M disabledserial@ff1a0000&rockchip,rk3399-uartsnps,dw-apb-uartSbbaudclkapb_pclkdMWdefault%Nokayserial@ff1b0000&rockchip,rk3399-uartsnps,dw-apb-uartTcbaudclkapb_pclkeMWdefault%O disabledspi@ff1c0000(rockchip,rk3399-spirockchip,rk3066-spiG[spiclkapb_pclkDP P txrxdefault%QRST+ disabledspi@ff1d0000(rockchip,rk3399-spirockchip,rk3066-spiH\spiclkapb_pclk5P P txrxdefault%UVWX+ disabledspi@ff1e0000(rockchip,rk3399-spirockchip,rk3066-spiI]spiclkapb_pclk4PPtxrxdefault%YZ[\+ disabledspi@ff1f0000(rockchip,rk3399-spirockchip,rk3066-spiJ^spiclkapb_pclkCPPtxrxdefault%]^_`+ disabledspi@ff200000(rockchip,rk3399-spirockchip,rk3066-spi K_spiclkapb_pclkaa txrxdefault%bcde/+ disabledthermal-zonescpu-thermaldftripscpu_alert0p passivegcpu_alert1$ passivehcpu_crits  criticalcooling-mapsmap0gmap1hHgpu-thermaldftripsgpu_alert0$ passiveigpu_crits  criticalcooling-mapsmap0i jtsadc@ff260000rockchip,rk3399-tsadc&alO qOdtsadcapb_pclk tsadc-apb=*sinitdefaultsleep%kAlKkUokaykfqos@ffa58000rockchip,rk3399-qossyscon tqos@ffa5c000rockchip,rk3399-qossyscon uqos@ffa60080rockchip,rk3399-qossyscon qos@ffa60100rockchip,rk3399-qossyscon qos@ffa60180rockchip,rk3399-qossyscon qos@ffa70000rockchip,rk3399-qossyscon xqos@ffa70080rockchip,rk3399-qossyscon yqos@ffa74000rockchip,rk3399-qossyscon@ vqos@ffa76000rockchip,rk3399-qossyscon` wqos@ffa90000rockchip,rk3399-qossyscon zqos@ffa98000rockchip,rk3399-qossyscon mqos@ffaa0000rockchip,rk3399-qossyscon {qos@ffaa0080rockchip,rk3399-qossyscon |qos@ffaa8000rockchip,rk3399-qossyscon }qos@ffaa8080rockchip,rk3399-qossyscon ~qos@ffab0000rockchip,rk3399-qossyscon nqos@ffab0080rockchip,rk3399-qossyscon oqos@ffab8000rockchip,rk3399-qossyscon pqos@ffac0000rockchip,rk3399-qossyscon qqos@ffac0080rockchip,rk3399-qossyscon rqos@ffac8000rockchip,rk3399-qossyscon qos@ffac8080rockchip,rk3399-qossyscon qos@ffad0000rockchip,rk3399-qossyscon qos@ffad8080rockchip,rk3399-qossyscon qos@ffae0000rockchip,rk3399-qossyscon spower-management@ff310000&rockchip,rk3399-pmusysconsimple-mfd1power-controller!rockchip,rk3399-power-controller+power-domain@34"mpower-domain@33!nopower-domain@31ppower-domain@32  qrpower-domain@35#spower-domain@25lpower-domain@23tpower-domain@22fupower-domain@27Lvpower-domain@28wpower-domain@8~}power-domain@9 power-domain@24xypower-domain@15+power-domain@21rzpower-domain@19{|power-domain@20}~power-domain@16+power-domain@17power-domain@18syscon@ff320000)rockchip,rk3399-pmugrfsysconsimple-mfd2io-domains&rockchip,rk3399-pmu-io-voltage-domainokayspi@ff350000(rockchip,rk3399-spirockchip,rk3066-spi5spiclkapb_pclk<default%+ disabledserial@ff370000&rockchip,rk3399-uartsnps,dw-apb-uart7"baudclkapb_pclkfMWdefault% disabledi2c@ff3c0000rockchip,rk3399-i2c<l    i2cpclk9default%+okay,regulator@40silergy,syr827@default% 4 "` :vdd_cpu_b I ^regulator-state-mem iregulator@41silergy,syr828Adefault% 4 "` :vdd_gpu I ^regulator-state-mem ipmic@1brockchip,rk808xin32krtc_clko_wifi default %             +GregulatorsDCDC_REG1 q "p :vdd_center Iqregulator-state-mem iDCDC_REG2 q "p :vdd_cpu_l Iq regulator-state-mem iDCDC_REG3 :vcc_ddrregulator-state-mem 8DCDC_REG4 w@ "w@ :vcc_1v8Lregulator-state-mem 8 Pw@LDO_REG1 w@ "w@ :vcc1v8_camregulator-state-mem iLDO_REG2 - "- :vcc3v0_touchregulator-state-mem iLDO_REG3 w@ "w@ :vcc1v8_pmupllregulator-state-mem 8 Pw@LDO_REG4 w@ "2Z :vcc_sdio0regulator-state-mem 8 P-LDO_REG5 - "- :vcca3v0_codecregulator-state-mem iLDO_REG6 ` "` :vcc_1v5regulator-state-mem 8 P`LDO_REG7 w@ "w@ :vcca1v8_codecregulator-state-mem iLDO_REG8 - "- :vcc_3v0regulator-state-mem 8 P-SWITCH_REG1 :vcc3v3_s3#regulator-state-mem iSWITCH_REG2 :vcc3v3_s0regulator-state-mem ii2c@ff3d0000rockchip,rk3399-i2c=l    i2cpclk8default%+ disabled,typec-portc@22 fcs,fusb302" default% li2c@ff3e0000rockchip,rk3399-i2c>l    i2cpclk:default%+ disabledpwm@ff420000(rockchip,rk3399-pwmrockchip,rk3288-pwmB xdefault%okaypwm@ff420010(rockchip,rk3399-pwmrockchip,rk3288-pwmB xdefault%okaypwm@ff420020(rockchip,rk3399-pwmrockchip,rk3288-pwmB  xactive%okaypwm@ff420030(rockchip,rk3399-pwmrockchip,rk3288-pwmB0 xdefault% disableddfi@ff630000c@rockchip,rk3399-dfiyy pclk_ddr_monvideo-codec@ff650000rockchip,rk3399-vpue rq +vepuvdpu aclkhclk /iommu@ff650800rockchip,iommue@s aclkiface /video-codec@ff660000rockchip,rk3399-vdecft axiahbcabaccore / iommu@ff660480rockchip,iommu f@f@u aclkiface/  iommu@ff670800rockchip,iommug@* aclkiface  disabledrga@ff680000rockchip,rk3399-rgah7maclkhclksclkjgi coreaxiahb/!efuse@ff690000rockchip,rk3399-efusei+} pclk_efusecpu-id@7cpu-leakage@17gpu-leakage@18center-leakage@19cpu-leakage@1alogic-leakage@1bwafer-info@1cdma-controller@ff6d0000arm,pl330arm,primecellm@    apb_pclkadma-controller@ff6e0000arm,pl330arm,primecelln@    apb_pclkPclock-controller@ff750000rockchip,rk3399-pmucruuxin24m= l(Jclock-controller@ff760000rockchip,rk3399-cruvxin24m= l@BCxD#g/;рxh<4`#Fׄׄ ׄsyscon@ff770000&rockchip,rk3399-grfsysconsimple-mfdw+io-domains"rockchip,rk3399-io-voltage-domainokay L  0 mipi-dphy-rx0rockchip,rk3399-mipi-dphy-rx0wodphy-refdphy-cfggrf/  disabledusb2phy@e450rockchip,rk3399-usb2phyP{phyclkclk_usbphy0_480mokay2host-port  +linestateokay3otg-port 0ghj+otg-bvalidotg-idlinestateokay6usb2phy@e460rockchip,rk3399-usb2phy`|phyclkclk_usbphy1_480mokay4host-port  +linestate disabled5otg-port 0lmo+otg-bvalidotg-idlinestateokay8phy@f780rockchip,rk3399-emmc-phy$emmcclk 2  disabled 1pcie-phyrockchip,rk3399-pcie-phyrefclk phyokayUlphy@ff7c0000rockchip,rk3399-typec-phy|~}tcpdcoretcpdphy-refl~/Luphyuphy-pipeuphy-tcphy=okaydp-port :usb3-port 7phy@ff800000rockchip,rk3399-typec-phytcpdcoretcpdphy-refl/ Muphyuphy-pipeuphy-tcphy=okaydp-port ;usb3-port 9watchdog@ff848000 rockchip,rk3399-wdtsnps,dw-wdt|xrktimer@ff850000rockchip,rk3399-timerQhZ pclktimerspdif@ff870000rockchip,rk3399-spdifBatx mclkhclkUdefault%/ disabledi2s@ff880000(rockchip,rk3399-i2srockchip,rk3066-i2s='aatxrxi2s_clki2s_hclkVbclk_onbclk_off%A/ disabledi2s@ff890000(rockchip,rk3399-i2srockchip,rk3066-i2s(aatxrxi2s_clki2s_hclkWdefault%/ disabledi2s@ff8a0000(rockchip,rk3399-i2srockchip,rk3066-i2s)aatxrxi2s_clki2s_hclkX/okayvop@ff8f0000rockchip,rk3399-vop-lit wlׄaclk_vopdclk_vophclk_vop / axiahbdclkokayport+endpoint@0endpoint@1endpoint@2endpoint@3endpoint@4=iommu@ff8f3f00rockchip,iommu?w aclkiface/ okayvop@ff900000rockchip,rk3399-vop-big vlׄaclk_vopdclk_vophclk_vop / axiahbdclkokayport+endpoint@0endpoint@1endpoint@2endpoint@3endpoint@4<iommu@ff903f00rockchip,iommu?v aclkiface/ okayisp0@ff910000rockchip,rk3399-cif-isp@+nispaclkhclk sxdphy/ disabledports+port@0+iommu@ff914000rockchip,iommu @P+ aclkiface / <isp1@ff920000rockchip,rk3399-cif-isp@,oispaclkhclk sxdphy/ disabledports+port@0+iommu@ff924000rockchip,iommu @P, aclkiface / <hdmi-soundsimple-audio-card Wi2s p hdmi-soundokaysimple-audio-card,cpu simple-audio-card,codec hdmi@ff940000rockchip,rk3399-dw-hdmiW(tqpoiahbisfrcecgrfref/=okay default%ports+port@0+endpoint@0endpoint@1port@1dsi@ff960000*rockchip,rk3399-mipi-dsisnps,dw-mipi-dsi- porefpclkphy_cfggrf/apb=+ disabledports+port@0+endpoint@0endpoint@1port@1dsi@ff968000*rockchip,rk3399-mipi-dsisnps,dw-mipi-dsi. qorefpclkphy_cfggrf/apb=+  disabledports+port@0+endpoint@0endpoint@1port@1dp@ff970000rockchip,rk3399-edp jlo dppclkgrfdefault%/dp= disabledports+port@0+endpoint@0endpoint@1port@1gpu@ff9a0000#rockchip,rk3399-maliarm,mali-t8600 +jobmmugpu#2 P/#okay jpinctrlrockchip,rk3399-pinctrl=y+gpio@ff720000rockchip,gpio-bankr  *gpio@ff730000rockchip,gpio-banks  gpio@ff780000rockchip,gpio-bankxP  Hgpio@ff788000rockchip,gpio-bankxQ  %gpio@ff790000rockchip,gpio-bankyR  pcfg-pull-up pcfg-pull-down pcfg-pull-none pcfg-pull-none-12ma   pcfg-pull-none-13ma   pcfg-pull-none-18ma  pcfg-pull-none-20ma  pcfg-pull-up-2ma  pcfg-pull-up-8ma  pcfg-pull-up-18ma  pcfg-pull-up-20ma  pcfg-pull-down-4ma  pcfg-pull-down-8ma  pcfg-pull-down-12ma   pcfg-pull-down-18ma  pcfg-pull-down-20ma  pcfg-output-high pcfg-output-low #pcfg-input-enable .pcfg-input-pull-up . pcfg-input-pull-down . clockclk-32k ;cifcif-clkin ; cif-clkouta ; edpedp-hpd ;gmacrgmii-pins ;    rmii-pins ;     phy-intb ;  phy-rstb ;!i2c0i2c0-xfer ;i2c1i2c1-xfer ;>i2c2i2c2-xfer ;?i2c3i2c3-xfer ;@i2c4i2c4-xfer ;  i2c5i2c5-xfer ;  Ai2c6i2c6-xfer ;  Bi2c7i2c7-xfer ;Ci2c8i2c8-xfer ;i2s0i2s0-2ch-bus` ;i2s0-2ch-bus-bclk-off` ;i2s0-8ch-bus ;i2s0-8ch-bus-bclk-off ;i2s1i2s1-2ch-busP ;i2s1-2ch-bus-bclk-offP ;sdio0sdio0-bus1 ;sdio0-bus4@ ;'sdio0-cmd ;(sdio0-clk ;)sdio0-cd ;sdio0-pwr ;sdio0-bkpwr ;sdio0-wp ;sdio0-int ;sdmmcsdmmc-bus1 ;sdmmc-bus4@ ;   +sdmmc-clk ; ,sdmmc-cmd ; -sdmmc-cd ;sdmmc-wp ;sdmmc0-det-l ;.sdmmc0-pwr-h ;suspendap-pwroff ;ddrio-pwroff ;spdifspdif-bus ;spdif-bus-1 ;spi0spi0-clk ;Qspi0-cs0 ;Tspi0-cs1 ;spi0-tx ;Rspi0-rx ;Sspi1spi1-clk ; Uspi1-cs0 ; Xspi1-rx ;Wspi1-tx ;Vspi2spi2-clk ; Yspi2-cs0 ; \spi2-rx ; [spi2-tx ; Zspi3spi3-clk ;spi3-cs0 ;spi3-rx ;spi3-tx ;spi4spi4-clk ;]spi4-cs0 ;`spi4-rx ;_spi4-tx ;^spi5spi5-clk ;bspi5-cs0 ;espi5-rx ;dspi5-tx ;ctestclktest-clkout0 ;test-clkout1 ;test-clkout2 ;tsadcotp-pin ;kotp-out ;luart0uart0-xfer ;Duart0-cts ;Fuart0-rts ;Euart1uart1-xfer ;  Muart2auart2a-xfer ; uart2buart2b-xfer ;uart2cuart2c-xfer ;Nuart3uart3-xfer ;Ouart3-cts ;uart3-rts ;uart4uart4-xfer ;uarthdcpuarthdcp-xfer ;pwm0pwm0-pin ;pwm0-pin-pull-down ;vop0-pwm-pin ;vop1-pwm-pin ;pwm1pwm1-pin ;pwm1-pin-pull-down ;pwm2pwm2-pin ;pwm2-pin-pull-down ;pwm3apwm3a-pin ;pwm3bpwm3b-pin ;hdmihdmi-i2c-xfer ;hdmi-cec ;pciepci-clkreqn-cpm ;pci-clkreqnb-cpm ;fusb30xfusb0-int ;gpio-ledslan-led-pin ;sys-led-pin ; wan-led-pin ;pmiccpu-b-sleep ;gpu-sleep ;pmic-int-l ;rockchip-keyreset-button-pin ;sdiobt-host-wake-l ;Jbt-reg-on-h ; Ibt-wake-l ;Kwifi-reg_on-h ; opp-table-0operating-points-v2 I opp00 TQ [  i@opp01 T#F [ opp02 T0, [ P Popp03 T< [HHopp04 TG [B@B@opp05 TTfr [**opp-table-1operating-points-v2 Iopp00 TQ [  i@opp01 T#F [ opp02 T0, [ opp03 T< [ Y Yopp04 TG [~~opp05 TTfr [opp06 T_" [opp07 TkI [OOopp-table-2operating-points-v2opp00 T  [ 0opp01 T@ [ 0opp02 Tׄ [ 0opp03 Te [ Y Y0opp04 T#F [HH0opp05 T/ [0chosen zserial2:1500000n8external-gmac-clock fixed-clocksY@ clkin_gmacvcc3v3-sysregulator-fixed 2Z "2Z :vcc3v3_sys ^vcc5v0-sysregulator-fixed LK@ "LK@ :vcc5v0_sys ^vcc1v8-s3regulator-fixed w@ "w@ :vcc1v8_s3 ^Lvcc3v0-sdregulator-fixed  *default% - "- :vcc3v0_sd ^/vcca0v9-s3regulator-fixed  "  :vcca0v9_s3 ^vcca1v8-s3regulator-fixed w@ "w@ :vcca1v8_s3 ^vbus-typecregulator-fixed LK@ "LK@ :vbus_typecgpio-keys gpio-keys default%key-reset 2  reset gpio-leds gpio-ledsdefault %led-lan  green:lanled-sys *  red:power onled-wan  green:wansdio-pwrseqmmc-pwrseq-simpleG ext_clockdefault% * &vdd-5vregulator-fixed :vdd_5v compatibleinterrupt-parent#address-cells#size-cellsmodelgpio0gpio1gpio2gpio3gpio4i2c0i2c1i2c2i2c3i2c4i2c5i2c6i2c7i2c8serial0serial1serial2serial3serial4spi0spi1spi2spi3spi4spi5ethernet0mmc0mmc1mmc2cpudevice_typeregenable-methodcapacity-dmips-mhzclocks#cooling-cellsdynamic-power-coefficientcpu-idle-statesi-cache-sizei-cache-line-sizei-cache-setsd-cache-sized-cache-line-sized-cache-setsnext-level-cacheoperating-points-v2cpu-supplyphandleduration-usexit-latency-uscache-levelcache-unifiedentry-methodlocal-timer-stoparm,psci-suspend-paramentry-latency-usmin-residency-usrockchip,pmudevfreq-eventsclock-namesstatusinterruptsarm,no-tick-in-suspendclock-frequencyclock-output-names#clock-cellsreg-names#interrupt-cellsaspm-no-l0sbus-rangeinterrupt-namesinterrupt-map-maskinterrupt-mapmax-link-speedmsi-mapphysphy-namesrangesresetsreset-namesnum-lanesvpcie0v9-supplyvpcie1v8-supplyvpcie3v3-supplyinterrupt-controllermax-functionsrockchip,max-outbound-regionspinctrl-namespinctrl-0power-domainsrockchip,grfsnps,txpblassigned-clock-parentsassigned-clocksclock_in_outphy-handlephy-modephy-supplytx_delayrx_delaynvmem-cellsnvmem-cell-namesreset-assert-usreset-deassert-usreset-gpiosmax-frequencyfifo-depthbus-widthcap-sd-highspeedcap-sdio-irqkeep-power-in-suspendmmc-pwrseqnon-removablesd-uhs-sdr104assigned-clock-ratescap-mmc-highspeedcd-gpiosdisable-wpvmmc-supplyvqmmc-supplyarasan,soc-ctl-syscondisable-cqe-dcmdmmc-hs200-1_8vdr_modephy_typesnps,dis_enblslpm_quirksnps,dis-u2-freeclk-exists-quirksnps,dis_u2_susphy_quirksnps,dis-del-phy-power-chg-quirksnps,dis-tx-ipgap-linecheck-quirk#sound-dai-cellsremote-endpointmsi-controller#msi-cellsaffinity#io-channel-cellsvref-supplyi2c-scl-rising-time-nsi2c-scl-falling-time-nspagesizereg-shiftreg-io-widthdevice-wakeup-gpioshost-wakeup-gpiosshutdown-gpiosmax-speedvbat-supplyvddio-supplydmasdma-namespolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresistripcooling-devicerockchip,hw-tshut-temppinctrl-1pinctrl-2#thermal-sensor-cellsrockchip,hw-tshut-moderockchip,hw-tshut-polarity#power-domain-cellspm_qospmu1830-supplyfcs,suspend-voltage-selectorregulator-always-onregulator-boot-onregulator-min-microvoltregulator-max-microvoltregulator-nameregulator-ramp-delayvin-supplyregulator-off-in-suspendrockchip,system-power-controllerwakeup-sourcevcc1-supplyvcc2-supplyvcc3-supplyvcc4-supplyvcc6-supplyvcc7-supplyvcc8-supplyvcc9-supplyvcc10-supplyvcc11-supplyvcc12-supplyregulator-on-in-suspendregulator-suspend-microvoltvbus-supply#pwm-cellsiommus#iommu-cells#dma-cellsarm,pl330-periph-burst#reset-cellsbt656-supplyaudio-supplysdmmc-supplygpio1830-supply#phy-cellsdrive-impedance-ohmrockchip,enable-strobe-pulldownrockchip,disable-mmu-resetsimple-audio-card,formatsimple-audio-card,mclk-fssimple-audio-card,namesound-daiddc-i2c-busmali-supplygpio-controller#gpio-cellsbias-pull-upbias-pull-downbias-disabledrive-strengthoutput-highoutput-lowinput-enablerockchip,pinsopp-sharedopp-hzopp-microvoltclock-latency-nsstdout-pathenable-active-highgpioautorepeatdebounce-intervallabellinux,codedefault-state