R8(  ),rockchip,rk3568-evb1-v10rockchip,rk3568$7Rockchip RK3568 EVB1 DDR4 V10 Boardaliases=/pinctrl/gpio@fdd60000C/pinctrl/gpio@fe740000I/pinctrl/gpio@fe750000O/pinctrl/gpio@fe760000U/pinctrl/gpio@fe770000[/i2c@fdd40000`/i2c@fe5a0000e/i2c@fe5b0000j/i2c@fe5c0000o/i2c@fe5d0000t/i2c@fe5e0000y/serial@fdd50000/serial@fe650000/serial@fe660000/serial@fe670000/serial@fe680000/serial@fe690000/serial@fe6a0000/serial@fe6b0000/serial@fe6c0000/serial@fe6d0000/spi@fe610000/spi@fe620000/spi@fe630000/spi@fe640000/ethernet@fe2a0000/ethernet@fe010000/mmc@fe2b0000/mmc@fe310000cpus cpu@0cpu,arm,cortex-a55 !psci/CP@bo|@ cpu@100cpu,arm,cortex-a55!psci/CP@bo|@ cpu@200cpu,arm,cortex-a55!psci/CP@bo|@ cpu@300cpu,arm,cortex-a55!psci/CP@bo|@ l3-cache,cacheER@dopp-table-0,operating-points-v2opp-408000000Q  0@opp-600000000#F  0opp-8160000000,  0 opp-1104000000Aʹ  0opp-1416000000Tfr  0opp-1608000000_" 0opp-1800000000kI 0opp-1992000000v 000display-subsystem,rockchip,display-subsystemfirmwarescmi ,arm,scmi-smc' protocol@14-opp-table-1,operating-points-v2Gopp-200000000  opp-300000000 opp-400000000ׄ opp-600000000#F opp-700000000)' opp-800000000/B@hdmi-sound,simple-audio-card:HDMIQi2sjokaysimple-audio-card,codecsimple-audio-card,cpu pmu,arm,cortex-a55-pmu0 psci ,arm,psci-1.0(smctimer,arm,armv8-timer0   xin24m ,fixed-clockn6xin24m-xin32k ,fixed-clockxin32kdefault-sram@10f000 ,mmio-sram sram@0,arm,scmi-shmemsata@fc400000',rockchip,rk3568-dwc-ahcisnps,dwc-ahci@  satapmaliverxoob _ sata-phy'9 disabledsata@fc800000',rockchip,rk3568-dwc-ahcisnps,dwc-ahci  satapmaliverxoob ` sata-phy'9 disabledusb@fcc00000,rockchip,rk3568-dwc3snps,dwc3@   ref_clksuspend_clkbus_clkGotg Outmi_wide9X_okay usb2-phyusb3-phyxusb@fd000000,rockchip,rk3568-dwc3snps,dwc3@   ref_clksuspend_clkbus_clkGhost usb2-phyusb3-phy Outmi_wide9X_okayinterrupt-controller@fd400000 ,arm,gic-v3 @F  A(usb@fd800000 ,generic-ehci  usbokayusb@fd840000 ,generic-ohci  usbokayusb@fd880000 ,generic-ehci  usbokayusb@fd8c0000 ,generic-ohci  usbokaysyscon@fdc20000),rockchip,rk3568-pmugrfsysconsimple-mfd`io-domains&,rockchip,rk3568-pmu-io-voltage-domainokay+9syscon@fdc50000 ,rockchip,rk3568-pipe-grfsysconsyscon@fdc60000&,rockchip,rk3568-grfsysconsimple-mfd syscon@fdc80000$,rockchip,rk3568-pipe-phy-grfsysconsyscon@fdc90000$,rockchip,rk3568-pipe-phy-grfsysconsyscon@fdca0000#,rockchip,rk3568-usb2phy-grfsysconsyscon@fdca8000#,rockchip,rk3568-usb2phy-grfsysconʀclock-controller@fdd00000,rockchip,rk3568-pmucru-Gclock-controller@fdd20000,rockchip,rk3568-cru  xin24m-GT dG y i2c@fdd40000(,rockchip,rk3568-i2crockchip,rk3399-i2c . -  i2cpclk!default okayregulator@1c ,tcs,tcs4525vdd_cpu 504"regulator-state-mem?pmic@20,rockchip,rk809 #THy- mclk Hdefault$%Xy&&&&&&&&&regulatorsDCDC_REG1 vdd_logic pqregulator-state-mem?DCDC_REG2vdd_gpu pqHregulator-state-mem?DCDC_REG3vcc_ddrregulator-state-memDCDC_REG4vdd_npu pqregulator-state-mem?DCDC_REG5vcc_1v8w@w@regulator-state-mem?LDO_REG1vdda0v9_image  \regulator-state-mem?LDO_REG2 vdda_0v9  regulator-state-mem?LDO_REG3 vdda0v9_pmu  regulator-state-mem3 LDO_REG4 vccio_acodec2Z2Zregulator-state-mem?LDO_REG5 vccio_sdw@2Zregulator-state-mem?LDO_REG6 vcc3v3_pmu2Z2Zregulator-state-mem32ZLDO_REG7 vcca_1v8w@w@regulator-state-mem?LDO_REG8 vcca1v8_pmuw@w@regulator-state-mem3w@LDO_REG9vcca1v8_imagew@w@]regulator-state-mem?SWITCH_REG1vcc_3v3regulator-state-mem?SWITCH_REG2 vcc3v3_sdfregulator-state-mem?codecOserial@fdd50000&,rockchip,rk3568-uartsnps,dw-apb-uart t  , baudclkapb_pclkl''(defaultq~ disabledpwm@fdd70000(,rockchip,rk3568-pwmrockchip,rk3328-pwm  0  pwmpclk)default disabledpwm@fdd70010(,rockchip,rk3568-pwmrockchip,rk3328-pwm  0  pwmpclk*default disabledpwm@fdd70020(,rockchip,rk3568-pwmrockchip,rk3328-pwm   0  pwmpclk+default disabledpwm@fdd70030(,rockchip,rk3568-pwmrockchip,rk3328-pwm0  0  pwmpclk,default disabledpower-management@fdd90000&,rockchip,rk3568-pmusysconsimple-mfdpower-controller!,rockchip,rk3568-power-controller power-domain@7 -power-domain@8  ./0power-domain@9   123power-domain@10  456789power-domain@11  :power-domain@13  ;power-domain@14  <=>power-domain@15  ?@ABCDEFgpu@fde60000&,rockchip,rk3568-maliarm,mali-bifrost@$()' jobmmugpu  gpubus/G9okayHvideo-codec@fdea0400,rockchip,rk3568-vpu vdpu   aclkhclkI9 iommu@fdea0800,rockchip,rk3568-iommu@   aclkiface 9 Irga@fdeb0000(,rockchip,rk3568-rgarockchip,rk3288-rga Z  aclkhclksclkX&$% coreaxiahb9 video-codec@fdee0000,rockchip,rk3568-vepu @   aclkhclkJ9 iommu@fdee0800,rockchip,rk3568-iommu@ ?   aclkiface9 Jmmc@fe0000000,rockchip,rk3568-dw-mshcrockchip,rk3288-dw-mshc@ d   biuciuciu-driveciu-sampleрXreset disabledethernet@fe010000&,rockchip,rk3568-gmacsnps,dwmac-4.20a macirqeth_wake_irq@ W stmmacethmac_clk_rxmac_clk_txclk_mac_refoutaclk_macpclk_macclk_mac_speedptp_refX stmmaceth K$L7MJokayTydsY@Soutput`N krgmii-iddefaultOPQRSmdio,snps,dwmac-mdio ethernet-phy@0,ethernet-phy-ieee802.3-c22tN  TNstmmac-axi-configKrx-queues-configLqueue0tx-queues-configMqueue0vop@fe040000 0@vopgamma-lut ( % aclkhclkdclk_vp0dclk_vp1dclk_vp2U9  okay,rockchip,rk3568-vopTyports port@0 endpoint@2V^port@1 port@2 iommu@fe043e00,rockchip,rk3568-iommu >?    aclkiface9 okayUdsi@fe060000*,rockchip,rk3568-mipi-dsisnps,dw-mipi-dsi D pclk dphyW9 apbX  disabledports port@0port@1dsi@fe070000*,rockchip,rk3568-mipi-dsisnps,dw-mipi-dsi E pclk dphyX9 apbX  disabledports port@0port@1hdmi@fe0a0000,rockchip,rk3568-dw-hdmi  -( ( iahbisfrcecrefdefault YZ[9 q yokay\"]ports port@0endpoint^Vport@1endpoint_qos@fe128000,rockchip,rk3568-qossyscon -qos@fe138080,rockchip,rk3568-qossyscon <qos@fe138100,rockchip,rk3568-qossyscon =qos@fe138180,rockchip,rk3568-qossyscon >qos@fe148000,rockchip,rk3568-qossyscon .qos@fe148080,rockchip,rk3568-qossyscon /qos@fe148100,rockchip,rk3568-qossyscon 0qos@fe150000,rockchip,rk3568-qossyscon :qos@fe158000,rockchip,rk3568-qossyscon 4qos@fe158100,rockchip,rk3568-qossyscon 5qos@fe158180,rockchip,rk3568-qossyscon 6qos@fe158200,rockchip,rk3568-qossyscon 7qos@fe158280,rockchip,rk3568-qossyscon 8qos@fe158300,rockchip,rk3568-qossyscon 9qos@fe180000,rockchip,rk3568-qossyscon qos@fe190000,rockchip,rk3568-qossyscon ?qos@fe190280,rockchip,rk3568-qossyscon Cqos@fe190300,rockchip,rk3568-qossyscon Dqos@fe190380,rockchip,rk3568-qossyscon Eqos@fe190400,rockchip,rk3568-qossyscon Fqos@fe198000,rockchip,rk3568-qossyscon ;qos@fe1a8000,rockchip,rk3568-qossyscon 1qos@fe1a8080,rockchip,rk3568-qossyscon 2qos@fe1a8100,rockchip,rk3568-qossyscon 3dfi@fe230000,rockchip,rk3568-dfi#  2`pcie@fe260000,rockchip,rk3568-pcie0@&dbiapbconfig<KJIHGsyspmcmsglegacyerr?( $ aclk_mstaclk_slvaclk_dbipclkauxpciI`\aaaaj{ pcie-phy9T @@Xpipe  disabledlegacy-interrupt-controller Hammc@fe2b00000,rockchip,rk3568-dw-mshcrockchip,rk3288-dw-mshc+@ b   biuciuciu-driveciu-sampleрXresetokay #defaultbcdef mmc@fe2c00000,rockchip,rk3568-dw-mshcrockchip,rk3288-dw-mshc,@ c   biuciuciu-driveciu-sampleрXreset disabledspi@fe300000 ,rockchip,sfc0@ e xv clk_sfchclk_sfcgdefault disabledmmc@fe310000,rockchip,rk3568-dwcmshc1 T{}d n6( |zy{} corebusaxiblocktimerokay  defaulthijki2s@fe400000,rockchip,rk3568-i2s-tdm@ 4T=AdFqFq ?C9 mclk_txmclk_rxhclkll txXPQ tx-mrx-m yokay i2s@fe410000,rockchip,rk3568-i2s-tdmA 5TEIdFqFq GK: mclk_txmclk_rxhclklll rxtxXRS tx-mrx-m default0mnopqrstuvwxyokay (i2s@fe420000,rockchip,rk3568-i2s-tdmB 6TMdFq OO; mclk_txmclk_rxhclklll txrxXTtx-m defaultyz{|y disabledi2s@fe430000,rockchip,rk3568-i2s-tdmC 7 SW< mclk_txmclk_rxhclklll txrxXUV tx-mrx-m y disabledpdm@fe440000,rockchip,rk3568-pdmD L ZY pdm_clkpdm_hclkll  rx}~defaultXXpdm-my disabledspdif@fe460000,rockchip,rk3568-spdifF f  mclkhclk _\ll txdefaulty disableddma-controller@fe530000,arm,pl330arm,primecellS@  C    apb_pclk Z'dma-controller@fe550000,arm,pl330arm,primecellU@ C    apb_pclk Zli2c@fe5a0000(,rockchip,rk3568-i2crockchip,rk3399-i2cZ / HG  i2cpclkdefault okaygoodix@14,goodix,gt1151#  e s# default # }i2c@fe5b0000(,rockchip,rk3568-i2crockchip,rk3399-i2c[ 0 JI  i2cpclkdefault  disabledi2c@fe5c0000(,rockchip,rk3568-i2crockchip,rk3399-i2c\ 1 LK  i2cpclkdefault  disabledi2c@fe5d0000(,rockchip,rk3568-i2crockchip,rk3399-i2c] 2 NM  i2cpclkdefault  disabledi2c@fe5e0000(,rockchip,rk3568-i2crockchip,rk3399-i2c^ 3 PO  i2cpclkdefault  disabledwatchdog@fe600000 ,rockchip,rk3568-wdtsnps,dw-wdt`    tclkpclkspi@fe610000(,rockchip,rk3568-spirockchip,rk3066-spia g RQ spiclkapb_pclkl'' txrxdefault   disabledspi@fe620000(,rockchip,rk3568-spirockchip,rk3066-spib h TS spiclkapb_pclkl'' txrxdefault   disabledspi@fe630000(,rockchip,rk3568-spirockchip,rk3066-spic i VU spiclkapb_pclkl'' txrxdefault   disabledspi@fe640000(,rockchip,rk3568-spirockchip,rk3066-spid j XW spiclkapb_pclkl'' txrxdefault   disabledserial@fe650000&,rockchip,rk3568-uartsnps,dw-apb-uarte u  baudclkapb_pclkl''defaultq~ disabledserial@fe660000&,rockchip,rk3568-uartsnps,dw-apb-uartf v #  baudclkapb_pclkl''defaultq~okayserial@fe670000&,rockchip,rk3568-uartsnps,dw-apb-uartg w '$ baudclkapb_pclkl''defaultq~ disabledserial@fe680000&,rockchip,rk3568-uartsnps,dw-apb-uarth x +( baudclkapb_pclkl'' defaultq~ disabledserial@fe690000&,rockchip,rk3568-uartsnps,dw-apb-uarti y /, baudclkapb_pclkl' ' defaultq~ disabledserial@fe6a0000&,rockchip,rk3568-uartsnps,dw-apb-uartj z 30 baudclkapb_pclkl' ' defaultq~ disabledserial@fe6b0000&,rockchip,rk3568-uartsnps,dw-apb-uartk { 74 baudclkapb_pclkl''defaultq~ disabledserial@fe6c0000&,rockchip,rk3568-uartsnps,dw-apb-uartl | ;8 baudclkapb_pclkl''defaultq~ disabledserial@fe6d0000&,rockchip,rk3568-uartsnps,dw-apb-uartm } ?< baudclkapb_pclkl''defaultq~ disabledthermal-zonescpu-thermal d  tripscpu_alert0 p passivecpu_alert1 $ passivecpu_crit s  criticalcooling-mapsmap0 0 gpu-thermal   tripsgpu-threshold p passivegpu-target $ passivegpu-crit s  criticalcooling-mapsmap0  tsadc@fe710000,rockchip,rk3568-tsadcq sTdf@ `  tsadcapb_pclkX  sinitdefaultsleep   okay * Asaradc@fe720000.,rockchip,rk3568-saradcrockchip,rk3399-saradcr ]  saradcapb_pclkX saradc-apb \okay npwm@fe6e0000(,rockchip,rk3568-pwmrockchip,rk3328-pwmn ZY  pwmpclkdefault disabledpwm@fe6e0010(,rockchip,rk3568-pwmrockchip,rk3328-pwmn ZY  pwmpclkdefault disabledpwm@fe6e0020(,rockchip,rk3568-pwmrockchip,rk3328-pwmn  ZY  pwmpclkdefault disabledpwm@fe6e0030(,rockchip,rk3568-pwmrockchip,rk3328-pwmn0 ZY  pwmpclkdefault disabledpwm@fe6f0000(,rockchip,rk3568-pwmrockchip,rk3328-pwmo ]\  pwmpclkdefault disabledpwm@fe6f0010(,rockchip,rk3568-pwmrockchip,rk3328-pwmo ]\  pwmpclkdefault disabledpwm@fe6f0020(,rockchip,rk3568-pwmrockchip,rk3328-pwmo  ]\  pwmpclkdefault disabledpwm@fe6f0030(,rockchip,rk3568-pwmrockchip,rk3328-pwmo0 ]\  pwmpclkdefault disabledpwm@fe700000(,rockchip,rk3568-pwmrockchip,rk3328-pwmp `_  pwmpclkdefault disabledpwm@fe700010(,rockchip,rk3568-pwmrockchip,rk3328-pwmp `_  pwmpclkdefault disabledpwm@fe700020(,rockchip,rk3568-pwmrockchip,rk3328-pwmp  `_  pwmpclkdefault disabledpwm@fe700030(,rockchip,rk3568-pwmrockchip,rk3328-pwmp0 `_  pwmpclkdefault disabledphy@fe830000,rockchip,rk3568-naneng-combphy "}  refapbpipeT"dX z  okayphy@fe840000,rockchip,rk3568-naneng-combphy %~  refapbpipeT%dX z   disabledphy@fe870000,rockchip,rk3568-csi-dphy y pclk Xapb  disabledmipi-dphy@fe850000,rockchip,rk3568-dsi-dphy  refpclk z 9 apbX disabledWmipi-dphy@fe860000,rockchip,rk3568-dsi-dphy  refpclk { 9 apbX disabledXusb2phy@fe8a0000,rockchip,rk3568-usb2phy  phyclkclk_usbphy0_480m  -okayhost-port okay otg-port okay usb2phy@fe8b0000,rockchip,rk3568-usb2phy  phyclkclk_usbphy1_480m  -okayhost-port okay otg-port okay pinctrl,rockchip,rk3568-pinctrl 2` gpio@fdd60000,rockchip,gpio-bank ! .    #gpio@fe740000,rockchip,gpio-bankt " cd   gpio@fe750000,rockchip,gpio-banku # ef  @  Tgpio@fe760000,rockchip,gpio-bankv $ gh  `  gpio@fe770000,rockchip,gpio-bankw % ij   pcfg-pull-up pcfg-pull-none pcfg-pull-none-drv-level-1  pcfg-pull-none-drv-level-2  pcfg-pull-none-drv-level-3  pcfg-pull-up-drv-level-1  pcfg-pull-up-drv-level-2  pcfg-pull-none-smt  acodecaudiopwmbt656bt1120camcan0can1can2cifclk32kclk32k-out0 .cpuebcedpdpemmcemmc-bus8 .  hemmc-clk .iemmc-cmd .jemmc-datastrobe .keth0eth1flashfspifspi-pins` .ggmac0gmac0-miim .gmac0-rx-bus20 .gmac0-tx-bus20 .   gmac0-rgmii-clk .gmac0-rgmii-bus@ .gmac1gmac1m1-miim .Ogmac1m1-rx-bus20 . Qgmac1m1-tx-bus20 .Pgmac1m1-rgmii-clk .Rgmac1m1-rgmii-bus@ .Sgpuhdmitxhdmitxm0-cec .[hdmitx-scl .Yhdmitx-sda .Zi2c0i2c0-xfer .  !i2c1i2c1-xfer .  i2c2i2c2m0-xfer . i2c3i2c3m0-xfer .i2c4i2c4m0-xfer .  i2c5i2c5m0-xfer .  i2s1i2s1m0-lrckrx .pi2s1m0-lrcktx .oi2s1m0-mclk .%i2s1m0-sclkrx .ni2s1m0-sclktx .mi2s1m0-sdi0 . qi2s1m0-sdi1 . ri2s1m0-sdi2 . si2s1m0-sdi3 .ti2s1m0-sdo0 .ui2s1m0-sdo1 .vi2s1m0-sdo2 . wi2s1m0-sdo3 . xi2s2i2s2m0-lrcktx .zi2s2m0-sclktx .yi2s2m0-sdi .{i2s2m0-sdo .|i2s3ispjtaglcdcmcunpupcie20pcie30x1pcie30x2pdmpdmm0-clk .}pdmm0-clk1 .~pdmm0-sdi0 . pdmm0-sdi1 . pdmm0-sdi2 . pdmm0-sdi3 .pmicpmic_int .$pmupwm0pwm0m0-pins .)pwm1pwm1m0-pins .*pwm2pwm2m0-pins .+pwm3pwm3-pins .,pwm4pwm4-pins .pwm5pwm5-pins .pwm6pwm6-pins .pwm7pwm7-pins .pwm8pwm8m0-pins . pwm9pwm9m0-pins . pwm10pwm10m0-pins . pwm11pwm11m0-pins .pwm12pwm12m0-pins .pwm13pwm13m0-pins .pwm14pwm14m0-pins .pwm15pwm15m0-pins .refclksatasata0sata1sata2scrsdmmc0sdmmc0-bus4@ .bsdmmc0-clk .csdmmc0-cmd .dsdmmc0-det .esdmmc1sdmmc2spdifspdifm0-tx .spi0spi0m0-pins0 . spi0m0-cs0 .spi0m0-cs1 .spi1spi1m0-pins0 . spi1m0-cs0 .spi1m0-cs1 .spi2spi2m0-pins0 .spi2m0-cs0 .spi2m0-cs1 .spi3spi3m0-pins0 .  spi3m0-cs0 .spi3m0-cs1 .tsadctsadc-shutorg .tsadc-pin .uart0uart0-xfer .(uart1uart1m0-xfer .  uart2uart2m0-xfer .uart3uart3m0-xfer .uart4uart4m0-xfer .uart5uart5m0-xfer .uart6uart6m0-xfer .uart7uart7m0-xfer .uart8uart8m0-xfer .uart9uart9m0-xfer .vopspi0-hsspi1-hsspi2-hsspi3-hsgmac-txd-level3gmac-txc-level2displayvcc3v3_lcd0_n_en .vcc3v3_lcd1_n_en .ledsled_work_en .touchscreentouch_int . touch_rst .usbvcc5v0_usb_host_en .vcc5v0_usb_otg_en .sata@fc000000',rockchip,rk3568-dwc-ahcisnps,dwc-ahci  satapmaliverxoob ^ sata-phy'9 disabledsyscon@fdc70000$,rockchip,rk3568-pipe-phy-grfsysconqos@fe190080,rockchip,rk3568-qossyscon @qos@fe190100,rockchip,rk3568-qossyscon Aqos@fe190200,rockchip,rk3568-qossyscon Bsyscon@fdcb8000%,rockchip,rk3568-pcie3-phy-grfsysconˀphy@fe8c0000,rockchip,rk3568-pcie3-phy  &'w refclk_mrefclk_npclkXphy < disabledpcie@fe270000,rockchip,rk3568-pcie ?( $ aclk_mstaclk_slvaclk_dbipclkauxpci<syspmcmsglegacyerrI`\j{ pcie-phy90@@'T @@@dbiapbconfigXpipe disabledlegacy-interrupt-controller pcie@fe280000,rockchip,rk3568-pcie ?( $ aclk_mstaclk_slvaclk_dbipclkauxpci<syspmcmsglegacyerrI`\j{  pcie-phy90@(T @@dbiapbconfigXpipe disabledlegacy-interrupt-controller ethernet@fe2a0000&,rockchip,rk3568-gmacsnps,dwmac-4.20a*macirqeth_wake_irq@ W stmmacethmac_clk_rxmac_clk_txclk_mac_refoutaclk_macpclk_macclk_mac_speedptp_refX stmmaceth $7JokayTydsY@Soutput` krgmii-iddefaultmdio,snps,dwmac-mdio ethernet-phy@0,ethernet-phy-ieee802.3-c22tN  Tstmmac-axi-configrx-queues-configqueue0tx-queues-configqueue0phy@fe820000,rockchip,rk3568-naneng-combphy |  refapbpipeTdX z  okaychosen Mserial2:1500000n8dc-12v,regulator-fixeddc_12vhdmi-con,hdmi-connectoraportendpoint_leds ,gpio-ledsled-0 # Yheartbeat b hheartbeatdefaultrk809-sound,simple-audio-cardQi2s :Analog RK809jsimple-audio-card,cpusimple-audio-card,codecvcc3v3-sys,regulator-fixed vcc3v3_sys2Z2Z4&vcc5v0-sys,regulator-fixed vcc5v0_sysLK@LK@4"vcc5v0-usb,regulator-fixed vcc5v0_usbLK@LK@4vcc5v0-usb-host,regulator-fixed ~ #defaultvcc5v0_usb_hostLK@LK@4vcc5v0-usb-otg,regulator-fixed ~ #defaultvcc5v0_usb_otgLK@LK@4vcc3v3-lcd0-n,regulator-fixedvcc3v3_lcd0_n2Z2Z ~ #4&defaultregulator-state-mem?vcc3v3-lcd1-n,regulator-fixedvcc3v3_lcd1_n2Z2Z ~ #4&defaultregulator-state-mem? interrupt-parent#address-cells#size-cellscompatiblemodelgpio0gpio1gpio2gpio3gpio4i2c0i2c1i2c2i2c3i2c4i2c5serial0serial1serial2serial3serial4serial5serial6serial7serial8serial9spi0spi1spi2spi3ethernet0ethernet1mmc0mmc1device_typeregclocks#cooling-cellsenable-methodoperating-points-v2i-cache-sizei-cache-line-sizei-cache-setsd-cache-sized-cache-line-sized-cache-setsnext-level-cachecpu-supplyphandlecache-levelcache-unifiedopp-sharedopp-hzopp-microvoltclock-latency-nsopp-suspendportsarm,smc-idshmem#clock-cellssimple-audio-card,namesimple-audio-card,formatsimple-audio-card,mclk-fsstatussound-daiinterruptsinterrupt-affinityarm,no-tick-in-suspendclock-frequencyclock-output-namespinctrl-0pinctrl-namesrangesclock-namesphysphy-namesports-implementedpower-domainsdr_modephy_typeresetssnps,dis_u2_susphy_quirkextconinterrupt-controller#interrupt-cellsmbi-aliasmbi-rangesmsi-controllerpmuio1-supplypmuio2-supplyvccio1-supplyvccio2-supplyvccio3-supplyvccio4-supplyvccio5-supplyvccio6-supplyvccio7-supply#reset-cellsassigned-clocksassigned-clock-ratesassigned-clock-parentsrockchip,grffcs,suspend-voltage-selectorregulator-nameregulator-always-onregulator-boot-onregulator-min-microvoltregulator-max-microvoltregulator-ramp-delayvin-supplyregulator-off-in-suspendrockchip,system-power-controller#sound-dai-cellsvcc1-supplyvcc2-supplyvcc3-supplyvcc4-supplyvcc5-supplyvcc6-supplyvcc7-supplyvcc8-supplyvcc9-supplywakeup-sourceregulator-initial-moderegulator-on-in-suspendregulator-suspend-microvoltrockchip,mic-in-differentialdmasreg-io-widthreg-shift#pwm-cells#power-domain-cellspm_qosinterrupt-namesmali-supplyiommus#iommu-cellsreset-namesfifo-depthmax-frequencysnps,axi-configsnps,mixed-burstsnps,mtl-rx-configsnps,mtl-tx-configsnps,tsoclock_in_outphy-handlephy-modereset-assert-usreset-deassert-usreset-gpiossnps,blensnps,rd_osr_lmtsnps,wr_osr_lmtsnps,rx-queues-to-usesnps,tx-queues-to-usereg-namesremote-endpointavdd-0v9-supplyavdd-1v8-supplyrockchip,pmubus-rangeinterrupt-map-maskinterrupt-maplinux,pci-domainnum-ib-windowsnum-ob-windowsmax-link-speedmsi-mapnum-lanesbus-widthcap-sd-highspeedcd-gpiosdisable-wpsd-uhs-sdr104vmmc-supplyvqmmc-supplynon-removabledma-namesrockchip,trcm-sync-tx-onlyarm,pl330-periph-burst#dma-cellsAVDD28-supplyirq-gpiosVDDIO-supplypolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresistripcooling-devicerockchip,hw-tshut-temppinctrl-1pinctrl-2#thermal-sensor-cellsrockchip,hw-tshut-moderockchip,hw-tshut-polarity#io-channel-cellsvref-supplyrockchip,pipe-grfrockchip,pipe-phy-grf#phy-cellsrockchip,usbgrfphy-supplygpio-controllergpio-ranges#gpio-cellsbias-pull-upbias-disabledrive-strengthinput-schmitt-enablerockchip,pinsrockchip,phy-grfstdout-pathfunctioncolorlinux,default-triggerenable-active-highgpio