8X(  ,,TQ-Systems i.MX8DXP TQMa8XDPS on MB-SMARC-2A2tq,imx8dxp-tqma8xdps-mb-smarc-2tq,imx8dxp-tqma8xdpsfsl,imx8dxpaliases =/bus@5b000000/ethernet@5b040000 G/bus@5b000000/ethernet@5b050000Q/bus@5d000000/gpio@5d080000W/bus@5d000000/gpio@5d090000]/bus@5d000000/gpio@5d0a0000c/bus@5d000000/gpio@5d0b0000i/bus@5d000000/gpio@5d0c0000o/bus@5d000000/gpio@5d0d0000u/bus@5d000000/gpio@5d0e0000{/bus@5d000000/gpio@5d0f0000/bus@5a000000/i2c@5a800000/bus@5a000000/i2c@5a810000/bus@5a000000/i2c@5a820000/bus@5a000000/i2c@5a830000/bus@5b000000/mmc@5b010000/bus@5b000000/mmc@5b020000/bus@5b000000/mmc@5b030000/bus@5d000000/mailbox@5d1b0000/bus@5d000000/mailbox@5d1c0000/bus@5d000000/mailbox@5d1d0000/bus@5d000000/mailbox@5d1e0000/bus@5d000000/mailbox@5d1f0000/bus@5a000000/serial@5a060000/bus@5a000000/serial@5a070000/bus@5a000000/serial@5a080000/bus@5a000000/serial@5a090000/bus@5a000000/spi@5a000000/bus@5a000000/spi@5a010000/bus@5a000000/spi@5a020000/bus@5a000000/spi@5a030000 /vpu@2c000000/vpu-core@2d080000 /vpu@2c000000/vpu-core@2d090000"/bus@5a000000/i2c@5a800000/rtc@51/system-controller/rtccpus cpu@0 cpu2arm,cortex-a35psci(5@GTa@s cpu@1 cpu2arm,cortex-a35psci(5@GTa@s  l2-cache02cache*7@Iopp-table2operating-points-v2opp-9000000005B@Iopp-1200000000GIinterrupt-controller@51a00000 2arm,gic-v3 QQ + @ reserved-memory Kdecoder-boot@84000000Rencoder-boot@86000000 Rdecoder-rpc@92000000Rdsp@92400000@R Ydisabledlinux,cma2shared-dma-pool`0 i0vm4@88000000R Ydisabledvdev0vring0@900000002shared-dma-poolR Ydisabledvdev0vring1@900080002shared-dma-poolR Ydisabledvdev1vring0@900100002shared-dma-poolR Ydisabledvdev1vring1@900180002shared-dma-poolR Ydisabledrsc-table@900ff000R Ydisabledvdevbuffer@904000002shared-dma-pool@R Ydisabledencoder-rpc@92100000pRpmu2arm,cortex-a35-pmu @psci 2arm,psci-1.0!smcsystem-controller 2fsl,imx-scu tx0rx0gip3$power-controller2fsl,imx8qxp-scu-pdfsl,scu-pd clock-controller2fsl,imx8qxp-clkfsl,scu-clkpinctrl2fsl,imx8qxp-iomuxcbacklight-lvds0grp [!backlight-lvds1grp Y!can1grpq!r!acan2grpn!m!bethphy0grpy@@xethphy1grph@P@zfec1grp5A4A&@%@'@(@)@*@,@-@.@/@0@1@vfec2grp9@7@?@@@8@:@;@B@A@>@=@<@|flexspi0grpMMMMMMMMMMMMMMsmarcgpiogrpl]!^!_!a!g!d!c!f!e!smarcfangpiogrpN!M!smarcmngtgpiogrp<H!E!G!F!C!lbdpanel0grp \!lbdpanel1grp Z!lpi2c0grp!!Rlpi2c0gpiogrp!!Slpuart0grp0o p i j Jlpuart3grp  Nmipi-lvds0-i2c0grpt!u!mipi-lvds0-i2c0-gpiogrpt!u!pcieagrp$AAAmipi-lvds0-pwmgrp v!mipi-lvds1-pwmgrp z!rtcgrp {!Vusdhc1grp @      @husdhc1100mhzgrp A ! ! ! !!!!!!Aiusdhc1200mhzgrp A ! ! ! !!!!!!Ajsdvmmcgrp !spi1grp<SARAUAT!V!Esai1grp<L@W@X@k@l@$usbotg1grp!!fusdhc2gpiogrp!!ousdhc2grpTA! !!!"!#!!nusdhc2100mhzgrpT@ ! " #  pusdhc2200mhzgrpT@ ! " #  qocotp2fsl,imx8qxp-scu-ocotp keys"2fsl,imx8qxp-sc-keyfsl,imx-sc-keyt Ydisabledrtc2fsl,imx8qxp-sc-rtcwatchdog"2fsl,imx8qxp-sc-wdtfsl,imx-sc-wdt<thermal-sensor*2fsl,imx8qxp-sc-thermalfsl,imx-sc-thermaltimer2arm,armv8-timer0@   clock-dummy 2fixed-clock clk_dummyclock-xtal32k 2fixed-clock xtal_32KHzclock-xtal24m 2fixed-clockn6 xtal_24MHzthermal-zonescpu0-thermal.<ctripstrip0LsXpassivetrip1LX criticalcooling-mapsmap0ch pmic0-thermal.<tripstrip0LXpassive trip1LHX criticalcooling-mapsmap0c h clock-img-ipg 2fixed-clock  img_ipg_clkbus@58000000 2simple-bus KXXjpegdec@58400000X@ @5 w    2nxp,imx8qxp-jpgdecjpegenc@58450000XE @1 w    2nxp,imx8qxp-jpgencclock-controller@585d00002fsl,imx8qxp-lpcgX]0img_jpeg_dec_lpcg_clkimg_jpeg_dec_lpcg_ipg_clk  clock-controller@585f00002fsl,imx8qxp-lpcgX_0img_jpeg_enc_lpcg_clkimg_jpeg_enc_lpcg_ipg_clk  vpu@2c000000 K,,, Yokay2nxp,imx8qxp-vpumailbox@2d0000002fsl,imx6sx-mu- @ Yokaymailbox@2d0200002fsl,imx6sx-mu- @ Yokayvpu-core@2d080000-2nxp,imx8q-vpu-decoder  tx0tx1rx$Yokayvpu-core@2d090000-2nxp,imx8q-vpu-encoder  tx0tx1rx$Yokayclock-cm40-ipg 2fixed-clock) cm40_ipg_clkbus@34000000 2simple-bus K44serial@372200002fsl,imx8qxp-lpuart7"@ ipgbaud wn6  Ydisabledi2c@37230000$2fsl,imx8qxp-lpi2cfsl,imx7ulp-lpi2c7#@ peripg w n6   Ydisabledintmux@374000002fsl,imx-intmux7@`@+ipg ! Ydisabledclock-controller@376200002fsl,imx8qxp-lpcg7b*cm40_lpcg_uart_clkcm40_lpcg_uart_ipg_clk clock-controller@376300002fsl,imx8qxp-lpcg7c (cm40_lpcg_i2c_clkcm40_lpcg_i2c_ipg_clk  bus@53000000 2simple-bus KSSgpu@53100000 2vivante,gcS @@ coreshaderw)'2 clock-audio-ipg 2fixed-clock'audio_ipg_clk!clock-ext-aud-mclk0 2fixed-clockext_aud_mclk04clock-ext-aud-mclk1 2fixed-clockext_aud_mclk15clock-esai0-rx 2fixed-clock esai0_rx_clk6clock-esai0-rx-hf 2fixed-clockesai0_rx_hf_clk7clock-esai0-tx 2fixed-clock esai0_tx_clk8clock-esai0-tx-hf 2fixed-clockesai0_tx_hf_clk9clock-spdif0-rx 2fixed-clock spdif0_rx:clock-sai0-rx-bclk 2fixed-clock sai0_rx_bclk;clock-sai0-tx-bclk 2fixed-clock sai0_tx_bclk<clock-sai1-rx-bclk 2fixed-clock sai1_rx_bclk=clock-sai1-tx-bclk 2fixed-clock sai1_tx_bclk>clock-sai2-rx-bclk 2fixed-clock sai2_rx_bclk?clock-sai3-rx-bclk 2fixed-clock sai3_rx_bclk@clock-sai4-rx-bclk 2fixed-clock sai4_rx_bclkAbus@59000000 2simple-bus KYYasrc@590000002fsl,imx8qm-asrcY @tdmemipgasrck_0asrck_1asrck_2asrck_3asrck_4asrck_5asrck_6asrck_7asrck_8asrck_9asrck_aasrck_basrck_casrck_dasrck_easrck_fspba`rxarxbrxctxatxbtxc@   Ydisabledesai@59010000!2fsl,imx8qm-esaifsl,imx6ull-esaiY @coreextalfsysspba rxtx  Ydisabledspdif@590200002fsl,imx8qm-spdifY@0  !:corerxtx0rxtx1rxtx2rxtx3rxtx4rxtx5rxtx6rxtx7spba  rxtx  Ydisabledsai@590400002fsl,imx8qm-saiY @:""busmclk0mclk1mclk2mclk3rxtx    > Ydisabledsai@590500002fsl,imx8qm-saiY @<##busmclk0mclk1mclk2mclk3rxtx  ?Yokay,wEEE#.default)$sai@590600002fsl,imx8qm-saiY @>%%busmclk0mclk1mclk2mclk3rx @ Ydisabledsai@590700002fsl,imx8qm-saiY @C&&busmclk0mclk1mclk2mclk3rx  Ydisableddma-controller@591f00002fsl,imx8qm-edmaY3>K\  @vwxyz{;;==?D @ A B C D E F G H I J K L M N O P Q R S T U V Wclock-controller@594000002fsl,imx8qxp-lpcgY@!asrc0_lpcg_ipg_clk clock-controller@594100002fsl,imx8qxp-lpcgYA !(esai0_lpcg_extal_clkesai0_lpcg_ipg_clk clock-controller@594200002fsl,imx8qxp-lpcgYB !%spdif0_lpcg_tx_clkspdif0_lpcg_gclkw  clock-controller@594400002fsl,imx8qxp-lpcgYD  !!sai0_lpcg_mclksai0_lpcg_ipg_clk >"clock-controller@594500002fsl,imx8qxp-lpcgYE  !!sai1_lpcg_mclksai1_lpcg_ipg_clk ?#clock-controller@594600002fsl,imx8qxp-lpcgYF !!sai2_lpcg_mclksai2_lpcg_ipg_clk @%clock-controller@594700002fsl,imx8qxp-lpcgYG !!sai3_lpcg_mclksai3_lpcg_ipg_clk &clock-controller@595800002fsl,imx8qxp-lpcgYX !!! 4dsp_lpcg_adb_clkdsp_lpcg_ipg_clkdsp_lpcg_core_clk 'clock-controller@595900002fsl,imx8qxp-lpcgYY!dsp_ram_lpcg_ipg_clk (dsp@596e80002fsl,imx8qxp-hifi4Yn'('ipgocramcore  txrxrxdb$)))\imx/dsp/hifi4.bin Ydisabledasrc@598000002fsl,imx8qm-asrcY @|d**memipgasrck_0asrck_1asrck_2asrck_3asrck_4asrck_5asrck_6asrck_7asrck_8asrck_9asrck_aasrck_basrck_casrck_dasrck_easrck_fspba`++++++rxarxbrxctxatxbtxc@   Ydisabledsai@598200002fsl,imx8qm-saiY @I,,busmclk0mclk1mclk2mclk3 ++ rxtx  Ydisabled/sai@598300002fsl,imx8qm-saiY @K--busmclk0mclk1mclk2mclk3+ tx  Ydisabled0amix@598400002fsl,imx8qm-audmixY.ipg j/0 Ydisabledmqs@598500002fsl,imx8qm-mqsY11 mclkcore  Ydisableddma-controller@599f00002fsl,imx8qm-edmaY 3> K@~JJLX l m n o p q r s t u v+clock-controller@59d000002fsl,imx8qxp-lpcgY Eaud_rec_clk0_lpcg_clk E2clock-controller@59d100002fsl,imx8qxp-lpcgY aud_rec_clk1_lpcg_clk 3clock-controller@59d200002fsl,imx8qxp-lpcgY Eaud_pll_div_clk0_lpcg_clk Eclock-controller@59d300002fsl,imx8qxp-lpcgY aud_pll_div_clk1_lpcg_clk clock-controller@59d500002fsl,imx8qxp-lpcgYmclkout0_lpcg_clk Yclock-controller@59d600002fsl,imx8qxp-lpcgYmclkout1_lpcg_clk acm@59e000002fsl,imx8qxp-acmY     E     > ? @     X23456789:;<=>?@Aaud_rec_clk0_lpcg_clkaud_rec_clk1_lpcg_clkaud_pll_div_clk0_lpcg_clkaud_pll_div_clk1_lpcg_clkext_aud_mclk0ext_aud_mclk1esai0_rx_clkesai0_rx_hf_clkesai0_tx_clkesai0_tx_hf_clkspdif0_rxsai0_rx_bclksai0_tx_bclksai1_rx_bclksai1_tx_bclksai2_rx_bclksai3_rx_bclksai4_rx_bclkclock-controller@59c000002fsl,imx8qxp-lpcgY!asrc1_lpcg_ipg_clk *clock-controller@59c200002fsl,imx8qxp-lpcgY !!sai4_lpcg_mclksai4_lpcg_ipg_clk ,clock-controller@59c300002fsl,imx8qxp-lpcgY !!sai5_lpcg_mclksai5_lpcg_ipg_clk -clock-controller@59c400002fsl,imx8qxp-lpcgY!amix_lpcg_ipg_clk .clock-controller@59c500002fsl,imx8qxp-lpcgY !!mqs0_lpcg_mclkmqs0_lpcg_ipg_clk 1clock-dma-ipg 2fixed-clock' dma_ipg_clkPbus@5a000000 2simple-bus KZZspi@5a0000002fsl,imx7ulp-spiZ  @PBBperipg w5 5 CCtxrx Ydisabledspi@5a0100002fsl,imx7ulp-spiZ  @QDDperipg w6 6 CCtxrxYokaydefault)EoFFspi@5a0200002fsl,imx7ulp-spiZ  @RGGperipg w7 7 CCtxrx Ydisabledspi@5a0300002fsl,imx7ulp-spiZ  @SHHperipg w8 8 CCtxrx Ydisabledserial@5a060000Z @YII ipgbaud w9Ĵ 9rxtx CC Yokay2fsl,imx8qxp-lpuartdefault)Jserial@5a070000Z @ZKK ipgbaud w:Ĵ :rxtx C C  Ydisabled2fsl,imx8qxp-lpuartserial@5a080000Z @[LL ipgbaud w;Ĵ ;rxtx C C  Ydisabled2fsl,imx8qxp-lpuartserial@5a090000Z  @\MM ipgbaud w<Ĵ <rxtx CCYokay2fsl,imx8qxp-lpuartdefault)Npwm@5a1900002fsl,imx8qxp-pwmfsl,imx27-pwmZ @OOipgper wn6x dma-controller@5a1f00002fsl,imx8qm-edmaZ3>@              Cclock-controller@5a4000002fsl,imx8qxp-lpcgZ@5P spi0_lpcg_clkspi0_lpcg_ipg_clk 5Bclock-controller@5a4100002fsl,imx8qxp-lpcgZA6P spi1_lpcg_clkspi1_lpcg_ipg_clk 6Dclock-controller@5a4200002fsl,imx8qxp-lpcgZB7P spi2_lpcg_clkspi2_lpcg_ipg_clk 7Gclock-controller@5a4300002fsl,imx8qxp-lpcgZC8P spi3_lpcg_clkspi3_lpcg_ipg_clk 8Hclock-controller@5a4600002fsl,imx8qxp-lpcgZF9P'uart0_lpcg_baud_clkuart0_lpcg_ipg_clk 9Iclock-controller@5a4700002fsl,imx8qxp-lpcgZG:P'uart1_lpcg_baud_clkuart1_lpcg_ipg_clk :Kclock-controller@5a4800002fsl,imx8qxp-lpcgZH;P'uart2_lpcg_baud_clkuart2_lpcg_ipg_clk ;Lclock-controller@5a4900002fsl,imx8qxp-lpcgZI<P'uart3_lpcg_baud_clkuart3_lpcg_ipg_clk <Mclock-controller@5a5900002fsl,imx8qxp-lpcgZYP(adma_pwm_lpcg_clkadma_pwm_lpcg_ipg_clk Oi2c@5a800000Z@  @QQperipg w`n6 `Yokay$2fsl,imx8qxp-lpi2cfsl,imx7ulp-lpi2c defaultgpio)RS T Ttemperature-sensor@1b2nxp,se97bjedec,jc-42.4-tempeeprom@50 2atmel,24c64P Urtc@512nxp,pcf85063aQdefault)VXW@eeprom@532nxp,se97batmel,24c02SUclock-generator@6a2renesas,9fgv0241jXaudio-codec@182ti,tlv320aic32x4YmclkZUeeprom@57 2atmel,24c32W Ui2c@5a810000Z@  @[[peripg wan6 a Ydisabled$2fsl,imx8qxp-lpi2cfsl,imx7ulp-lpi2ci2c@5a820000Z@  @\\peripg wbn6 b Ydisabled$2fsl,imx8qxp-lpi2cfsl,imx7ulp-lpi2ci2c@5a830000Z@  @]]peripg wcn6 c Ydisabled$2fsl,imx8qxp-lpi2cfsl,imx7ulp-lpi2cadc@5a8800002nxp,imx8qxp-adcZ @^^peripg wen6 e Ydisabledadc@5a8900002nxp,imx8qxp-adcZ @__peripg wfn6 f Ydisabledcan@5a8d00002fsl,imx8qm-flexcanZ @``ipgper wibZ i Ydisabledcan@5a8e00002fsl,imx8qm-flexcanZ @``ipgper wibZ jYokaydefault)aUcan@5a8f00002fsl,imx8qm-flexcanZ @``ipgper wibZ kYokaydefault)bUdma-controller@5a9f00002fsl,imx8qm-edmaZ 3>`@@        clock-controller@5ac000002fsl,imx8qxp-lpcgZ`P i2c0_lpcg_clki2c0_lpcg_ipg_clk `Qclock-controller@5ac100002fsl,imx8qxp-lpcgZaP i2c1_lpcg_clki2c1_lpcg_ipg_clk a[clock-controller@5ac200002fsl,imx8qxp-lpcgZbP i2c2_lpcg_clki2c2_lpcg_ipg_clk b\clock-controller@5ac300002fsl,imx8qxp-lpcgZcP i2c3_lpcg_clki2c3_lpcg_ipg_clk c]clock-controller@5ac800002fsl,imx8qxp-lpcgZeP adc0_lpcg_clkadc0_lpcg_ipg_clk e^clock-controller@5ac900002fsl,imx8qxp-lpcgZfP adc1_lpcg_clkadc1_lpcg_ipg_clk f_clock-controller@5acd00002fsl,imx8qxp-lpcgZiPP 5can0_lpcg_pe_clkcan0_lpcg_ipg_clkcan0_lpcg_chi_clk i`clock-conn-axi 2fixed-clockCU conn_axi_clkclock-conn-ahb 2fixed-clock ! conn_ahb_clkclock-conn-ipg 2fixed-clock conn_ipg_clkclock-conn-bch 2fixed-clockׄ conn_bch_clkbus@5b000000 2simple-bus K[[usb@5b0d0000-2fsl,imx7ulp-usbfsl,imx6ul-usbfsl,imx27-usb[  @ -c8deDUi Yokaydefault)f}otgusbmisc@5b0d020082fsl,imx7ulp-usbmiscfsl,imx7d-usbmiscfsl,imx6q-usbmisc[ dusbphy@5b100000&2fsl,imx8qxp-usbphyfsl,imx7ulp-usbphy[e Yokaycmmc@5b010000 @[ggg ipgahbper Yokay"2fsl,imx8qxp-usdhcfsl,imx7d-usdhc"defaultstate_100mhzstate_200mhz)hijkl !mmc@5b020000 @[mmm ipgahbper )>Yokay"2fsl,imx8qxp-usdhcfsl,imx7d-usdhc"defaultstate_100mhzstate_200mhz)nopoqo Nr Wrs`i!mmc@5b030000 @[ttt ipgahbper  Ydisabled"2fsl,imx8qxp-usdhcfsl,imx7d-usdhcethernet@5b040000[0@ uuu uipgahbenet_clk_refptpw沀sY@p Yokay.2fsl,imx8qxp-fecfsl,imx8qm-fecfsl,imx6sx-fecdefault)v rgmii-idwmdio ethernet-phy@02ethernet-phy-ieee802.3-c22default)x   -T9 IP[y@wethernet-phy@32ethernet-phy-ieee802.3-c22default)z   -F9 IP[y@}ethernet@5b050000[0@ {{{ {ipgahbenet_clk_refptpw沀sY@p Yokay.2fsl,imx8qxp-fecfsl,imx8qm-fecfsl,imx6sx-fecdefault)| rgmii-id}usb@5b1100002fsl,imx8qm-usb3[ K(~~~~~lpmbusaclkipgcore w沀 Yokayusb@5b120000 2cdns,usb3[[[ qotgxhcidev0@{hostperipheralotgwakeupcdns3,usb3-phyYokayhostusb-phy@5b1600002nxp,salvo-phy[~salvo_phy_clk Yokayclock-controller@5b2000002fsl,imx8qxp-lpcg[  9sdhc0_lpcg_per_clksdhc0_lpcg_ipg_clksdhc0_lpcg_ahb_clk gclock-controller@5b2100002fsl,imx8qxp-lpcg[! 9sdhc1_lpcg_per_clksdhc1_lpcg_ipg_clksdhc1_lpcg_ahb_clk mclock-controller@5b2200002fsl,imx8qxp-lpcg[" 9sdhc2_lpcg_per_clksdhc2_lpcg_ipg_clksdhc2_lpcg_ahb_clk tclock-controller@5b2300002fsl,imx8qxp-lpcg[#0 enet0_lpcg_timer_clkenet0_lpcg_txc_sampling_clkenet0_lpcg_ahb_clkenet0_lpcg_rgmii_txc_clkenet0_lpcg_ipg_clkenet0_lpcg_ipg_s_clk uclock-controller@5b2400002fsl,imx8qxp-lpcg[$0 enet1_lpcg_timer_clkenet1_lpcg_txc_sampling_clkenet1_lpcg_ahb_clkenet1_lpcg_rgmii_txc_clkenet1_lpcg_ipg_clkenet1_lpcg_ipg_s_clk {clock-controller@5b2700002fsl,imx8qxp-lpcg['"usboh3_ahb_clkusboh3_phy_ipg_clk eclock-controller@5b2800002fsl,imx8qxp-lpcg[(0Musb3_app_clkusb3_lpm_clkusb3_ipg_clkusb3_core_pclkusb3_phy_clkusb3_aclk ~clock-controller@5b2900002fsl,imx8qxp-lpcg[)   'gpmi_bchgpmi_iogpmi_apbgpmi_bch_apb  clock-controller@5b2900042fsl,imx8qxp-lpcg[) apbhdma_hclk  dma-controller@5b810000(2fsl,imx8qxp-dma-apbhfsl,imx28-dma-apbh[ 0@3>  nand-controller@5b8120002fsl,imx8qxp-gpmi-nand[ [@ qgpmi-nandbch  @{bch 'gpmi_iogpmi_apbgpmi_bchgpmi_bch_apbrx-tx   w  Ydisabledbus@5c000000 2simple-bus K\\ddr-pmu@5c0200002fsl,imx8-ddr-pmu\ @clock-lsio-bus 2fixed-clock lsio_bus_clkbus@5d000000 2simple-bus  K]]pwm@5d0000002fsl,imx27-pwm]ipgper wn6x @^ Ydisabledpwm@5d0100002fsl,imx27-pwm]ipgper wn6x @_ Ydisabledpwm@5d0200002fsl,imx27-pwm]ipgper wn6x @` Ydisabledpwm@5d0300002fsl,imx27-pwm]ipgper wn6x @a Ydisabledgpio@5d080000] @+  2fsl,imx8qxp-gpiofsl,imx35-gpioP8 EKPRdefault)pLIDSLEEPCHARGING#CHGPRSNT#BATLOW#SMARC_GPIO6SMARC_GPIO5PHY3 RST#SPI0_CS0SPI0_CS1Fgpio@5d090000]  @+  2fsl,imx8qxp-gpiofsl,imx35-gpio0Y ctdefault)LCD1_BLKT_ENLCD1_VDD_ENLCD0_BLKT_ENLCD0_VDD_ENSMARC_GPIO0SMARC_GPIO1SMARC_GPIO2SMARC_GPIO3SMARC_GPIO8SMARC_GPIO7SMARC_GPIO10SMARC_GPIO9SMARC_GPIO4ygpio@5d0a0000]  @+  2fsl,imx8qxp-gpiofsl,imx35-gpio0{~(RTC_INT#Wgpio@5d0b0000]  @+  2fsl,imx8qxp-gpiofsl,imx35-gpio0 )PHY0_RST#Tgpio@5d0c0000]  @+  2fsl,imx8qxp-gpiofsl,imx35-gpio  %[PCIE_PERST#PCIE_WAKE#USB_OTG1_PWRSDIO_PWR_ENSDIO_WPSDIO_CD#rgpio@5d0d0000]  @+  2fsl,imx8qxp-gpiofsl,imx35-gpio0(, 3gpio@5d0e0000] @+  2fsl,imx8qxp-gpiofsl,imx35-gpiogpio@5d0f0000] @+  2fsl,imx8qxp-gpiofsl,imx35-gpiospi@5d120000 2nxp,imx8qxp-fspi]qfspi_basefspi_mmap @\ fspi_enfspi Yokaydefault)flash@02jedec,spi-norpartitions2fixed-partitions mailbox@5d1b0000] @ Ydisabled2fsl,imx8qxp-mufsl,imx6sx-mumailbox@5d1c0000] @-2fsl,imx8-mu-scufsl,imx8qxp-mufsl,imx6sx-mumailbox@5d1d0000] @ Ydisabled-2fsl,imx8-mu-scufsl,imx8qxp-mufsl,imx6sx-mumailbox@5d1e0000] @ Ydisabled-2fsl,imx8-mu-scufsl,imx8qxp-mufsl,imx6sx-mumailbox@5d1f0000] @ Ydisabled-2fsl,imx8-mu-scufsl,imx8qxp-mufsl,imx6sx-mumailbox@5d200000]  @  Ydisabled2fsl,imx8qxp-mufsl,imx6sx-mumailbox@5d210000]! @  Ydisabled2fsl,imx8qxp-mufsl,imx6sx-mumailbox@5d280000]( @ 2fsl,imx8qxp-mufsl,imx6sx-mu)clock-controller@5d4000002fsl,imx8qxp-lpcg]@4hpwm0_lpcg_ipg_clkpwm0_lpcg_ipg_hf_clkpwm0_lpcg_ipg_s_clkpwm0_lpcg_ipg_slv_clkpwm0_lpcg_ipg_mstr_clk clock-controller@5d4100002fsl,imx8qxp-lpcg]A4hpwm1_lpcg_ipg_clkpwm1_lpcg_ipg_hf_clkpwm1_lpcg_ipg_s_clkpwm1_lpcg_ipg_slv_clkpwm1_lpcg_ipg_mstr_clk clock-controller@5d4200002fsl,imx8qxp-lpcg]B4hpwm2_lpcg_ipg_clkpwm2_lpcg_ipg_hf_clkpwm2_lpcg_ipg_s_clkpwm2_lpcg_ipg_slv_clkpwm2_lpcg_ipg_mstr_clk clock-controller@5d4300002fsl,imx8qxp-lpcg]C4hpwm3_lpcg_ipg_clkpwm3_lpcg_ipg_hf_clkpwm3_lpcg_ipg_s_clkpwm3_lpcg_ipg_slv_clkpwm3_lpcg_ipg_mstr_clk clock-controller@5d4400002fsl,imx8qxp-lpcg]D4hpwm4_lpcg_ipg_clkpwm4_lpcg_ipg_hf_clkpwm4_lpcg_ipg_s_clkpwm4_lpcg_ipg_slv_clkpwm4_lpcg_ipg_mstr_clk clock-controller@5d4500002fsl,imx8qxp-lpcg]E4hpwm5_lpcg_ipg_clkpwm5_lpcg_ipg_hf_clkpwm5_lpcg_ipg_s_clkpwm5_lpcg_ipg_slv_clkpwm5_lpcg_ipg_mstr_clk clock-controller@5d4600002fsl,imx8qxp-lpcg]F4hpwm6_lpcg_ipg_clkpwm6_lpcg_ipg_hf_clkpwm6_lpcg_ipg_s_clkpwm6_lpcg_ipg_slv_clkpwm6_lpcg_ipg_mstr_clk clock-controller@5d4700002fsl,imx8qxp-lpcg]G4hpwm7_lpcg_ipg_clkpwm7_lpcg_ipg_hf_clkpwm7_lpcg_ipg_s_clkpwm7_lpcg_ipg_slv_clkpwm7_lpcg_ipg_mstr_clk clock-hsio-axi 2fixed-clockׄ hsio_axi_clkclock-hsio-per 2fixed-clockU hsio_per_clkclock-hsio-refa2gpio-gate-clock (rclock-hsio-refb2gpio-gate-clock (rclock-xtal100m 2fixed-clock xtal_100MHzbus@5f000000 2simple-bus K__p 5pcie@5f0100002fsl,imx8q-pcie_ qdbiconfig0K@fh{msidma  dbimstrslv@ pciJijklXku  Ydisabledpcie-ep@5f0100002fsl,imx8q-pcie-ep_qdbiaddr_spacek @h{dma dbimstrslv  Ydisabledclock-controller@5f0600002fsl,imx8qxp-lpcg_  Fhsio_pcieb_mstr_axi_clkhsio_pcieb_slv_axi_clkhsio_pcieb_dbi_axi_clk clock-controller@5f0b00002fsl,imx8qxp-lpcg_ hsio_phyx1_per_clk clock-controller@5f0d00002fsl,imx8qxp-lpcg_ hsio_pcieb_per_clk clock-controller@5f0f00002fsl,imx8qxp-lpcg_hsio_misc_per_clk clock-controller@5f0900002fsl,imx8qxp-lpcg_ Qhsio_phyx1_pclkhsio_phyx1_epcs_tx_clkhsio_phyx1_epcs_rx_clkhsio_phyx1_apb_clk phy@5f1a00002fsl,imx8qxp-hsio ____qregphyctrlmisc(+pclk0apb_pclk0phy0_crrctl0_crrmisc_crr  Ydisabledmemory@80000000 memory@clk-xtal25 2fixed-clock}x@Xregulator-3v32regulator-fixed3V32Z2ZUregulator-lvds02regulator-fixeddefault) LCD0_VDD_EN2Z2Z y regulator-lvds12regulator-fixeddefault) LCD1_VDD_EN2Z2Z y regulator-sdvmmc2regulator-fixeddefault) SD1_VMMC2Z2Z r Yokay  @sregulator-vmmc2regulator-fixed MMC0_3V32Z2Zkregulator-vqmmc2regulator-fixed MMC0_1V8w@w@lbacklight-lvds02pwm-backlightdefault) . @ @ Y (y Ydisabledbacklight-lvds12pwm-backlightdefault) . @ @ Y (y Ydisabledchosen f/bus@5a000000/serial@5a060000panel-lvds0 r Y Ydisabledportendpointpanel-lvds1 r Y Ydisabledportendpointregulator-1v82regulator-fixed1V8w@w@Zregulator-12v02regulator-fixed12V0sound2fsl,imx-audio-tlv320aic32x4,tqm-tlv320aic32 |  interrupt-parent#address-cells#size-cellsmodelcompatibleethernet0ethernet1gpio0gpio1gpio2gpio3gpio4gpio5gpio6gpio7i2c0i2c1i2c2i2c3mmc0mmc1mmc2mu0mu1mu2mu3mu4serial0serial1serial2serial3spi0spi1spi2spi3vpu-core0vpu-core1rtc0rtc1device_typeregenable-methodi-cache-sizei-cache-line-sizei-cache-setsd-cache-sized-cache-line-sized-cache-setsnext-level-cacheclocksoperating-points-v2#cooling-cellsphandlecache-levelcache-unifiedopp-sharedopp-hzopp-microvoltclock-latency-nsopp-suspend#interrupt-cellsinterrupt-controllerinterruptsrangesno-mapstatusreusablealloc-rangeslinux,cma-defaultmbox-namesmboxes#power-domain-cells#clock-cellsfsl,pinslinux,keycodestimeout-sec#thermal-sensor-cellsclock-frequencyclock-output-namespolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresistripcooling-deviceassigned-clocksassigned-clock-ratespower-domainsclock-indices#mbox-cellsmemory-regionclock-namesdmasdma-namesfsl,asrc-ratefsl,asrc-widthfsl,asrc-clk-mappinctrl-namespinctrl-0#dma-cellsdma-channelsdma-channel-maskfirmware-namedaiscs-gpios#pwm-cellspinctrl-1scl-gpiossda-gpiospagesizevcc-supplyquartz-load-femtofaradsread-onlyiov-supplyldoin-supply#io-channel-cellsfsl,clk-sourcefsl,scu-indexxceiver-supplyfsl,usbphyfsl,usbmiscahb-burst-configtx-burst-size-dwordrx-burst-size-dwordsrp-disablehnp-disableadp-disablepower-active-highover-current-active-lowdr_mode#index-cellspinctrl-2vmmc-supplyvqmmc-supplybus-widthnon-removableno-sdno-sdiofsl,tuning-start-tapfsl,tuning-stepcd-gpioswp-gpiosno-1-8-vno-mmcfsl,num-tx-queuesfsl,num-rx-queuesphy-modephy-handlefsl,magic-packetmac-addressti,rx-internal-delayti,tx-internal-delayti,fifo-depthti,dp83867-rxctrl-strap-quirkti,clk-output-selreset-gpiosreset-assert-usreset-deassert-usenet-phy-lane-no-swapreg-namesinterrupt-namesphysphy-namescdns,on-chip-buff-size#phy-cellsgpio-controller#gpio-cellsgpio-rangesgpio-line-namesspi-max-frequencyspi-tx-bus-widthspi-rx-bus-widthenable-gpiosdma-rangesbus-rangeinterrupt-mapinterrupt-map-masknum-lanesnum-viewportfsl,max-link-speednum-ib-windowsnum-ob-windowsregulator-nameregulator-min-microvoltregulator-max-microvoltregulator-always-ongpioenable-active-highoff-on-delay-usbrightness-levelsdefault-brightness-levelpower-supplystdout-pathbacklightssi-controlleraudio-codec