A;8>('=7yuridenki,kakiprenesas,r9a09g057h48renesas,r9a09g057 3&Yuridenki-Shokai Kakip Board based on r9a09g057h48audio-clk fixed-clock,9Iopp-table-0operating-points-v2Iopp-1700000000QeSX fopp-850000000Q2X 5fopp-425000000QT@X 5fopp-212500000Q ~ X 5fwcpus cpu@0arm,cortex-a55cpupsci cpu@100arm,cortex-a55cpupsci cpu@200arm,cortex-a55cpupsci cpu@300arm,cortex-a55cpupsci cache-controller-0cacheIopp-table-1operating-points-v2I opp-630000000Q% X 5opp-315000000QƄX 5opp-157500000Q cB`X 5opp-78750000Q0X 5opp-19687500Q,hLX 5psciarm,psci-1.0arm,psci-0.2smcqextal-clk fixed-clock,9n6I rtxin-clk fixed-clock,9Isoc simple-bus interrupt-controller@10400000renesas,r9a09g057-icu@  0       ;nmiport_irq0port_irq1port_irq2port_irq3port_irq4port_irq5port_irq6port_irq7port_irq8port_irq9port_irq10port_irq11port_irq12port_irq13port_irq14port_irq15tint0tint1tint2tint3tint4tint5tint6tint7tint8tint9tint10tint11tint12tint13tint14tint15tint16tint17tint18tint19tint20tint21tint22tint23tint24tint25tint26tint27tint28tint29tint30tint31int-ca55-0int-ca55-1int-ca55-2int-ca55-3icu-error-ca55gpt-u0-gtciadagpt-u0-gtciadbgpt-u1-gtciadagpt-u1-gtciadb KY6Ipinctrl@10410000renesas,r9a09g057-pinctrlA `p|` KYIscifSCIF_RXDSCIF_TXDI sd0-pwr-en-hogQ sd0_pwr_ensd0I sd0-clkSD0CLKsd0-data'SD0DAT0SD0DAT1SD0DAT2SD0DAT3SD0CMDsd0-muxUclock-controller@10420000renesas,r9a09g057-cpgB  audio_extalrtxinqextal,Isystem-controller@10430000renesas,r9a09g057-sysC Y0dma-controller@11400000renesas,r9a09g057-dmac@0YZ[\]^_`abcdefghL;errorch0ch1ch2ch3ch4ch5ch6ch7ch8ch9ch10ch11ch12ch13ch14ch15 KY1!.dma-controller@14830000renesas,r9a09g057-dmac0 !"#$%&'(L;errorch0ch1ch2ch3ch4ch5ch6ch7ch8ch9ch10ch11ch12ch13ch14ch15 KY2!.dma-controller@14840000renesas,r9a09g057-dmac0)*+,-./012345678L;errorch0ch1ch2ch3ch4ch5ch6ch7ch8ch9ch10ch11ch12ch13ch14ch15 KY3!.dma-controller@12000000renesas,r9a09g057-dmac09:;<=>?@ABCDEFGHL;errorch0ch1ch2ch3ch4ch5ch6ch7ch8ch9ch10ch11ch12ch13ch14ch15 KY4!.dma-controller@12010000renesas,r9a09g057-dmac0IJKLMNOPQRSTUVWXL;errorch0ch1ch2ch3ch4ch5ch6ch7ch8ch9ch10ch11ch12ch13ch14ch15 KY5!.timer@11800000$renesas,r9a09g057-ostmrenesas,ostm 0 CYmK:okaytimer@11801000$renesas,r9a09g057-ostmrenesas,ostm 0 DYnK:okaytimer@14000000$renesas,r9a09g057-ostmrenesas,ostm 0 EYoK:okaytimer@14001000$renesas,r9a09g057-ostmrenesas,ostm 0 FYpK:okaytimer@12c00000$renesas,r9a09g057-ostmrenesas,ostm 0 GYqK:okaytimer@12c01000$renesas,r9a09g057-ostmrenesas,ostm 0 HYrK:okaytimer@12c02000$renesas,r9a09g057-ostmrenesas,ostm  0 IYsK:okaytimer@12c03000$renesas,r9a09g057-ostmrenesas,ostm0 0 JYtK:okaywatchdog@11c00400renesas,r9a09g057-wdtKL pclkoscclkYuK :disabledwatchdog@14400000renesas,r9a09g057-wdt@MN pclkoscclkYvK :disabledwatchdog@13000000renesas,r9a09g057-wdtOP pclkoscclkYwK :disabledwatchdog@13000400renesas,r9a09g057-wdtQR pclkoscclkYxK :disabledserial@11c01400renesas,scif-r9a09g057l02;erirxitxibridriteitei-drirxi-edgetxi-edge fckKY:okayA Kdefaulti2c@14400400renesas,riic-r9a09g057@`0 ;teiritispistinakialitmoi YK  :disabledi2c@14400800renesas,riic-r9a09g057@`0 ;teiritispistinakialitmoi YK  :disabledi2c@14400c00renesas,riic-r9a09g057@ `0 ;teiritispistinakialitmoi YK  :disabledi2c@14401000renesas,riic-r9a09g057@`0 ;teiritispistinakialitmoi YK  :disabledi2c@14401400renesas,riic-r9a09g057@`0 ;teiritispistinakialitmoi YK  :disabledi2c@14401800renesas,riic-r9a09g057@`0 ;teiritispistinakialitmoi YK  :disabledi2c@14401c00renesas,riic-r9a09g057@`0 ;teiritispistinakialitmoi YK  :disabledi2c@14402000renesas,riic-r9a09g057@ `0  ;teiritispistinakialitmoi YK  :disabledi2c@11c01000renesas,riic-r9a09g057`0   ;teiritispistinakialitmoi YK  :disabledgpu@14850000(renesas,r9a09g057-maliarm,mali-bifrost00tusv;jobmmugpuevent$gpubusbus_aceKYYrstaxi_rstace_rst  :disabledinterrupt-controller@14900000 arm,gic-v3    0 Immc@15c00000renesas,sdhi-r9a09g05700coreclkhcdaclkYK:okayA Kdefaulte q~vqmmc-regulator SDHI0-VQMMCw@2Z :disabledmmc@15c10000renesas,sdhi-r9a09g05700coreclkhcdaclkYK :disabledvqmmc-regulator SDHI1-VQMMCw@2Z :disabledmmc@15c20000renesas,sdhi-r9a09g05700coreclkhcdaclkYK :disabledvqmmc-regulator SDHI2-VQMMCw@2Z :disabledtimerarm,armv8-timerP    %;sec-physphysvirthyp-physhyp-virtaliases/soc/serial@11c01400/soc/mmc@15c00000chosenserial0:115200n8memory@48000000memoryHregulator-3v3regulator-fixed fixed-3.3V2Z2ZI regulator-vccq-sdhi0regulator-gpio SDHI0 VccQ Pw@2Z 2Zw@I compatible#address-cells#size-cellsmodel#clock-cellsclock-frequencyphandleopp-hzopp-microvoltclock-latency-nsopp-suspendregdevice_typenext-level-cacheenable-methodclocksoperating-points-v2cache-unifiedcache-sizecache-levelinterrupt-parentranges#interrupt-cellsinterrupt-controllerinterruptsinterrupt-namespower-domainsresetsgpio-controller#gpio-cellsgpio-rangespinsgpio-hoggpiosoutput-highline-namerenesas,output-impedanceslew-rateinput-enablepinmuxclock-names#reset-cells#power-domain-cells#dma-cellsdma-channelsrenesas,icustatuspinctrl-0pinctrl-namesreset-namesvmmc-supplyvqmmc-supplybus-widthregulator-nameregulator-min-microvoltregulator-max-microvoltinterrupts-extendedserial0mmc0stdout-pathregulator-boot-onregulator-always-ongpios-states