8~T(~Storopack SMEGW01 board"!storopack,imx7d-smegw01fsl,imx7dchosen4,/soc/bus@30800000/spba-bus@30800000/serial@30860000aliases 8/soc/bus@30000000/gpio@30200000 >/soc/bus@30000000/gpio@30210000 D/soc/bus@30000000/gpio@30220000 J/soc/bus@30000000/gpio@30230000 P/soc/bus@30000000/gpio@30240000 V/soc/bus@30000000/gpio@30250000 \/soc/bus@30000000/gpio@30260000b/soc/bus@30800000/i2c@30a20000g/soc/bus@30800000/i2c@30a30000l/soc/bus@30800000/i2c@30a40000q/soc/bus@30800000/i2c@30a50000v/soc/bus@30800000/mmc@30b40000{/soc/bus@30800000/mmc@30b60000/soc/bus@30800000/mmc@30b500004/soc/bus@30800000/spba-bus@30800000/serial@308600004/soc/bus@30800000/spba-bus@30800000/serial@308900004/soc/bus@30800000/spba-bus@30800000/serial@30880000"/soc/bus@30800000/serial@30a60000"/soc/bus@30800000/serial@30a70000"/soc/bus@30800000/serial@30a80000"/soc/bus@30800000/serial@30a900001/soc/bus@30800000/spba-bus@30800000/spi@308200001/soc/bus@30800000/spba-bus@30800000/spi@308300001/soc/bus@30800000/spba-bus@30800000/spi@30840000/soc/bus@30400000/spi@30630000/soc/bus@30800000/usb@30b10000/soc/bus@30800000/usb@30b20000/soc/bus@30800000/usb@30b30000$/soc/bus@30800000/ethernet@30be0000$/soc/bus@30800000/ethernet@30bf0000&/soc/bus@30800000/i2c@30a30000/rtc@52,/soc/bus@30000000/snvs@30370000/snvs-rtc-lpcpusidle-statespscicpu-sleep-wait!arm,idle-state "3dD2Tecpu@0!arm,cortex-a7mcpuy};] speed_gradeecpu@1!arm,cortex-a7mcpuy};]eGopp-table!operating-points-v2eopp-792000000/4 B@~I &opp-996000000;] I &opp-1200000000G (OI&clock-cki !fixed-clock2}?ckileclock-osc !fixed-clock2}n6?osce usbphynop1!usb-nop-xceiv Rmain_clk^e2usbphynop3!usb-nop-xceivn Rmain_clki^e6pmu!arm,cortex-a7-pmuw \replicator !arm,coresight-static-replicatorout-portsport@0yendpointeport@1yendpoint ein-portsportendpoint etimer!arm,armv7-timerw 0   csi-mux !video-mux  disabledport@0yport@1yendpoint e'port@2yendpointe$soc !simple-buswsram@900000 !mmio-sramy funnel@30041000+!arm,coresight-dynamic-funnelarm,primecelly0J Rapb_pclkin-portsport@0yendpointeport@1yendpointeHout-portsportendpointeetm@3007c000"!arm,coresight-etm3xarm,primecelly0J Rapb_pclkout-portsportendpointefunnel@30083000+!arm,coresight-dynamic-funnelarm,primecelly00J Rapb_pclkin-portsport@0yendpointeport@1yendpointout-portsportendpointeetf@30084000 !arm,coresight-tmcarm,primecelly0@J Rapb_pclkin-portsportendpointeout-portsportendpointe etr@30086000 !arm,coresight-tmcarm,primecelly0`J Rapb_pclkin-portsportendpointe tpiu@30087000!!arm,coresight-tpiuarm,primecelly0pJ Rapb_pclkin-portsportendpointeinterrupt-controller@31001000!arm,cortex-a7-gic   w  y11 1@ 1` e bus@30000000!fsl,aips-bussimple-busy0@gpio@30200000!fsl,imx7d-gpiofsl,imx35-gpioy0 @A/  ;eRgpio@30210000!fsl,imx7d-gpiofsl,imx35-gpioy0!BC/ ; e1gpio@30220000!fsl,imx7d-gpiofsl,imx35-gpioy0"DE/ ;-gpio@30230000!fsl,imx7d-gpiofsl,imx35-gpioy0#FG/ ;Je)gpio@30240000!fsl,imx7d-gpiofsl,imx35-gpioy0$HI/ ;be9gpio@30250000!fsl,imx7d-gpiofsl,imx35-gpioy0%JK/ ;teNgpio@30260000!fsl,imx7d-gpiofsl,imx35-gpioy0&LM/ ;eLwatchdog@30280000!fsl,imx7d-wdtfsl,imx21-wdty0( NBGdefaultU_okaywatchdog@30290000!fsl,imx7d-wdtfsl,imx21-wdty0) O disabledwatchdog@302a0000!fsl,imx7d-wdtfsl,imx21-wdty0*   disabledwatchdog@302b0000!fsl,imx7d-wdtfsl,imx21-wdty0+ m disabledpinctrl@302c0000!fsl,imx7d-iomuxc-lpsry0,tewdoggrp0tetimer@302d0000!fsl,imx7d-gptfsl,imx6dl-gpty0- 7..Ripgpertimer@302e0000!fsl,imx7d-gptfsl,imx6dl-gpty0. 622Ripgper disabledtimer@302f0000!fsl,imx7d-gptfsl,imx6dl-gpty0/ 566Ripgper disabledtimer@30300000!fsl,imx7d-gptfsl,imx6dl-gpty00 4::Ripgper disabledkeypad@30320000!fsl,imx7d-kppfsl,imx21-kppy02 P disabledpinctrl@30330000!fsl,imx7d-iomuxcy03eecspi1grp`th$l,p(e(enet1grpP<,048@TDHLPXth xe?enet2grp8xtx| peDi2c2grp0P@T@e/flexcan1grp0$|(e-flexcan2grp0,0e.lteongrp\pYeKltenresetgrp$pYeMrfkillgrp`pYePrtcintgrpppYe0uart1grp0,t(|e*uart3grp0<|8te+usbotg1grp@,e4usbotg1-pwrgrpDusbotg1-pwr-gpiogrpDeQusbotg2grp@(\eCusdhc1grpYY YYYYe8usdhc2grp(,Y0Y4Y8Y<Ye:usdhc3grpD]@H]L]P]T]X]\]`]d]he<usdhc3-100mhzgrpD^@H^L^P^T^X^\^`^d^he=usdhc3-200mhzgrpD_@H_L_P_T_X_\_`_d_he>wifigrp0$eOiomuxc-gpr@30340000<!fsl,imx7d-iomuxc-gprfsl,imx6q-iomuxc-gprsysconsimple-mfdy04e,mux-controller !mmio-muxe efuse@30350000!fsl,imx7d-ocotpsyscony05calib@3cy<efuse-grade@10yeanatop@303600004!fsl,imx7d-anatopfsl,imx6q-anatopsysconsimple-mfdy0613eregulator-vdd1p0d!fsl,anatop-regulatorvdd1p0d 5O': 5MO`e!regulator-vdd1p2!fsl,anatop-regulatorvdd1p2  ':M `e"tempmon!fsl,imx7d-tempmonw 1rcalibtemp_grade~snvs@30370000#!fsl,sec-v4.0-monsysconsimple-mfdy07esnvs-rtc-lp!fsl,sec-v4.0-mon-rtc-lp4 Rsnvs-rtcsnvs-poweroff!syscon-poweroff8`` disabledsnvs-powerkey!fsl,sec-v4.0-pwrkey  Rsnvs-pwrkeyt disabledclock-controller@30380000!fsl,imx7d-ccmy08UV2  Rckiloscereset-controller@30390000!fsl,imx7d-srcsyscony09 Ye&gpc@303a0000!fsl,imx7d-gpcy0:  Ww epgcpower-domain@0y!e%power-domain@1y!eIpower-domain@2y"ebus@30400000!fsl,aips-bussimple-busy0@@adc@30610000!fsl,imx7d-adcy0a bRadc disabledadc@30620000!fsl,imx7d-adcy0b cRadc disabledspi@30630000 !fsl,imx7d-ecspifsl,imx51-ecspiy0c "  Ripgperrxtx  ## disabledpwm@30640000!fsl,vf610-ftm-pwmy0d 'Rftm_sysftm_extftm_fixftm_cnt_clk_en  disabledpwm@30650000!fsl,vf610-ftm-pwmy0e 'Rftm_sysftm_extftm_fixftm_cnt_clk_en """" disabledpwm@30660000!fsl,imx7d-pwmfsl,imx27-pwmy0f QRipgper disabledpwm@30670000!fsl,imx7d-pwmfsl,imx27-pwmy0g RRipgper disabledpwm@30680000!fsl,imx7d-pwmfsl,imx27-pwmy0h SRipgper disabledpwm@30690000!fsl,imx7d-pwmfsl,imx27-pwmy0i TRipgper disabledcsi@30710000 !fsl,imx7-csiy0q FRmclk disabledportendpoint$elcdif@30730000!!fsl,imx7d-lcdiffsl,imx6sx-lcdify0s ~~Rpixaxi disabledmipi-csi@30750000!fsl,imx7-mipi-csi2y0u Rpclkwrapphyi%!'& disabledportsport@0yport@1yendpoint'e dsi@30760000)!fsl,imx7d-mipi-dsimfsl,imx8mm-mipi-dsimy0vRbus_clksclk_mipi.>U-@i% )j51-n6 disabledpcie-phy@306d0000!fsl,imx7d-pcie-phyy0m disabledeJpxp@30700000!fsl,imx7d-pxpy0p.Raxibus@30800000!fsl,aips-bussimple-busy0@spba-bus@30800000!fsl,spba-bussimple-busy0spi@30820000 !fsl,imx7d-ecspifsl,imx51-ecspiy0 Ripgperrxtx  ##okayGdefaultU( )sram@0!microchip,48l640y$spi@30830000 !fsl,imx7d-ecspifsl,imx51-ecspiy0  Ripgperrxtx  ## disabledspi@30840000 !fsl,imx7d-ecspifsl,imx51-ecspiy0 !Ripgperrxtx  ## disabledserial@30860000!fsl,imx7d-uartfsl,imx6q-uarty0 RipgperokayGdefaultU*serial@30890000!fsl,imx7d-uartfsl,imx6q-uarty0 Ripgper disabledserial@30880000!fsl,imx7d-uartfsl,imx6q-uarty0 RipgperokayGdefaultU+sai@308a0000!fsl,imx7d-saifsl,imx6sx-saiy0 _ Rbusmclk1mclk2mclk3rxtx  ##  disabledsai@308b0000!fsl,imx7d-saifsl,imx6sx-saiy0 ` Rbusmclk1mclk2mclk3rxtx  # #  disabledsai@308c0000!fsl,imx7d-saifsl,imx6sx-saiy0 2 Rbusmclk1mclk2mclk3rxtx  # #  disabledcrypto@30900000 !fsl,sec-v4.0y0 0 [Z Ripgaclkjr@1000!fsl,sec-v4.0-job-ringy ijr@2000!fsl,sec-v4.0-job-ringy  jjr@3000!fsl,sec-v4.0-job-ringy0 rcan@30a00000$!fsl,imx7d-flexcanfsl,imx6q-flexcany0 nRipgper ,okayGdefaultU-can@30a10000$!fsl,imx7d-flexcanfsl,imx6q-flexcany0 oRipgper ,okayGdefaultU.i2c@30a20000!fsl,imx7d-i2cfsl,imx21-i2cy0 # disabledi2c@30a30000!fsl,imx7d-i2cfsl,imx21-i2cy0 $okayGdefaultU/}rtc@52!microcrystal,rv3028GdefaultU0yRw1i2c@30a40000!fsl,imx7d-i2cfsl,imx21-i2cy0 % disabledi2c@30a50000!fsl,imx7d-i2cfsl,imx21-i2cy0 & disabledserial@30a60000!fsl,imx7d-uartfsl,imx6q-uarty0 Ripgper disabledserial@30a70000!fsl,imx7d-uartfsl,imx6q-uarty0 Ripgper disabledserial@30a80000!fsl,imx7d-uartfsl,imx6q-uarty0 Ripgper disabledserial@30a90000!fsl,imx7d-uartfsl,imx6q-uarty0 ~Ripgper disabledmailbox@30aa0000!fsl,imx7s-mufsl,imx6sx-muy0 X disabledmailbox@30ab0000!fsl,imx7s-mufsl,imx6sx-muy0 a disabledusb@30b10000!fsl,imx7d-usbfsl,imx27-usby0 +23+okayGdefaultU4@otgH5usb@30b30000!fsl,imx7d-usbfsl,imx27-usby0 (67Thsic@host+ disabledusbmisc@30b10200]$!fsl,imx7d-usbmiscfsl,imx6q-usbmiscy0e3usbmisc@30b30200]$!fsl,imx7d-usbmiscfsl,imx6q-usbmiscy0e7mmc@30b40000!!fsl,imx7d-usdhcfsl,imx6sl-usdhcy0 V RipgahbperjtokayGdefaultU8 9mmc@30b50000!!fsl,imx7d-usdhcfsl,imx6sl-usdhcy0 V RipgahbperjtokayGdefaultU:;mmc@30b60000!!fsl,imx7d-usdhcfsl,imx6sl-usdhcy0 V Ripgahbperjtokay"Gdefaultstate_100mhzstate_200mhzU<=>.Uׄ !spi@30bb0000!fsl,imx7d-qspiy0`.QuadSPIQuadSPI-memory k Rqspi_enqspi disableddma-controller@30bd0000!fsl,imx7d-sdmafsl,imx35-sdmay0 Ripgahb8Cimx/sdma/sdma-imx7d.bine#ethernet@30be0000!fsl,imx7d-fecfsl,imx6sx-fecy0\int0int1int2pps0xvwy(R*"Ripgahbptpenet_clk_refenet_outl~ ,okayGdefaultU?.>+U rgmii-id@mdioethernet-phy@14!ethernet-phy-id0022.1622ethernet-phy-ieee802.3-c22y 1e@ethernet-phy@24!ethernet-phy-id0022.1622ethernet-phy-ieee802.3-c22yeEusb@30b20000!fsl,imx7d-usbfsl,imx27-usby0 *AB+okayGdefaultUC@hostusbmisc@30b20200]$!fsl,imx7d-usbmiscfsl,imx6q-usbmiscy0eBethernet@30bf0000!fsl,imx7d-fecfsl,imx6sx-fecy0\int0int1int2pps0fdeg(R*"Ripgahbptpenet_clk_refenet_outl~ ,okayGdefaultUD.>+U rgmii-idEdma-controller@33000000&!fsl,imx7d-dma-apbhfsl,imx28-dma-apbhy3 0    8eFnand-controller@33002000!fsl,imx7d-gpmi-nandy3 3@@.gpmi-nandbch \bchRgpmi_iogpmi_bch_apb Frx-tx disabled.>(etm@3007d000"!arm,coresight-etm3xarm,primecelly0 VGJ Rapb_pclkout-portsportendpointHepcie@33800000!fsl,imx7d-pciey3@O .dbiconfigmpci0O@@ z\msi$ } | { zr+vRpciepcie_buspcie_phy.sw>)+2iI'&&&EpciephyappsturnoffQJ disabledusbphynop2!usb-nop-xceiv Rmain_clk^eAmemory@80000000mmemoryy regulator-lte-on!regulator-fixedGdefaultUK2Z2Zlte_on dL i|regulator-lte-nreset!regulator-fixedGdefaultUM2Z2Z LTE_nReset dNi|regulator-wifi!regulator-fixed d1iGdefaultUO wifi_reg2Z2Ze;regulator-wlan-rfkill!regulator-fixedGdefaultUP2Z2Z wlan_rfkill d1 i|regulator-usbotg-vbus!regulator-fixedGdefaultUQ usb_otg_vbusLK@LK@ dRie5 #address-cells#size-cellsmodelcompatiblestdout-pathgpio0gpio1gpio2gpio3gpio4gpio5gpio6i2c0i2c1i2c2i2c3mmc0mmc1mmc2serial0serial1serial2serial3serial4serial5serial6spi0spi1spi2spi3usb0usb1usb2ethernet0ethernet1rtc0rtc1entry-methodarm,psci-suspend-paramlocal-timer-stopentry-latency-usexit-latency-usmin-residency-usphandledevice_typeregclock-frequencyclockscpu-idle-statesoperating-points-v2#cooling-cellsnvmem-cellsnvmem-cell-namesopp-sharedopp-hzopp-microvoltclock-latency-nsopp-supported-hwopp-suspend#clock-cellsclock-output-namesclock-names#phy-cellspower-domainsinterrupt-parentinterruptsinterrupt-affinityremote-endpointarm,cpu-registers-not-fw-configuredmux-controlsstatusrangescpu#interrupt-cellsinterrupt-controllergpio-controller#gpio-cellsgpio-rangespinctrl-namespinctrl-0fsl,ext-reset-outputfsl,input-selfsl,pins#mux-control-cellsmux-reg-masksregulator-nameregulator-min-microvoltregulator-max-microvoltanatop-reg-offsetanatop-vol-bit-shiftanatop-vol-bit-widthanatop-min-bit-valanatop-min-voltageanatop-max-voltageanatop-enable-bitfsl,tempmon#thermal-sensor-cellsregmapvaluemasklinux,keycodewakeup-source#reset-cells#power-domain-cellspower-supply#io-channel-cellsdma-namesdmas#pwm-cellsphy-supplyresetsassigned-clocksassigned-clock-parentsassigned-clock-ratessamsung,burst-clock-frequencysamsung,esc-clock-frequencysamsung,pll-clock-frequencycs-gpiosspi-max-frequency#sound-dai-cellsfsl,stop-mode#mbox-cellsfsl,mu-side-bfsl,usbphyfsl,usbmiscphy-clkgate-delay-usdr_modevbus-supplyphy_type#index-cellsbus-widthfsl,tuning-stepfsl,tuning-start-tapcd-gpiosno-1-8-vkeep-power-in-suspendnon-removablevmmc-supplypinctrl-1pinctrl-2cap-mmc-highspeedcap-mmc-hw-resetmmc-hs200-1_8vmmc-ddr-1_8vreg-names#dma-cellsfsl,sdma-ram-script-nameinterrupt-namesfsl,num-tx-queuesfsl,num-rx-queuesphy-modephy-handlefsl,magic-packetreset-gpiosover-current-active-lowdma-channelsarm,primecell-periphidbus-rangenum-lanesinterrupt-map-maskinterrupt-mapfsl,max-link-speedreset-namesfsl,imx7d-pcie-phygpioenable-active-highregulator-always-on