a38\(\X$rockchip,rk3128-evbrockchip,rk3128 +!7Rockchip RK3128 Evaluation boardaliases=/pinctrl/gpio@2007c000C/pinctrl/gpio@20080000I/pinctrl/gpio@20084000O/pinctrl/gpio@20088000U/i2c@20072000Z/i2c@20056000_/i2c@2005a000d/i2c@2005e000i/serial@20060000q/serial@20064000y/serial@20068000/mmc@1021c000arm-pmuarm,cortex-a7-pmu0LMNOcpus+rockchip,rk3036-smpcpu@f00cpuarm,cortex-a7cpu@f01cpuarm,cortex-a7cpu@f02cpuarm,cortex-a7cpu@f03cpuarm,cortex-a7opp-table-0operating-points-v2opp-216000000   ~~7@opp-408000000Q  ~~7@opp-600000000#F  ~~7@opp-696000000)|  7@opp-8160000000,  g8g87,@opp-1008000000<  OO7@opp-1200000000G  777@display-subsystemrockchip,display-subsystem8 >disabledopp-table-1operating-points-v2 opp-200000000   opp-300000000  opp-400000000ׄ  00opp-4800000008  timerarm,armv7-timer0   Ein6oscillator fixed-clockin6yxin24m)sram@10080000 mmio-sram +  smp-sram@0rockchip,rk3066-smp-sramgpu@10090000"rockchip,rk3128-maliarm,mali-400 Hgpgpmmupp0ppmmu0pp1ppmmu1 buscore x  >disabledsyscon@100a0000&rockchip,rk3128-pmusysconsimple-mfd power-controller!rockchip,rk3128-power-controller+ power-domain@1Erz power-domain@2(power-domain@3video-codec@10106000(rockchip,rk3128-vpurockchip,rk3066-vpu` vepuvdpu (aclk_vdpuhclk_vdpuaclk_vepuhclk_vepu iommu@10106800rockchip,iommuh C aclkiface vop@1010e000rockchip,rk3126-vop aclk_vopdclk_vophclk_vopdef axiahbdclk  >disabledport+endpoint@0.endpoint@1dsi@10110000*rockchip,rk3128-mipi-dsisnps,dw-mipi-dsi@ !Epclkdphy apb$ >disabledports+port@0endpointport@1qos@1012d000rockchip,rk3128-qossyscon qos@1012e000rockchip,rk3128-qossyscon qos@1012f000rockchip,rk3128-qossyscon qos@1012f080rockchip,rk3128-qossyscon  qos@1012f100rockchip,rk3128-qossyscon  qos@1012f180rockchip,rk3128-qossyscon  qos@1012f200rockchip,rk3128-qossyscon interrupt-controller@10139000arm,cortex-a7-gic     1Fusb@101800002rockchip,rk3128-usbrockchip,rk3066-usbsnps,dwc2 otgWotg_q@  usb2-phy>okayusb@101c0000 generic-ehci usb>okayusb@101e0000 generic-ohci usb>okayi2s@10200000(rockchip,rk3128-i2srockchip,rk3066-i2s  DPi2s_clki2s_hclktxrx >disabledspdif@10204000,rockchip,rk3128-spdifrockchip,rk3066-spdif @ 7S mclkhclk txdefault >disabledspi@1020c000 rockchip,sfc  2clk_sfchclk_sfc >disabledmmc@102140000rockchip,rk3128-dw-mshcrockchip,rk3288-dw-mshc!@@  Drvbiuciuciu-driveciu-sample rx-txрQreset >disabledmmc@102180000rockchip,rk3128-dw-mshcrockchip,rk3288-dw-mshc!@  Eswbiuciuciu-driveciu-sample rx-txрRreset >disabledmmc@1021c0000rockchip,rk3128-dw-mshcrockchip,rk3288-dw-mshc!@  Guybiuciuciu-driveciu-sample rx-txрSreset>okaydefault i2s@10220000(rockchip,rk3128-i2srockchip,rk3066-i2s" Qi2s_clki2s_hclktxrxdefault  >disablednand-controller@10500000(rockchip,rk3128-nfcrockchip,rk2928-nfcP@ Cahbnfcdefault !"#$%&'( >disabledclock-controller@20000000rockchip,rk3128-cru )xin24m$.#gsyscon@20008000&rockchip,rk3128-grfsysconsimple-mfd +usb2phy@17crockchip,rk3128-usb2phy| phyclk yusb480m_phyC*>okay*host-port 5 linestateZ>okayotg-port$#34otg-bvalidotg-idlinestateZ>okayhdmi@20034000rockchip,rk3128-inno-hdmi @@ -G pclkrefdefault +,-  >disabledports+port@0endpoint.port@1phy@20038000rockchip,rk3128-dsi-dphy @r refpclkZ $apb >disabledtimer@20044000,rockchip,rk3128-timerrockchip,rk3288-timer @  aU pclktimertimer@20044020,rockchip,rk3128-timerrockchip,rk3288-timer @  aV pclktimertimer@20044040,rockchip,rk3128-timerrockchip,rk3288-timer @@  ;aW pclktimertimer@20044060,rockchip,rk3128-timerrockchip,rk3288-timer @`  <aX pclktimertimer@20044080,rockchip,rk3128-timerrockchip,rk3288-timer @  =aY pclktimertimer@200440a0,rockchip,rk3128-timerrockchip,rk3288-timer @  >aZ pclktimerwatchdog@2004c000 rockchip,rk3128-wdtsnps,dw-wdt  "? >disabledpwm@20050000(rockchip,rk3128-pwmrockchip,rk3288-pwm ^default/e >disabledpwm@20050010(rockchip,rk3128-pwmrockchip,rk3288-pwm ^default0e >disabledpwm@20050020(rockchip,rk3128-pwmrockchip,rk3288-pwm  ^default1e >disabledpwm@20050030(rockchip,rk3128-pwmrockchip,rk3288-pwm 0^default2e >disabledi2c@20056000(rockchip,rk3128-i2crockchip,rk3288-i2c ` i2cMdefault3+>okayrtc@51haoyu,hym8563Qyxin32ki2c@2005a000(rockchip,rk3128-i2crockchip,rk3288-i2c  i2cNdefault4+ >disabledi2c@2005e000(rockchip,rk3128-i2crockchip,rk3288-i2c  i2cOdefault5+ >disabledserial@20060000&rockchip,rk3128-uartsnps,dw-apb-uart  in6MUbaudclkapb_pclktxrxdefault 678p} >disabledserial@20064000&rockchip,rk3128-uartsnps,dw-apb-uart @ in6NVbaudclkapb_pclktxrxdefault9p} >disabledserial@20068000&rockchip,rk3128-uartsnps,dw-apb-uart  in6OWbaudclkapb_pclktxrxdefault:p} >disabledsaradc@2006c000rockchip,saradc  [>saradcapb_pclkW saradc-apb >disabledi2c@20072000(rockchip,rk3128-i2crockchip,rk3288-i2c   i2cLdefault;+ >disabledspi@20074000(rockchip,rk3128-spirockchip,rk3066-spi @ ARspiclkapb_pclk txrxdefault<=>?@+ >disableddma-controller@20078000arm,pl330arm,primecell @ apb_pclkethernet@2008c000rockchip,rk3128-gmac @89macirqeth_wake_irq8~oMstmmacethmac_clk_rxmac_clk_txclk_mac_refclk_mac_refoutaclk_macpclk_mac8 stmmaceth$ >disabledmdiosnps,dwmac-mdio+pinctrlrockchip,rk3128-pinctrl$+gpio@2007c000rockchip,gpio-bank  $@1FCgpio@20080000rockchip,gpio-bank  %A1Fgpio@20084000rockchip,gpio-bank @ &B1FEgpio@20088000rockchip,gpio-bank  'C1Fpcfg-pull-defaultBpcfg-pull-none$Aemmcemmc-clk1Aemmc-cmd1Bemmc-cmd11Bemmc-pwr1Bemmc-bus11Bemmc-bus4@1BBBBemmc-bus81BBBBBBBBgmacrgmii-pins1B B B B BBBBBBBBBBBrmii-pins1B B BBBBBBBBhdmihdmii2c-xfer 1AA+hdmi-hpd1A,hdmi-cec1A-i2c0i2c0-xfer 1AA;i2c1i2c1-xfer 1AA3i2c2i2c2-xfer 1AA4i2c3i2c3-xfer 1AA5i2si2s-bus`1A A A A AA i2s1-bus`1AAAAAAlcdclcdc-dclk1Alcdc-den1 Alcdc-hsync1 Alcdc-vsync1 Alcdc-rgb241 A AAAAAAAAAAAAAnfcflash-ale1A!flash-cle1A#flash-wrn1A(flash-rdn1A&flash-rdy1A'flash-cs01A$flash-dqs1A%flash-bus81AAAAAAAA"pwm0pwm0-pin1A/pwm1pwm1-pin1A0pwm2pwm2-pin1A1pwm3pwm3-pin1A2sdiosdio-clk1Asdio-cmd1Bsdio-pwren1Bsdio-bus4@1BBBBsdmmcsdmmc-clk1Asdmmc-cmd1Bsdmmc-det1Bsdmmc-wp1Bsdmmc-pwren1Bsdmmc-bus4@1BBBBsfcsfc-bus2 1BBsfc-bus4@1BBBBsfc-clk1Asfc-cs01Bsfc-cs11Bspdifspdif-tx1Aspi0spi0-clk1B>spi0-cs01 B?spi0-tx1 B<spi0-rx1 B=spi0-cs11 B@spi1-clk1Bspi1-cs01Bspi1-tx1Bspi1-rx1Bspi1-cs11Bspi2-clk1 Bspi2-cs01Bspi2-tx1 Bspi2-rx1 Buart0uart0-xfer 1BA6uart0-cts1A7uart0-rts1A8uart1uart1-xfer 1 B B9uart1-cts1Auart1-rts1 Auart2uart2-xfer 1BA:uart2-cts1Auart2-rts1Ausb-hosthost-vbus-drv1AFusb-otgotg-vbus-drv1ADchosen?/serial@20068000memory@60000000memory`@regulator-vcc5v0-otgregulator-fixed KCdefaultD Pvcc5v0_otg_LK@wLK@regulator-vcc5v0-hostregulator-fixed KEdefaultF Pvcc5v0_host_LK@wLK@ compatibleinterrupt-parent#address-cells#size-cellsmodelgpio0gpio1gpio2gpio3i2c0i2c1i2c2i2c3serial0serial1serial2mmc0interruptsinterrupt-affinityenable-methoddevice_typeregclocksresetsoperating-points-v2#cooling-cellsphandleopp-sharedopp-hzopp-microvoltclock-latency-nsopp-suspendportsstatusarm,cpu-registers-not-fw-configuredclock-frequencyclock-output-names#clock-cellsrangesinterrupt-namesclock-namespower-domains#power-domain-cellspm_qosiommus#iommu-cellsreset-namesremote-endpointphysphy-namesrockchip,grfinterrupt-controller#interrupt-cellsdr_modeg-np-tx-fifo-sizeg-rx-fifo-sizeg-tx-fifo-sizevbus-supplydmasdma-names#sound-dai-cellspinctrl-namespinctrl-0fifo-depthmax-frequencybus-widthrockchip,playback-channels#reset-cellsassigned-clocksassigned-clock-ratesassigned-clock-parents#phy-cells#pwm-cellsreg-io-widthreg-shift#io-channel-cellsarm,pl330-broken-no-flushparm,pl330-periph-burst#dma-cellsrx-fifo-depthtx-fifo-depthgpio-controller#gpio-cellsbias-pull-pin-defaultbias-disablerockchip,pinsstdout-pathgpioregulator-nameregulator-min-microvoltregulator-max-microvoltregulator-always-on