]8X4(W!,Rockchip RK3228 Evaluation board$2rockchip,rk3228-evbrockchip,rk3228aliases=/pinctrl/gpio@11110000C/pinctrl/gpio@11120000I/pinctrl/gpio@11130000O/pinctrl/gpio@11140000U/serial@11010000]/serial@11020000e/serial@11030000m/spi@11090000r/mmc@30020000cpuscpu@f00wcpu2arm,cortex-a7pscicpu@f01wcpu2arm,cortex-a7pscicpu@f02wcpu2arm,cortex-a7pscicpu@f03wcpu2arm,cortex-a7psciopp-table-02operating-points-v2opp-408000000Q~@opp-600000000#Fopp-8160000000,B@opp-1008000000<opp-1200000000Gtxarm-pmu2arm,cortex-a7-pmu0 LMNOpsci2arm,psci-1.0arm,psci-0.2smctimer2arm,armv7-timer)0    Mn6oscillator 2fixed-clockMn6]xin24mp'display-subsystem2rockchip,display-subsystem}i2s1@100b0000(2rockchip,rk3228-i2srockchip,rk3066-i2s @  i2s_clki2s_hclkQ  txrxdefault  disabledi2s0@100c0000(2rockchip,rk3228-i2srockchip,rk3066-i2s @  i2s_clki2s_hclkP txrx disabledspdif@100d00002rockchip,rk3228-spdif   S mclkhclk txdefault  disabledi2s2@100e0000(2rockchip,rk3228-i2srockchip,rk3066-i2s@  i2s_clki2s_hclkR txrx disabledsyscon@11000000&2rockchip,rk3228-grfsysconsimple-mfd(io-domains"2rockchip,rk3228-io-voltage-domain disabledpower-controller!2rockchip,rk3228-power-controller.power-domain@48 power-domain@5power-domain@6power-domain@7 power-domain@8usb2phy@7602rockchip,rk3228-usb2phy` phyclk ]usb480m_phy0p disabledBotg-port$ ;<=otg-bvalidotg-idlinestate disabledAhost-port  > linestate disabledCusb2phy@8002rockchip,rk3228-usb2phy phyclk ]usb480m_phy1p disabledDotg-port  D linestate disabledEhost-port  E linestate disabledFserial@110100002snps,dw-apb-uart  7Mn6MUbaudclkapb_pclkdefault  disabledserial@110200002snps,dw-apb-uart  8Mn6NVbaudclkapb_pclkdefault disabledserial@110300002snps,dw-apb-uart  9Mn6OWbaudclkapb_pclkdefaultokayefuse@110400002rockchip,rk3228-efuse G pclk_efuseid@7cpu_leakage@17i2c@110500002rockchip,rk3228-i2c  $i2cLdefault disabledi2c@110600002rockchip,rk3228-i2c  %i2cMdefault disabledi2c@110700002rockchip,rk3228-i2c  &i2cNdefault disabledi2c@110800002rockchip,rk3228-i2c  'i2cOdefault disabledspi@110900002rockchip,rk3228-spi   1ARspiclkapb_pclkdefault !" disabledwatchdog@110a0000 2rockchip,rk3228-wdtsnps,dw-wdt   (b disabledpwm@110b00002rockchip,rk3288-pwm  ^default# disabledpwm@110b00102rockchip,rk3288-pwm  ^default$ disabledpwm@110b00202rockchip,rk3288-pwm  ^default% disabledpwm@110b00302rockchip,rk3288-pwm 0 ^default& disabledtimer@110c0000,2rockchip,rk3228-timerrockchip,rk3288-timer   + a' pclktimerclock-controller@110e00002rockchip,rk3228-cru'xin24m(p"H/kb$?#g0,eррxhррxhdma-controller@110f00002arm,pl330arm,primecell@ T_ apb_pclk thermal-zonescpu-thermalvd)tripscpu_alert0p~passive*cpu_alert1$~passive+cpu_crit_ ~criticalcooling-mapsmap0*0map1+0tsadc@111500002rockchip,rk3228-tsadc  :HXtsadcapb_pclk/H?W tsadc-apbinitdefaultsleep,-, sokay"9)hdmi-phy@120300002rockchip,rk3228-hdmi-phym'sysclkrefoclkrefpclkp ]hdmiphy_phy disabled3gpu@20000000"2rockchip,rk3228-maliarm,mali-400 H gpgpmmupp0ppmmu0pp1ppmmu1 buscoreT.~ disabledvideo-codec@20020000(2rockchip,rk3228-vpurockchip,rk3399-vpu    vepuvdpu aclkhclkb/T.iommu@200208002rockchip,iommu    aclkifaceT.i/video-codec@20030000*2rockchip,rk3228-vdecrockchip,rk3399-vdec    axiahbcabaccore/?b0T.iommu@200304802rockchip,iommu @ @   aclkifaceT.i0vop@200500002rockchip,rk3228-vop   aclk_vopdclk_vophclk_vopdef axiahbdclkb1T. disabledportendpoint@0v27iommu@20053f002rockchip,iommu ?   aclkifaceT.i disabled1rga@20060000(2rockchip,rk3228-rgarockchip,rk3288-rga   !aclkhclksclkT.kmn coreaxiahbiommu@200708002rockchip,iommu    aclkifaceT.i disabledhdmi@200a00002rockchip,rk3228-dw-hdmi   #/3l{iahbisfrcecdefault 456`hdmi3hdmi( disabledportsport@0endpointv72port@1mmc@3000000002rockchip,rk3228-dw-mshcrockchip,rk3288-dw-mshc0@   Drvbiuciuciu-driveciu-sampledefault 89: disabledmmc@3001000002rockchip,rk3228-dw-mshcrockchip,rk3288-dw-mshc0@   Eswbiuciuciu-driveciu-sampledefault ;<= disabledmmc@3002000002rockchip,rk3228-dw-mshcrockchip,rk3288-dw-mshc0@  M<4`<4` Guybiuciuciu-driveciu-sampledefault >?@Sresetokay usb@3004000022rockchip,rk3228-usbrockchip,rk3066-usbsnps,dwc20  otg%otg-?N@ A usb2-phy disabledusb@30080000 2generic-ehci0   BCusb disabledusb@300a0000 2generic-ohci0    BCusb disabledusb@300c0000 2generic-ehci0    DEusb disabledusb@300e0000 2generic-ohci0   DEusb disabledusb@30100000 2generic-ehci0  B DFusb disabledusb@30120000 2generic-ohci0  C DFusb disabledethernet@302000002rockchip,rk3228-gmac0   macirq8~oMstmmacethmac_clk_rxmac_clk_txclk_mac_refclk_mac_refoutaclk_macpclk_mac8 stmmaceth(okay/|?]outputjGurmii~Hmdio2snps,dwmac-mdioethernet-phy@042ethernet-phy-id1234.d400ethernet-phy-ieee802.3-c22?Hqos@310300802rockchip,rk3228-qossyscon1  qos@310301002rockchip,rk3228-qossyscon1 qos@310301802rockchip,rk3228-qossyscon1  qos@310302002rockchip,rk3228-qossyscon1 qos@310400002rockchip,rk3228-qossyscon1 qos@310500002rockchip,rk3228-qossyscon1 qos@310600002rockchip,rk3228-qossyscon1 qos@310700002rockchip,rk3228-qossyscon1 qos@310700802rockchip,rk3228-qossyscon1 interrupt-controller@32010000 2arm,gic-400 22 2@ 2`    pinctrl2rockchip,rk3228-pinctrl(gpio@111100002rockchip,gpio-bank  3@gpio@111200002rockchip,gpio-bank  4Agpio@111300002rockchip,gpio-bank  5Bgpio@111400002rockchip,gpio-bank  6Cpcfg-pull-upLpcfg-pull-downKpcfg-pull-noneJpcfg-pull-none-drv-12ma Isdmmcsdmmc-clkI8sdmmc-cmdI9sdmmc-bus4@IIII:sdiosdio-clkI;sdio-cmdI<sdio-bus4@IIII=emmcemmc-clkJ>emmc-cmdJ?emmc-bus8JJJJJJJJ@gmacrgmii-pinsJ JJIIII I IJJJJ JJrmii-pinsJ JJII IJJJJphy-pins JJhdmihdmi-hpdK5hdmii2c-xfer JJ4hdmi-cecJ6i2c0i2c0-xfer JJi2c1i2c1-xfer JJi2c2i2c2-xfer JJi2c3i2c3-xfer JJspi0spi0-clk Lspi0-cs0L!spi0-tx Lspi0-rx L spi0-cs1 L"spi1spi1-clkLspi1-cs0Lspi1-rxLspi1-txLspi1-cs1Li2s1i2s1-busJ J J J JJJJJ pwm0pwm0-pinJ#pwm1pwm1-pinJ$pwm2pwm2-pin J%pwm3pwm3-pin J&spdifspdif-txJ tsadcotp-pinJ,otp-outJ-uart0uart0-xfer JJuart0-ctsJuart0-rtsJuart1uart1-xfer  J Juart1-ctsJuart1-rts Juart2uart2-xfer LJuart21-xfer  L Juart2-ctsJuart2-rtsJmemory@60000000wmemory`@regulator-vcc-phy2regulator-fixed*=vcc_phyLw@dw@|G #address-cells#size-cellsinterrupt-parentmodelcompatiblegpio0gpio1gpio2gpio3serial0serial1serial2spi0mmc0device_typeregresetsoperating-points-v2#cooling-cellsclocksenable-methodphandleopp-sharedopp-hzopp-microvoltclock-latency-nsopp-suspendinterruptsinterrupt-affinityarm,cpu-registers-not-fw-configuredclock-frequencyclock-output-names#clock-cellsportsclock-namesdmasdma-namespinctrl-namespinctrl-0status#power-domain-cellspm_qosinterrupt-names#phy-cellsreg-shiftreg-io-width#pwm-cellsrockchip,grf#reset-cellsassigned-clocksassigned-clock-rates#dma-cellsarm,pl330-periph-burstpolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresistripcooling-devicereset-namespinctrl-1pinctrl-2#thermal-sensor-cellsrockchip,hw-tshut-temprockchip,hw-tshut-moderockchip,hw-tshut-polaritypower-domainsiommus#iommu-cellsremote-endpointassigned-clock-parentsphysphy-namesfifo-depthmax-frequencybus-widthrockchip,default-sample-phasecap-mmc-highspeedmmc-ddr-1_8vdisable-wpnon-removabledr_modeg-np-tx-fifo-sizeg-rx-fifo-sizeg-tx-fifo-sizeclock_in_outphy-supplyphy-modephy-handlephy-is-integratedinterrupt-controller#interrupt-cellsrangesgpio-controller#gpio-cellsbias-pull-upbias-pull-downbias-disabledrive-strengthrockchip,pinsenable-active-highregulator-nameregulator-min-microvoltregulator-max-microvoltregulator-always-onregulator-boot-on