f{8`@(;`,mecer,xms6rockchip,rk32297Mecer Xtreme Mini S6aliases=/pinctrl/gpio@11110000C/pinctrl/gpio@11120000I/pinctrl/gpio@11130000O/pinctrl/gpio@11140000U/serial@11010000]/serial@11020000e/serial@11030000m/spi@11090000r/mmc@30000000w/mmc@30010000|/mmc@30020000cpuscpu@f00cpu,arm,cortex-a7pscicpu@f01cpu,arm,cortex-a7pscicpu@f02cpu,arm,cortex-a7pscicpu@f03cpu,arm,cortex-a7psciopp-table-0,operating-points-v2opp-408000000Q~@opp-600000000#Fopp-8160000000,B@opp-1008000000<opp-1200000000Gtxopp-1296000000M?d7opp-1392000000R<opp-1464000000WB\arm-pmu,arm,cortex-a7-pmu0 LMNO+psci,arm,psci-1.0arm,psci-0.2smctimer,arm,armv7-timer>0    bn6oscillator ,fixed-clockbn6rxin24m+display-subsystem,rockchip,display-subsystem i2s1@100b0000(,rockchip,rk3228-i2srockchip,rk3066-i2s @  i2s_clki2s_hclkQ  txrxdefault  disabledi2s0@100c0000(,rockchip,rk3228-i2srockchip,rk3066-i2s @  i2s_clki2s_hclkP txrx disabledspdif@100d0000,rockchip,rk3228-spdif   S mclkhclk txdefault  disabledi2s2@100e0000(,rockchip,rk3228-i2srockchip,rk3066-i2s@  i2s_clki2s_hclkR txrx disabledsyscon@11000000&,rockchip,rk3228-grfsysconsimple-mfd,io-domains",rockchip,rk3228-io-voltage-domainokay  power-controller!,rockchip,rk3228-power-controller2power-domain@48power-domain@5power-domain@6power-domain@7 power-domain@8usb2phy@760,rockchip,rk3228-usb2phy` phyclk rusb480m_phy0okayHotg-port$ ;<=otg-bvalidotg-idlinestate'okay2Ghost-port  > linestate'okay2Iusb2phy@800,rockchip,rk3228-usb2phy phyclk rusb480m_phy1okayJotg-port  D linestate'okay2Khost-port  E linestate'okay2Lserial@11010000,snps,dw-apb-uart  7bn6MUbaudclkapb_pclkdefault =G disabledserial@11020000,snps,dw-apb-uart  8bn6NVbaudclkapb_pclkdefault=G disabledserial@11030000,snps,dw-apb-uart  9bn6OWbaudclkapb_pclkdefault=Gokayefuse@11040000,rockchip,rk3228-efuse G pclk_efuseid@7cpu_leakage@17i2c@11050000,rockchip,rk3228-i2c  $i2cLdefault disabledi2c@11060000,rockchip,rk3228-i2c  %i2cMdefault disabledi2c@11070000,rockchip,rk3228-i2c  &i2cNdefault  disabledi2c@11080000,rockchip,rk3228-i2c  'i2cOdefault! disabledspi@11090000,rockchip,rk3228-spi   1ARspiclkapb_pclkdefault"#$%& disabledwatchdog@110a0000 ,rockchip,rk3228-wdtsnps,dw-wdt   (b disabledpwm@110b0000,rockchip,rk3288-pwm T^default' disabledpwm@110b0010,rockchip,rk3288-pwm T^default(okayXpwm@110b0020,rockchip,rk3288-pwm T^default)okayYpwm@110b0030,rockchip,rk3288-pwm 0T^default* disabledtimer@110c0000,,rockchip,rk3228-timerrockchip,rk3288-timer   + a+ pclktimerclock-controller@110e0000,rockchip,rk3228-cru+xin24m_,lHykb$#g0,eррxhррxhdma-controller@110f0000,arm,pl330arm,primecell@  apb_pclk thermal-zonescpu-thermald-tripscpu_alert0ppassive.cpu_alert1$passive/cpu_crit_ criticalcooling-mapsmap0 .0map1 /0tsadc@11150000,rockchip,rk3228-tsadc  :HXtsadcapb_pclkyHW tsadc-apbinitdefaultsleep0+150?Usokayl-hdmi-phy@12030000,rockchip,rk3228-hdmi-phym+sysclkrefoclkrefpclk rhdmiphy_phy'okay8gpu@20000000",rockchip,rk3228-maliarm,mali-400 H gpgpmmupp0ppmmu0pp1ppmmu1 buscore2~okay3video-codec@20020000(,rockchip,rk3228-vpurockchip,rk3399-vpu    vepuvdpu aclkhclk42iommu@20020800,rockchip,iommu    aclkiface24video-codec@20030000*,rockchip,rk3228-vdecrockchip,rk3399-vdec    axiahbcabaccorey52iommu@20030480,rockchip,iommu @ @   aclkiface25vop@20050000,rockchip,rk3228-vop   aclk_vopdclk_vophclk_vopdef axiahbdclk62okayport endpoint@07<iommu@20053f00,rockchip,iommu ?   aclkiface2okay6rga@20060000(,rockchip,rk3228-rgarockchip,rk3288-rga   !aclkhclksclk2kmn coreaxiahbiommu@20070800,rockchip,iommu    aclkiface2okayhdmi@200a0000,rockchip,rk3228-dw-hdmi G  #y8l{iahbisfrcecdefault 9:;`hdmi8hdmi_,okayportsport@0endpoint<7port@1mmc@300000000,rockchip,rk3228-dw-mshcrockchip,rk3288-dw-mshc0@   Drvbiuciuciu-driveciu-sampledefault =>?okaymmc@300100000,rockchip,rk3228-dw-mshcrockchip,rk3288-dw-mshc0@   Eswbiuciuciu-driveciu-sampledefault @ABokay*7CBPmmc@300200000,rockchip,rk3228-dw-mshcrockchip,rk3288-dw-mshc0@  b<4`]<4` Guybiuciuciu-driveciu-samplekdefault DEFSresetokayBusb@300400002,rockchip,rk3228-usbrockchip,rk3066-usbsnps,dwc20  otgotg@ G usb2-phyokayusb@30080000 ,generic-ehci0   HIusbokayusb@300a0000 ,generic-ohci0    HIusbokayusb@300c0000 ,generic-ehci0    JKusbokayusb@300e0000 ,generic-ohci0   JKusbokayusb@30100000 ,generic-ehci0  B JLusbokayusb@30120000 ,generic-ohci0  C JLusbokayethernet@30200000,rockchip,rk3228-gmac0   macirq8~oMstmmacethmac_clk_rxmac_clk_txclk_mac_refclk_mac_refoutaclk_macpclk_mac8 stmmaceth_,okayy|outputMrmii2Nmdio,snps,dwmac-mdioethernet-phy@04,ethernet-phy-id1234.d400ethernet-phy-ieee802.3-c22?Mqos@31030080,rockchip,rk3228-qossyscon1 qos@31030100,rockchip,rk3228-qossyscon1 qos@31030180,rockchip,rk3228-qossyscon1 qos@31030200,rockchip,rk3228-qossyscon1 qos@31040000,rockchip,rk3228-qossyscon1 qos@31050000,rockchip,rk3228-qossyscon1 qos@31060000,rockchip,rk3228-qossyscon1 qos@31070000,rockchip,rk3228-qossyscon1 qos@31070080,rockchip,rk3228-qossyscon1 interrupt-controller@32010000 ,arm,gic-400  22 2@ 2`    pinctrl,rockchip,rk3228-pinctrl_,gpio@11110000,rockchip,gpio-bank  3@!1 gpio@11120000,rockchip,gpio-bank  4A!1 gpio@11130000,rockchip,gpio-bank  5B!1 Tgpio@11140000,rockchip,gpio-bank  6C!1 Spcfg-pull-up=Rpcfg-pull-downJQpcfg-pull-noneYPpcfg-pull-none-drv-12maf Osdmmcsdmmc-clkuO=sdmmc-cmduO>sdmmc-bus4@uOOOO?sdiosdio-clkuO@sdio-cmduOAsdio-bus4@uOOOOBemmcemmc-clkuPDemmc-cmduPEemmc-bus8uPPPPPPPPFgmacrgmii-pinsuP PPOOOO O OPPPP PPrmii-pinsuP PPOO OPPPPphy-pins uPPhdmihdmi-hpduQ:hdmii2c-xfer uPP9hdmi-cecuP;i2c0i2c0-xfer uPPi2c1i2c1-xfer uPPi2c2i2c2-xfer uPP i2c3i2c3-xfer uPP!spi0spi0-clku R"spi0-cs0uR%spi0-txu R#spi0-rxu R$spi0-cs1u R&spi1spi1-clkuRspi1-cs0uRspi1-rxuRspi1-txuRspi1-cs1uRi2s1i2s1-busuP P P P PPPPP pwm0pwm0-pinuP'pwm1pwm1-pinuP(pwm2pwm2-pinu P)pwm3pwm3-pinu P*spdifspdif-txuP tsadcotp-pinuP0otp-outuP1uart0uart0-xfer uPPuart0-ctsuPuart0-rtsuPuart1uart1-xfer u P Puart1-ctsuPuart1-rtsu Puart2uart2-xfer uRPuart21-xfer u R Puart2-ctsuPuart2-rtsuPusbhost-vbus-drvuPUmemory@60000000memory`@regulator-dc-12v,regulator-fixeddc_12vWext_gmac ,fixed-clockbsY@ rext_gmacpower-led ,gpio-ledsled-0 Sonsdio-pwrseq,mmc-pwrseq-simpleTTCregulator-vcc-host,regulator-fixed SdefaultU vcc_host Vregulator-vcc-phy,regulator-fixedvcc_phyw@w@ Nregulator-vcc-sys,regulator-fixedvcc_sysLK@LK@ WVregulator-vccio-1v8,regulator-fixed vccio_1v8w@w@ Vregulator-vccio-3v3,regulator-fixed vccio_3v32Z2Z V regulator-vdd-arm,pwm-regulator+Xa0Vvdd_arm~\regulator-vdd-log,pwm-regulator+Ya0Vvdd_logB@ 3 #address-cells#size-cellsinterrupt-parentcompatiblemodelgpio0gpio1gpio2gpio3serial0serial1serial2spi0mmc0mmc1mmc2device_typeregresetsoperating-points-v2#cooling-cellsclocksenable-methodcpu-supplyphandleopp-sharedopp-hzopp-microvoltclock-latency-nsopp-suspendinterruptsinterrupt-affinityarm,cpu-registers-not-fw-configuredclock-frequencyclock-output-names#clock-cellsportsclock-namesdmasdma-namespinctrl-namespinctrl-0statusvccio1-supplyvccio2-supplyvccio4-supply#power-domain-cellspm_qosinterrupt-names#phy-cellsphy-supplyreg-shiftreg-io-width#pwm-cellsrockchip,grf#reset-cellsassigned-clocksassigned-clock-rates#dma-cellsarm,pl330-periph-burstpolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresistripcooling-devicereset-namespinctrl-1pinctrl-2#thermal-sensor-cellsrockchip,hw-tshut-temprockchip,hw-tshut-modepower-domainsmali-supplyiommus#iommu-cellsremote-endpointassigned-clock-parentsphysphy-namesfifo-depthcap-mmc-highspeeddisable-wpbus-widthcap-sd-highspeedcap-sdio-irqmmc-pwrseqnon-removablevqmmc-supplymax-frequencyrockchip,default-sample-phasedr_modeg-np-tx-fifo-sizeg-rx-fifo-sizeg-tx-fifo-sizeclock_in_outphy-handlephy-modephy-is-integratedinterrupt-controller#interrupt-cellsrangesgpio-controller#gpio-cellsbias-pull-upbias-pull-downbias-disabledrive-strengthrockchip,pinsregulator-nameregulator-always-onregulator-boot-onregulator-min-microvoltregulator-max-microvoltgpiosdefault-statereset-gpiosenable-active-highgpiovin-supplypwmspwm-supply