8d( *,,rockchip,rk3288-evb-act8846rockchip,rk3288&7Rockchip RK3288 EVB ACT8846aliases=/ethernet@ff290000G/pinctrl/gpio@ff750000M/pinctrl/gpio@ff780000S/pinctrl/gpio@ff790000Y/pinctrl/gpio@ff7a0000_/pinctrl/gpio@ff7b0000e/pinctrl/gpio@ff7c0000k/pinctrl/gpio@ff7d0000q/pinctrl/gpio@ff7e0000w/pinctrl/gpio@ff7f0000}/i2c@ff650000/i2c@ff140000/i2c@ff660000/i2c@ff150000/i2c@ff160000/i2c@ff170000/mmc@ff0f0000/mmc@ff0c0000/mmc@ff0d0000/mmc@ff0e0000/serial@ff180000/serial@ff190000/serial@ff690000/serial@ff1b0000/serial@ff1c0000/spi@ff110000/spi@ff120000/spi@ff130000arm-pmuarm,cortex-a12-pmu0cpusrockchip,rk3066-smpcpu@500#cpuarm,cortex-a12/3:N]dr~ cpu@501#cpuarm,cortex-a12/3:N]drcpu@502#cpuarm,cortex-a12/3:N]drcpu@503#cpuarm,cortex-a12/3:N]dropp-table-0operating-points-v2opp-126000000 @opp-216000000  opp-312000000 opp-408000000Q opp-600000000#F opp-696000000)|~opp-8160000000,B@opp-1008000000<opp-1200000000Gopp-1416000000TfrOopp-1512000000ZJ opp-1608000000_"preserved-memorydma-unusable@fe000000/oscillator fixed-clockn6xin24m timerarm,armv7-timer0   n6timer@ff810000rockchip,rk3288-timer/  H ]a  5pclktimerdisplay-subsystemrockchip,display-subsystemA mmc@ff0c0000rockchip,rk3288-dw-mshcGр ]Drv5biuciuciu-driveciu-sampleU / @3`resetlokays}default mmc@ff0d0000rockchip,rk3288-dw-mshcGр ]Esw5biuciuciu-driveciu-sampleU !/ @3`reset ldisabledmmc@ff0e0000rockchip,rk3288-dw-mshcGр ]Ftx5biuciuciu-driveciu-sampleU "/@3`reset ldisabledmmc@ff0f0000rockchip,rk3288-dw-mshcGр ]Guy5biuciuciu-driveciu-sampleU #/@3`resetlokays}defaultsaradc@ff100000rockchip,saradc/ $]I[5saradcapb_pclk3W `saradc-apblokayzspi@ff110000(rockchip,rk3288-spirockchip,rk3066-spi]AR5spiclkapb_pclk  txrx ,default/ ldisabledspi@ff120000(rockchip,rk3288-spirockchip,rk3066-spi]BS5spiclkapb_pclk txrx -default / ldisabledspi@ff130000(rockchip,rk3288-spirockchip,rk3066-spi]CT5spiclkapb_pclktxrx .default!"#$/ ldisabledi2c@ff140000rockchip,rk3288-i2c/ >5i2c]Mdefault% ldisabledi2c@ff150000rockchip,rk3288-i2c/ ?5i2c]Odefault& ldisabledi2c@ff160000rockchip,rk3288-i2c/ @5i2c]Pdefault' ldisabledi2c@ff170000rockchip,rk3288-i2c/ A5i2c]Qdefault(lokaymserial@ff180000&rockchip,rk3288-uartsnps,dw-apb-uart/ 7)3]MU5baudclkapb_pclktxrxdefault)lokayserial@ff190000&rockchip,rk3288-uartsnps,dw-apb-uart/ 8)3]NV5baudclkapb_pclktxrxdefault*lokayserial@ff690000&rockchip,rk3288-uartsnps,dw-apb-uart/i 9)3]OW5baudclkapb_pclkdefault+lokayserial@ff1b0000&rockchip,rk3288-uartsnps,dw-apb-uart/ :)3]PX5baudclkapb_pclktxrxdefault,lokayserial@ff1c0000&rockchip,rk3288-uartsnps,dw-apb-uart/ ;)3]QY5baudclkapb_pclk  txrxdefault-lokaydma-controller@ff250000arm,pl330arm,primecell/%@@Kf] 5apb_pclkthermal-zonesreserve-thermal}.cpu-thermal}d.tripscpu_alert0p*passive/cpu_alert1$*passive0cpu_crit_ *criticalcooling-mapsmap0/0map100gpu-thermal}d.tripsgpu_alert0p*passive1gpu_crit_ *criticalcooling-mapsmap01 2tsadc@ff280000rockchip,rk3288-tsadc/( %]HZ5tsadcapb_pclk3 `tsadc-apbinitdefaultsleep3435slokay*A.ethernet@ff290000rockchip,rk3288-gmac/)\macirqeth_wake_irq58]fgc]M5stmmacethmac_clk_rxmac_clk_txclk_mac_refclk_mac_refoutaclk_macpclk_mac3B `stmmacethlokayl6wrgmiiinput 7 'B@8default90usb@ff500000 generic-ehci/P ]:usblokayusb@ff520000 generic-ohci/R )]:usb ldisabledusb@ff5400002rockchip,rk3288-usbrockchip,rk3066-usbsnps,dwc2/T ]5otghost; usb2-phylokayusb@ff5800002rockchip,rk3288-usbrockchip,rk3066-usbsnps,dwc2/X ]5otgotg/AP@@ < usb2-phy ldisabledusb@ff5c0000 generic-ehci/\ ] ldisableddma-controller@ff600000arm,pl330arm,primecell/`@@Kf] 5apb_pclk ldisabledi2c@ff650000rockchip,rk3288-i2c/e <5i2c]Ldefault=lokaysyr827@40silergy,syr827_/@|vdd_cpu Pp> syr828@41silergy,syr828_/A|vdd_gpu Pp>rrtc@51haoyu,hym8563/Q&?default@xin32kact8846@5aactive-semi,act8846/Zlokay>>> >A$>0BregulatorsREG1|VCC_DDROOREG2|VCC_IO2Z2ZAREG3|VDD_LOG ``REG4|VCC_20BREG5 |VCCIO_SDw@2ZREG6 |VDD10_LCDB@B@REG7 |VCCA_CODEC2Z2ZREG8|VCCA_TP2Z2ZREG9 |VCCIO_PMU2Z2ZREG10|VDD_10B@B@REG11|VCC_18w@w@REG12 |VCC18_LCDw@w@i2c@ff660000rockchip,rk3288-i2c/f =5i2c]NdefaultC ldisabledpwm@ff680000rockchip,rk3288-pwm/h<defaultD]_lokay}pwm@ff680010rockchip,rk3288-pwm/h<defaultE]_ ldisabledpwm@ff680020rockchip,rk3288-pwm/h <defaultF]_ ldisabledpwm@ff680030rockchip,rk3288-pwm/h0<defaultG]_ ldisabledsram@ff700000 mmio-sram/ppsmp-sram@0rockchip,rk3066-smp-sram/sram@ff720000#rockchip,rk3288-pmu-srammmio-sram/rpower-management@ff730000&rockchip,rk3288-pmusysconsimple-mfd/spower-controller!rockchip,rk3288-power-controllerGh Ypower-domain@9/ ]chgfdehilkj$[HIJKLMNOPGpower-domain@11/ ]op[QRGpower-domain@12/ ][SGpower-domain@13/ ][TUGreboot-modesyscon-reboot-modebiRBuRBRB RBsyscon@ff740000rockchip,rk3288-sgrfsyscon/tclock-controller@ff760000rockchip,rk3288-cru/v] 5xin24m5Hjk$#gׄeрxhрxhsyscon@ff770000&rockchip,rk3288-grfsysconsimple-mfd/w5edp-phyrockchip,rk3288-dp-phy]h524mlokayiio-domains"rockchip,rk3288-io-voltage-domain ldisabledusbphyrockchip,rk3288-usb-phylokayusb-phy@320/ ]]5phyclk3 `phy-reset<usb-phy@334/4]^5phyclk3 `phy-reset:usb-phy@348/H]_5phyclk3 `phy-reset;watchdog@ff800000 rockchip,rk3288-wdtsnps,dw-wdt/]p Olokaysound@ff8b0000,rockchip,rk3288-spdifrockchip,rk3066-spdif/]T 5mclkhclkVtx 6defaultW5 ldisabledi2s@ff890000(rockchip,rk3288-i2srockchip,rk3066-i2s/ 5]R5i2s_clki2s_hclkVVtxrxdefaultX ldisabledcrypto@ff8a0000rockchip,rk3288-crypto/@ 0 ]}5aclkhclksclkapb_pclk3 `crypto-rstiommu@ff900800rockchip,iommu/@ ] 5aclkiface ldisablediommu@ff914000rockchip,iommu /@P ] 5aclkiface ldisabledrga@ff920000rockchip,rk3288-rga/ ]j5aclkhclksclk:Y 3ilm `coreaxiahbvop@ff930000rockchip,rk3288-vop / ]5aclk_vopdclk_vophclk_vop:Y 3def `axiahbdclkHZlokayport endpoint@0/O[nendpoint@1/O\jendpoint@2/O]dendpoint@3/O^giommu@ff930300rockchip,iommu/ ] 5aclkiface:Y lokayZvop@ff940000rockchip,rk3288-vop / ]5aclk_vopdclk_vophclk_vop:Y 3 `axiahbdclkH_lokayport endpoint@0/O`oendpoint@1/Oakendpoint@2/Obeendpoint@3/Ochiommu@ff940300rockchip,iommu/ ] 5aclkiface:Y lokay_dsi@ff960000*rockchip,rk3288-mipi-dsisnps,dw-mipi-dsi/@ ]~d 5refpclk:Y 5 ldisabledportsport@0/endpoint@0/Od]endpoint@1/Oebport@1/lvds@ff96c000rockchip,rk3288-lvds/@]g 5pclk_lvdslcdcf:Y 5 ldisabledportsport@0/endpoint@0/Og^endpoint@1/Ohcport@1/dp@ff970000rockchip,rk3288-dp/@ b]ic5dppclkidp:Y 3o`dp5lokay_portsport@0/endpoint@0/Oj\endpoint@1/Okaport@1/endpoint@0/Olhdmi@ff980000rockchip,rk3288-dw-hdmi/3 g]hmn5iahbisfrcec:Y 5lokayimportsport@0/endpoint@0/On[endpoint@1/Oo`port@1/video-codec@ff9a0000rockchip,rk3288-vpu/   \vepuvdpu] 5aclkhclkHp:Y iommu@ff9a0800rockchip,iommu/ ] 5aclkiface:Y piommu@ff9c0440rockchip,iommu /@@@ o] 5aclkiface ldisabledgpu@ffa30000#rockchip,rk3288-maliarm,mali-t760/$ \jobmmugpu]:qN:Y lokayur2opp-table-1operating-points-v2qopp-100000000~opp-200000000 ~opp-300000000B@opp-400000000ׄopp-600000000#Fqos@ffaa0000rockchip,rk3288-qossyscon/ Tqos@ffaa0080rockchip,rk3288-qossyscon/ Uqos@ffad0000rockchip,rk3288-qossyscon/ Iqos@ffad0100rockchip,rk3288-qossyscon/ Jqos@ffad0180rockchip,rk3288-qossyscon/ Kqos@ffad0400rockchip,rk3288-qossyscon/ Lqos@ffad0480rockchip,rk3288-qossyscon/ Mqos@ffad0500rockchip,rk3288-qossyscon/ Hqos@ffad0800rockchip,rk3288-qossyscon/ Nqos@ffad0880rockchip,rk3288-qossyscon/ Oqos@ffad0900rockchip,rk3288-qossyscon/ Pqos@ffae0000rockchip,rk3288-qossyscon/ Sqos@ffaf0000rockchip,rk3288-qossyscon/ Qqos@ffaf0080rockchip,rk3288-qossyscon/ Rdma-controller@ffb20000arm,pl330arm,primecell/@@Kf] 5apb_pclkVefuse@ffb40000rockchip,rk3288-efuse/ ]q 5pclk_efusecpu-id@7/cpu_leakage@17/interrupt-controller@ffc01000 arm,gic-400@/ @ `   pinctrlrockchip,rk3288-pinctrl5gpio@ff750000rockchip,gpio-bank/u Q]@?gpio@ff780000rockchip,gpio-bank/x R]Agpio@ff790000rockchip,gpio-bank/y S]Bgpio@ff7a0000rockchip,gpio-bank/z T]Cgpio@ff7b0000rockchip,gpio-bank/{ U]D7gpio@ff7c0000rockchip,gpio-bank/| V]Egpio@ff7d0000rockchip,gpio-bank/} W]Fgpio@ff7e0000rockchip,gpio-bank/~ X]G{gpio@ff7f0000rockchip,gpio-bank/ Y]Hhdmihdmi-cec-c0shdmi-cec-c7shdmi-ddc sshdmi-ddc-unwedge tspcfg-output-lowtpcfg-pull-upupcfg-pull-downvpcfg-pull-nonespcfg-pull-none-12ma ysuspendglobal-pwroffsddrio-pwroffsddr0-retentionuddr1-retentionuedpedp-hpd vi2c0i2c0-xfer ss=i2c1i2c1-xfer ss%i2c2i2c2-xfer  s sCi2c3i2c3-xfer ss&i2c4i2c4-xfer ss'i2c5i2c5-xfer ss(i2s0i2s0-bus`ssssssXlcdclcdc-ctl@ssssfsdmmcsdmmc-clkw sdmmc-cmdxsdmmc-cdusdmmc-bus1usdmmc-bus4@xxxxsdmmc-pwr ssdio0sdio0-bus1usdio0-bus4@uuuusdio0-cmdusdio0-clkssdio0-cdusdio0-wpusdio0-pwrusdio0-bkpwrusdio0-intusdio1sdio1-bus1usdio1-bus4@uuuusdio1-cdusdio1-wpusdio1-bkpwrusdio1-intusdio1-cmdusdio1-clkssdio1-pwr uemmcemmc-clksemmc-cmduemmc-pwr uemmc-bus1uemmc-bus4@uuuuemmc-bus8uuuuuuuuspi0spi0-clk uspi0-cs0 uspi0-txuspi0-rxuspi0-cs1uspi1spi1-clk uspi1-cs0 u spi1-rxuspi1-txuspi2spi2-cs1uspi2-clku!spi2-cs0u$spi2-rxu#spi2-tx u"uart0uart0-xfer us)uart0-ctsuuart0-rtssuart1uart1-xfer u s*uart1-cts uuart1-rts suart2uart2-xfer us+uart3uart3-xfer us,uart3-cts uuart3-rts suart4uart4-xfer us-uart4-cts uuart4-rts stsadcotp-pin s3otp-out s4pwm0pwm0-pinsDpwm1pwm1-pinsEpwm2pwm2-pinsFpwm3pwm3-pinsGgmacrgmii-pinsssssyyyysss yyss9rmii-pinsssssssssssspdifspdif-tx sWpcfg-pull-none-drv-8mawpcfg-pull-up-drv-8maxbacklightbl-ens|buttonspwrbtnulcdlcd-csslcd-enspmicpmic-intu@usbhost-vbus-drvseth_phyeth-phy-pwrswifiwifi-pwr smemory@0#memory/adc-keys adc-keysz buttons1w@button-up KVolume UpQs\button-down KVolume DownQr\button-menuKMenuQ\ button-escKEscQ\B@button-homeKHomeQf\ backlightpwm-backlightv  !"#$%&'()*+,-./0123456789:;<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[\]^_`abcdefghijklmnopqrstuvwxyz{|}~ {default|}B@~external-gmac-clock fixed-clocksY@ ext_gmac8panellg,lp079qx1-sp0v~ {portsportendpointOlgpio-keys gpio-keysdefaultkey-power ?QtKGPIO Key Powerdregulator-vcc-hostregulator-fixed  ?default |vcc_hostregulator-vcc-phyregulator-fixed  ?default|vcc_phy2Z2Z6regulator-vsysregulator-fixed|vcc_sysLK@LK@>regulator-sdmmcregulator-fixed { default|vcc_sd2Z2Z Aregulator-vcc-lcdregulator-fixed  {default|vcc_lcdAregulator-vcc-wlregulator-fixed  { default|vcc_wl #address-cells#size-cellscompatibleinterrupt-parentmodelethernet0gpio0gpio1gpio2gpio3gpio4gpio5gpio6gpio7gpio8i2c0i2c1i2c2i2c3i2c4i2c5mshc0mshc1mshc2mshc3serial0serial1serial2serial3serial4spi0spi1spi2interruptsinterrupt-affinityenable-methodrockchip,pmudevice_typeregresetsoperating-points-v2#cooling-cellsclocksdynamic-power-coefficientcpu0-supplyphandleopp-sharedopp-hzopp-microvoltclock-latency-nsrangesclock-frequencyclock-output-names#clock-cellsarm,cpu-registers-not-fw-configuredarm,no-tick-in-suspendclock-namesportsmax-frequencyfifo-depthreset-namesstatusbus-widthcap-mmc-highspeedcap-sd-highspeedcard-detect-delaydisable-wppinctrl-namespinctrl-0vmmc-supplyvqmmc-supplynon-removable#io-channel-cellsvref-supplydmasdma-namesreg-shiftreg-io-width#dma-cellsarm,pl330-broken-no-flushparm,pl330-periph-burstpolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresistripcooling-devicepinctrl-1pinctrl-2#thermal-sensor-cellsrockchip,grfrockchip,hw-tshut-temprockchip,hw-tshut-moderockchip,hw-tshut-polarityinterrupt-namesphy-supplyphy-modeclock_in_outsnps,reset-gpiosnps,reset-active-lowsnps,reset-delays-usassigned-clocksassigned-clock-parentstx_delayrx_delayphysphy-namesdr_modesnps,reset-phy-on-wakeg-np-tx-fifo-sizeg-rx-fifo-sizeg-tx-fifo-sizefcs,suspend-voltage-selectorregulator-nameregulator-min-microvoltregulator-max-microvoltregulator-always-onregulator-boot-onvin-supplyvp1-supplyvp2-supplyvp3-supplyvp4-supplyinl1-supplyinl2-supplyinl3-supply#pwm-cells#power-domain-cellspm_qosoffsetmode-normalmode-recoverymode-bootloadermode-loader#reset-cellsassigned-clock-rates#phy-cells#sound-dai-cellsrockchip,playback-channelsrockchip,capture-channels#iommu-cellsrockchip,disable-mmu-resetpower-domainsiommusremote-endpointforce-hpdddc-i2c-busmali-supplyinterrupt-controller#interrupt-cellsgpio-controller#gpio-cellsrockchip,pinsoutput-lowbias-pull-upbias-pull-downbias-disabledrive-strengthio-channelsio-channel-nameskeyup-threshold-microvoltlabellinux,codepress-threshold-microvoltbrightness-levelsdefault-brightness-levelenable-gpiospwmsbacklightpower-supplyautorepeatlinux,input-typewakeup-sourcedebounce-intervalenable-active-highstartup-delay-us