8( mqmaker,miqirockchip,rk3288& 7mqmaker MiQialiases=/ethernet@ff290000G/pinctrl/gpio@ff750000M/pinctrl/gpio@ff780000S/pinctrl/gpio@ff790000Y/pinctrl/gpio@ff7a0000_/pinctrl/gpio@ff7b0000e/pinctrl/gpio@ff7c0000k/pinctrl/gpio@ff7d0000q/pinctrl/gpio@ff7e0000w/pinctrl/gpio@ff7f0000}/i2c@ff650000/i2c@ff140000/i2c@ff660000/i2c@ff150000/i2c@ff160000/i2c@ff170000/mmc@ff0f0000/mmc@ff0c0000/mmc@ff0d0000/mmc@ff0e0000/serial@ff180000/serial@ff190000/serial@ff690000/serial@ff1b0000/serial@ff1c0000/spi@ff110000/spi@ff120000/spi@ff130000arm-pmuarm,cortex-a12-pmu0cpusrockchip,rk3066-smpcpu@500#cpuarm,cortex-a12/3:N]dr~ cpu@501#cpuarm,cortex-a12/3:N]dr~ cpu@502#cpuarm,cortex-a12/3:N]dr~ cpu@503#cpuarm,cortex-a12/3:N]dr~ opp-table-0operating-points-v2opp-126000000 @opp-216000000  opp-312000000 opp-408000000Q opp-600000000#F opp-696000000)|~opp-8160000000,B@opp-1008000000<opp-1200000000Gopp-1416000000TfrOopp-1512000000ZJ opp-1608000000_"preserved-memorydma-unusable@fe000000/oscillator fixed-clockn6xin24m timerarm,armv7-timer0   n6timer@ff810000rockchip,rk3288-timer/  H ]a  4pclktimerdisplay-subsystemrockchip,display-subsystem@ mmc@ff0c0000rockchip,rk3288-dw-mshcFр ]Drv4biuciuciu-driveciu-sampleT / @3_resetkokayr|default mmc@ff0d0000rockchip,rk3288-dw-mshcFр ]Esw4biuciuciu-driveciu-sampleT !/ @3_reset kdisabledmmc@ff0e0000rockchip,rk3288-dw-mshcFр ]Ftx4biuciuciu-driveciu-sampleT "/@3_reset kdisabledmmc@ff0f0000rockchip,rk3288-dw-mshcFр ]Guy4biuciuciu-driveciu-sampleT #/@3_resetkokayr|defaultsaradc@ff100000rockchip,saradc/ $]I[4saradcapb_pclk3W _saradc-apbkokay spi@ff110000(rockchip,rk3288-spirockchip,rk3066-spi]AR4spiclkapb_pclk  txrx ,default/ kdisabledspi@ff120000(rockchip,rk3288-spirockchip,rk3066-spi]BS4spiclkapb_pclk txrx -default !"/ kdisabledspi@ff130000(rockchip,rk3288-spirockchip,rk3066-spi]CT4spiclkapb_pclktxrx .default#$%&/ kdisabledi2c@ff140000rockchip,rk3288-i2c/ >4i2c]Mdefault'kokayi2c@ff150000rockchip,rk3288-i2c/ ?4i2c]Odefault( kdisabledi2c@ff160000rockchip,rk3288-i2c/ @4i2c]Pdefault)kokayi2c@ff170000rockchip,rk3288-i2c/ A4i2c]Qdefault*kokaypserial@ff180000&rockchip,rk3288-uartsnps,dw-apb-uart/ 7(2]MU4baudclkapb_pclktxrxdefault+ kdisabledserial@ff190000&rockchip,rk3288-uartsnps,dw-apb-uart/ 8(2]NV4baudclkapb_pclktxrxdefault, kdisabledserial@ff690000&rockchip,rk3288-uartsnps,dw-apb-uart/i 9(2]OW4baudclkapb_pclkdefault-kokayserial@ff1b0000&rockchip,rk3288-uartsnps,dw-apb-uart/ :(2]PX4baudclkapb_pclktxrxdefault.kokayserial@ff1c0000&rockchip,rk3288-uartsnps,dw-apb-uart/ ;(2]QY4baudclkapb_pclk  txrxdefault/ kdisableddma-controller@ff250000arm,pl330arm,primecell/%@?Je] 4apb_pclkthermal-zonesreserve-thermal|0cpu-thermal|d0tripscpu_alert0p*passive1cpu_alert1$*passive2cpu_crit_ *criticalcooling-mapsmap010map120gpu-thermal|d0tripsgpu_alert0p*passive3gpu_crit_ *criticalcooling-mapsmap03 4tsadc@ff280000rockchip,rk3288-tsadc/( %]HZ4tsadcapb_pclk3 _tsadc-apbinitdefaultsleep5657skokay)@0ethernet@ff290000rockchip,rk3288-gmac/)[macirqeth_wake_irq78]fgc]M4stmmacethmac_clk_rxmac_clk_txclk_mac_refclk_mac_refoutaclk_macpclk_mac3B _stmmacethkokayk{8inputdefault9:;<=rgmii 'B@ >0usb@ff500000 generic-ehci/P ]?usb kdisabledusb@ff520000 generic-ohci/R )]?usb kdisabledusb@ff5400002rockchip,rk3288-usbrockchip,rk3066-usbsnps,dwc2/T ]4otghost@ usb2-phykokayusb@ff5800002rockchip,rk3288-usbrockchip,rk3066-usbsnps,dwc2/X ]4otg peripheral.@O@@ A usb2-phykokayusb@ff5c0000 generic-ehci/\ ] kdisableddma-controller@ff600000arm,pl330arm,primecell/`@?Je] 4apb_pclk kdisabledi2c@ff650000rockchip,rk3288-i2c/e <4i2c]LdefaultBkokaysyr827@40silergy,syr827^/@{vdd_cpu Pp,@C syr828@41silergy,syr828^/A{vdd_gpu PpCurtc@51haoyu,hym8563/Qxin32kact8846@5aactive-semi,act8846/ZdefaultD4C?CJCUC`ClCxEregulatorsREG1{vcc_ddrREG2{vcc_io2Z2ZREG3{vdd_logREG4{vcc_20EREG5 {vccio_sd2Z2ZREG6 {vdd10_lcdB@B@REG7{vcca_18w@w@REG8{vcca_332Z2ZYREG9{vcc_lan2Z2Z=REG10{vdd_10B@B@REG11{vcc_18w@w@REG12 {vcc18_lcdw@w@i2c@ff660000rockchip,rk3288-i2c/f =4i2c]NdefaultFkokaypwm@ff680000rockchip,rk3288-pwm/hdefaultG]_ kdisabledpwm@ff680010rockchip,rk3288-pwm/hdefaultH]_ kdisabledpwm@ff680020rockchip,rk3288-pwm/h defaultI]_ kdisabledpwm@ff680030rockchip,rk3288-pwm/h0defaultJ]_ kdisabledsram@ff700000 mmio-sram/ppsmp-sram@0rockchip,rk3066-smp-sram/sram@ff720000#rockchip,rk3288-pmu-srammmio-sram/rpower-management@ff730000&rockchip,rk3288-pmusysconsimple-mfd/spower-controller!rockchip,rk3288-power-controllerkh{ ]power-domain@9/ ]chgfdehilkj$KLMNOPQRSpower-domain@11/ ]opTUpower-domain@12/ ]Vpower-domain@13/ ]WXreboot-modesyscon-reboot-modeRBRBRB RBsyscon@ff740000rockchip,rk3288-sgrfsyscon/tclock-controller@ff760000rockchip,rk3288-cru/v] 4xin24m7Hkjk$#gׄeрxhрxhsyscon@ff770000&rockchip,rk3288-grfsysconsimple-mfd/w7edp-phyrockchip,rk3288-dp-phy]h424m  kdisabledmio-domains"rockchip,rk3288-io-voltage-domainkokayY!/==K[guusbphyrockchip,rk3288-usb-phykokayusb-phy@320 / ]]4phyclk3 _phy-resetAusb-phy@334 /4]^4phyclk3 _phy-reset?usb-phy@348 /H]_4phyclk3 _phy-reset@watchdog@ff800000 rockchip,rk3288-wdtsnps,dw-wdt/]p Okokaysound@ff8b0000,rockchip,rk3288-spdifrockchip,rk3066-spdif/]T 4mclkhclkZtx 6default[7 kdisabledi2s@ff890000(rockchip,rk3288-i2srockchip,rk3066-i2s/ 5]R4i2s_clki2s_hclkZZtxrxdefault\ kdisabledcrypto@ff8a0000rockchip,rk3288-crypto/@ 0 ]}4aclkhclksclkapb_pclk3 _crypto-rstiommu@ff900800rockchip,iommu/@ ] 4aclkiface kdisablediommu@ff914000rockchip,iommu /@P ] 4aclkiface kdisabledrga@ff920000rockchip,rk3288-rga/ ]j4aclkhclksclk] 3ilm _coreaxiahbvop@ff930000rockchip,rk3288-vop / ]4aclk_vopdclk_vophclk_vop] 3def _axiahbdclk^kokayport endpoint@0/_qendpoint@1/`nendpoint@2/ahendpoint@3/bkiommu@ff930300rockchip,iommu/ ] 4aclkiface] kokay^vop@ff940000rockchip,rk3288-vop / ]4aclk_vopdclk_vophclk_vop] 3 _axiahbdclkckokayport endpoint@0/drendpoint@1/eoendpoint@2/fiendpoint@3/gliommu@ff940300rockchip,iommu/ ] 4aclkiface] kokaycdsi@ff960000*rockchip,rk3288-mipi-dsisnps,dw-mipi-dsi/@ ]~d 4refpclk] 7 kdisabledportsport@0/endpoint@0/haendpoint@1/ifport@1/lvds@ff96c000rockchip,rk3288-lvds/@]g 4pclk_lvdslcdcj] 7 kdisabledportsport@0/endpoint@0/kbendpoint@1/lgport@1/dp@ff970000rockchip,rk3288-dp/@ b]ic4dppclkmdp] 3o_dp7 kdisabledportsport@0/endpoint@0/n`endpoint@1/oeport@1/hdmi@ff980000rockchip,rk3288-dw-hdmi/2 g]hmn4iahbisfrcec] 7kokaypportsport@0/endpoint@0/q_endpoint@1/rdport@1/video-codec@ff9a0000rockchip,rk3288-vpu/   [vepuvdpu] 4aclkhclks] iommu@ff9a0800rockchip,iommu/ ] 4aclkiface] siommu@ff9c0440rockchip,iommu /@@@ o] 4aclkiface kdisabledgpu@ffa30000#rockchip,rk3288-maliarm,mali-t760/$ [jobmmugpu]:tN] kokay u4opp-table-1operating-points-v2topp-100000000~opp-200000000 ~opp-300000000B@opp-400000000ׄopp-600000000#Fqos@ffaa0000rockchip,rk3288-qossyscon/ Wqos@ffaa0080rockchip,rk3288-qossyscon/ Xqos@ffad0000rockchip,rk3288-qossyscon/ Lqos@ffad0100rockchip,rk3288-qossyscon/ Mqos@ffad0180rockchip,rk3288-qossyscon/ Nqos@ffad0400rockchip,rk3288-qossyscon/ Oqos@ffad0480rockchip,rk3288-qossyscon/ Pqos@ffad0500rockchip,rk3288-qossyscon/ Kqos@ffad0800rockchip,rk3288-qossyscon/ Qqos@ffad0880rockchip,rk3288-qossyscon/ Rqos@ffad0900rockchip,rk3288-qossyscon/ Sqos@ffae0000rockchip,rk3288-qossyscon/ Vqos@ffaf0000rockchip,rk3288-qossyscon/ Tqos@ffaf0080rockchip,rk3288-qossyscon/ Udma-controller@ffb20000arm,pl330arm,primecell/@?Je] 4apb_pclkZefuse@ffb40000rockchip,rk3288-efuse/ ]q 4pclk_efusecpu-id@7/cpu_leakage@17/interrupt-controller@ffc01000 arm,gic-400,A@/ @ `   pinctrlrockchip,rk3288-pinctrl7gpio@ff750000rockchip,gpio-bank/u Q]@Rb,A~gpio@ff780000rockchip,gpio-bank/x R]ARb,Agpio@ff790000rockchip,gpio-bank/y S]BRb,Agpio@ff7a0000rockchip,gpio-bank/z T]CRb,Agpio@ff7b0000rockchip,gpio-bank/{ U]DRb,A>gpio@ff7c0000rockchip,gpio-bank/| V]ERb,Agpio@ff7d0000rockchip,gpio-bank/} W]FRb,Agpio@ff7e0000rockchip,gpio-bank/~ X]GRb,A}gpio@ff7f0000rockchip,gpio-bank/ Y]HRb,Ahdmihdmi-cec-c0nvhdmi-cec-c7nvhdmi-ddc nvvhdmi-ddc-unwedge nwvpcfg-output-low|wpcfg-pull-upxpcfg-pull-downypcfg-pull-nonevpcfg-pull-none-12ma zsuspendglobal-pwroffnvddrio-pwroffnvddr0-retentionnxddr1-retentionnxedpedp-hpdn yi2c0i2c0-xfer nvvBi2c1i2c1-xfer nvv'i2c2i2c2-xfer n v vFi2c3i2c3-xfer nvv(i2c4i2c4-xfer nvv)i2c5i2c5-xfer nvv*i2s0i2s0-bus`nvvvvvv\lcdclcdc-ctl@nvvvvjsdmmcsdmmc-clknz sdmmc-cmdn{sdmmc-cdnxsdmmc-bus1nxsdmmc-bus4@n{{{{sdmmc-pwrn vsdio0sdio0-bus1nxsdio0-bus4@nxxxxsdio0-cmdnxsdio0-clknvsdio0-cdnxsdio0-wpnxsdio0-pwrnxsdio0-bkpwrnxsdio0-intnxsdio1sdio1-bus1nxsdio1-bus4@nxxxxsdio1-cdnxsdio1-wpnxsdio1-bkpwrnxsdio1-intnxsdio1-cmdnxsdio1-clknvsdio1-pwrn xemmcemmc-clknvemmc-cmdnxemmc-pwrn xemmc-bus1nxemmc-bus4@nxxxxemmc-bus8nxxxxxxxxspi0spi0-clkn xspi0-cs0n xspi0-txnxspi0-rxnxspi0-cs1nxspi1spi1-clkn xspi1-cs0n x"spi1-rxnx!spi1-txnx spi2spi2-cs1nxspi2-clknx#spi2-cs0nx&spi2-rxnx%spi2-txn x$uart0uart0-xfer nxv+uart0-ctsnxuart0-rtsnvuart1uart1-xfer nx v,uart1-ctsn xuart1-rtsn vuart2uart2-xfer nxv-uart3uart3-xfer nxv.uart3-ctsn xuart3-rtsn vuart4uart4-xfer nxv/uart4-ctsn xuart4-rtsn vtsadcotp-pinn v5otp-outn v6pwm0pwm0-pinnvGpwm1pwm1-pinnvHpwm2pwm2-pinnvIpwm3pwm3-pinnvJgmacrgmii-pinsnvvvvzzzzvvv zzvv9rmii-pinsnvvvvvvvvvvphy-intn x<phy-pmebnx;phy-rstn|:spdifspdif-txn v[pcfg-output-high|pcfg-pull-up-drv-12ma {act8846pmic-intnxpmic-sleepnwpmic-vselnwDusb_hosthost-vbus-drvnvchosenserial2:115200n8memory@0#memory/external-gmac-clock fixed-clocksY@ ext_gmac8leds gpio-ledsled-0 }miqi:green:usertimerregulator-flashregulator-fixed {vcc_flashw@w@regulator-usb-hostregulator-fixed ~default {vcc_hostLK@LK@Cregulator-sdmmcregulator-fixed } default{vcc_sd2Z2Z regulator-vsysregulator-fixed{vcc_sysLK@LK@C #address-cells#size-cellscompatibleinterrupt-parentmodelethernet0gpio0gpio1gpio2gpio3gpio4gpio5gpio6gpio7gpio8i2c0i2c1i2c2i2c3i2c4i2c5mshc0mshc1mshc2mshc3serial0serial1serial2serial3serial4spi0spi1spi2interruptsinterrupt-affinityenable-methodrockchip,pmudevice_typeregresetsoperating-points-v2#cooling-cellsclocksdynamic-power-coefficientcpu-supplyphandleopp-sharedopp-hzopp-microvoltclock-latency-nsrangesclock-frequencyclock-output-names#clock-cellsarm,cpu-registers-not-fw-configuredarm,no-tick-in-suspendclock-namesportsmax-frequencyfifo-depthreset-namesstatusbus-widthcap-mmc-highspeedcap-sd-highspeedcard-detect-delaydisable-wppinctrl-namespinctrl-0vmmc-supplyvqmmc-supplynon-removable#io-channel-cellsvref-supplydmasdma-namesreg-shiftreg-io-width#dma-cellsarm,pl330-broken-no-flushparm,pl330-periph-burstpolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresistripcooling-devicepinctrl-1pinctrl-2#thermal-sensor-cellsrockchip,grfrockchip,hw-tshut-temprockchip,hw-tshut-moderockchip,hw-tshut-polarityinterrupt-namesassigned-clocksassigned-clock-parentsclock_in_outphy-supplyphy-modesnps,reset-active-lowsnps,reset-delays-ussnps,reset-gpiotx_delayrx_delayphysphy-namesdr_modesnps,reset-phy-on-wakeg-np-tx-fifo-sizeg-rx-fifo-sizeg-tx-fifo-sizefcs,suspend-voltage-selectorregulator-nameregulator-min-microvoltregulator-max-microvoltregulator-always-onregulator-boot-onregulator-enable-ramp-delayregulator-ramp-delayvin-supplysystem-power-controllervp1-supplyvp2-supplyvp3-supplyvp4-supplyinl1-supplyinl2-supplyinl3-supply#pwm-cells#power-domain-cellspm_qosoffsetmode-normalmode-recoverymode-bootloadermode-loader#reset-cellsassigned-clock-rates#phy-cellsaudio-supplyflash0-supplyflash1-supplygpio30-supplygpio1830-supplylcdc-supplysdcard-supplywifi-supply#sound-dai-cellsrockchip,playback-channelsrockchip,capture-channels#iommu-cellsrockchip,disable-mmu-resetpower-domainsiommusremote-endpointddc-i2c-busmali-supplyinterrupt-controller#interrupt-cellsgpio-controller#gpio-cellsrockchip,pinsoutput-lowbias-pull-upbias-pull-downbias-disabledrive-strengthoutput-highstdout-pathgpioslabellinux,default-triggerenable-active-highstartup-delay-us