8( `#asus,rk3288-tinkerrockchip,rk3288&"7Rockchip RK3288 Asus Tinker Boardaliases=/ethernet@ff290000G/pinctrl/gpio@ff750000M/pinctrl/gpio@ff780000S/pinctrl/gpio@ff790000Y/pinctrl/gpio@ff7a0000_/pinctrl/gpio@ff7b0000e/pinctrl/gpio@ff7c0000k/pinctrl/gpio@ff7d0000q/pinctrl/gpio@ff7e0000w/pinctrl/gpio@ff7f0000}/i2c@ff650000/i2c@ff140000/i2c@ff660000/i2c@ff150000/i2c@ff160000/i2c@ff170000/mmc@ff0f0000/mmc@ff0c0000/mmc@ff0d0000/mmc@ff0e0000/serial@ff180000/serial@ff190000/serial@ff690000/serial@ff1b0000/serial@ff1c0000/spi@ff110000/spi@ff120000/spi@ff130000arm-pmuarm,cortex-a12-pmu0cpusrockchip,rk3066-smpcpu@500#cpuarm,cortex-a12/3:N]dr~ cpu@501#cpuarm,cortex-a12/3:N]drcpu@502#cpuarm,cortex-a12/3:N]drcpu@503#cpuarm,cortex-a12/3:N]dropp-table-0operating-points-v2opp-126000000 @opp-216000000  opp-312000000 opp-408000000Q opp-600000000#F opp-696000000)|~opp-8160000000,B@opp-1008000000<opp-1200000000Gopp-1416000000TfrOopp-1512000000ZJ opp-1608000000_"popp-1704000000epopp-1800000000kI\reserved-memorydma-unusable@fe000000/oscillator fixed-clockn6xin24m timerarm,armv7-timer0   n6timer@ff810000rockchip,rk3288-timer/  H ]a  5pclktimerdisplay-subsystemrockchip,display-subsystemA mmc@ff0c0000rockchip,rk3288-dw-mshcGр ]Drv5biuciuciu-driveciu-sampleU / @3`resetlokays}default mmc@ff0d0000rockchip,rk3288-dw-mshcG ]Esw5biuciuciu-driveciu-sampleU !/ @3`resetlokays default"/<mmc@ff0e0000rockchip,rk3288-dw-mshcGр ]Ftx5biuciuciu-driveciu-sampleU "/@3`reset ldisabledmmc@ff0f0000rockchip,rk3288-dw-mshcGр ]Guy5biuciuciu-driveciu-sampleU #/@3`reset ldisabledsaradc@ff100000rockchip,saradc/ $I]I[5saradcapb_pclk3W `saradc-apblokay[spi@ff110000(rockchip,rk3288-spirockchip,rk3066-spi]AR5spiclkapb_pclkg  ltxrx ,default/ ldisabledspi@ff120000(rockchip,rk3288-spirockchip,rk3066-spi]BS5spiclkapb_pclkg ltxrx -default !"#/ ldisabledspi@ff130000(rockchip,rk3288-spirockchip,rk3066-spi]CT5spiclkapb_pclkgltxrx .default$%&'/ ldisabledi2c@ff140000rockchip,rk3288-i2c/ >5i2c]Mdefault( ldisabledi2c@ff150000rockchip,rk3288-i2c/ ?5i2c]Odefault) ldisabledi2c@ff160000rockchip,rk3288-i2c/ @5i2c]Pdefault* ldisabledi2c@ff170000rockchip,rk3288-i2c/ A5i2c]Qdefault+lokaypserial@ff180000&rockchip,rk3288-uartsnps,dw-apb-uart/ 7v]MU5baudclkapb_pclkgltxrxdefault,lokayserial@ff190000&rockchip,rk3288-uartsnps,dw-apb-uart/ 8v]NV5baudclkapb_pclkgltxrxdefault-lokayserial@ff690000&rockchip,rk3288-uartsnps,dw-apb-uart/i 9v]OW5baudclkapb_pclkdefault.lokayserial@ff1b0000&rockchip,rk3288-uartsnps,dw-apb-uart/ :v]PX5baudclkapb_pclkgltxrxdefault/lokayserial@ff1c0000&rockchip,rk3288-uartsnps,dw-apb-uart/ ;v]QY5baudclkapb_pclkg  ltxrxdefault0lokaydma-controller@ff250000arm,pl330arm,primecell/%@] 5apb_pclkthermal-zonesreserve-thermal1cpu-thermald1tripscpu_alert0p *passive2cpu_alert1$ *passive3cpu_crit_  *criticalcooling-mapsmap020map130gpu-thermald1tripsgpu_alert0p *passive4gpu_crit_  *criticalcooling-mapsmap04 5tsadc@ff280000rockchip,rk3288-tsadc/( %]HZ5tsadcapb_pclk3 `tsadc-apbinitdefaultsleep6)736=S8`slokayw1ethernet@ff290000rockchip,rk3288-gmac/)macirqeth_wake_irqS88]fgc]M5stmmacethmac_clk_rxmac_clk_txclk_mac_refclk_mac_refoutaclk_macpclk_mac3B `stmmacethlokay9inputrgmii:default; < ''B@<0Eusb@ff500000 generic-ehci/P ]N=Susblokayusb@ff520000 generic-ohci/R )]N=Susb ldisabledusb@ff5400002rockchip,rk3288-usbrockchip,rk3066-usbsnps,dwc2/T ]5otg]hostN> Susb2-phyelokayusb@ff5800002rockchip,rk3288-usbrockchip,rk3066-usbsnps,dwc2/X ]5otg]otg|@@ N? Susb2-phylokayusb@ff5c0000 generic-ehci/\ ] ldisableddma-controller@ff600000arm,pl330arm,primecell/`@] 5apb_pclk ldisabledi2c@ff650000rockchip,rk3288-i2c/e <5i2c]Ldefault@lokaypmic@1brockchip,rk808/&Axin32krk808-clkout2A A defaultBCDEFFF FF!F-9ERF_lregulatorsDCDC_REG1y q\vdd_armp regulator-state-memDCDC_REG2y Pvdd_gpupuregulator-state-mem $B@DCDC_REG3yvcc_ddrregulator-state-mem DCDC_REG4y2Z2Zvcc_ioregulator-state-mem $2ZLDO_REG1yw@w@ vcc18_ldo1regulator-state-mem $w@LDO_REG2y2Z2Z vcc33_mipiregulator-state-memLDO_REG3yB@B@vdd_10regulator-state-mem $B@LDO_REG4yw@w@ vcc18_codecregulator-state-mem $w@LDO_REG5yw@2Z vccio_sdregulator-state-mem $2ZLDO_REG6yB@B@ vdd10_lcdregulator-state-mem $B@LDO_REG7yw@w@vcc_18regulator-state-mem $w@LDO_REG8yw@w@ vcc18_lcdregulator-state-mem $w@SWITCH_REG1y vcc33_sdregulator-state-mem SWITCH_REG2y vcc33_lan:regulator-state-mem i2c@ff660000rockchip,rk3288-i2c/f =5i2c]NdefaultGlokaypwm@ff680000rockchip,rk3288-pwm/h@defaultH]_lokaypwm@ff680010rockchip,rk3288-pwm/h@defaultI]_ ldisabledpwm@ff680020rockchip,rk3288-pwm/h @defaultJ]_ ldisabledpwm@ff680030rockchip,rk3288-pwm/h0@defaultK]_ ldisabledsram@ff700000 mmio-sram/ppsmp-sram@0rockchip,rk3066-smp-sram/sram@ff720000#rockchip,rk3288-pmu-srammmio-sram/rpower-management@ff730000&rockchip,rk3288-pmusysconsimple-mfd/spower-controller!rockchip,rk3288-power-controllerKh ]power-domain@9/ ]chgfdehilkj$_LMNOPQRSTKpower-domain@11/ ]op_UVKpower-domain@12/ ]_WKpower-domain@13/ ]_XYKreboot-modesyscon-reboot-modefmRByRBRB RBsyscon@ff740000rockchip,rk3288-sgrfsyscon/tclock-controller@ff760000rockchip,rk3288-cru/v] 5xin24mS8Hjk$#gׄeрxhрxhsyscon@ff770000&rockchip,rk3288-grfsysconsimple-mfd/w8edp-phyrockchip,rk3288-dp-phy]h524m ldisabledmio-domains"rockchip,rk3288-io-voltage-domainlokayusbphyrockchip,rk3288-usb-phylokayusb-phy@320/ ]]5phyclk3 `phy-reset?usb-phy@334/4]^5phyclk3 `phy-reset=usb-phy@348/H]_5phyclk3 `phy-reset>watchdog@ff800000 rockchip,rk3288-wdtsnps,dw-wdt/]p Olokaysound@ff8b0000,rockchip,rk3288-spdifrockchip,rk3066-spdif/]T 5mclkhclkgZltx 6default[S8 ldisabledi2s@ff890000(rockchip,rk3288-i2srockchip,rk3066-i2s/ 5]R5i2s_clki2s_hclkgZZltxrxdefault\lokaycrypto@ff8a0000rockchip,rk3288-crypto/@ 0 ]}5aclkhclksclkapb_pclk3 `crypto-rstiommu@ff900800rockchip,iommu/@ ] 5aclkiface0 ldisablediommu@ff914000rockchip,iommu /@P ] 5aclkiface0= ldisabledrga@ff920000rockchip,rk3288-rga/ ]j5aclkhclksclkX] 3ilm `coreaxiahbvop@ff930000rockchip,rk3288-vop / ]5aclk_vopdclk_vophclk_vopX] 3def `axiahbdclkf^lokayport endpoint@0/m_qendpoint@1/m`nendpoint@2/mahendpoint@3/mbkiommu@ff930300rockchip,iommu/ ] 5aclkifaceX] 0lokay^vop@ff940000rockchip,rk3288-vop / ]5aclk_vopdclk_vophclk_vopX] 3 `axiahbdclkfclokayport endpoint@0/mdrendpoint@1/meoendpoint@2/mfiendpoint@3/mgliommu@ff940300rockchip,iommu/ ] 5aclkifaceX] 0lokaycdsi@ff960000*rockchip,rk3288-mipi-dsisnps,dw-mipi-dsi/@ ]~d 5refpclkX] S8 ldisabledportsport@0/endpoint@0/mhaendpoint@1/mifport@1/lvds@ff96c000rockchip,rk3288-lvds/@]g 5pclk_lvdslcdcjX] S8 ldisabledportsport@0/endpoint@0/mkbendpoint@1/mlgport@1/dp@ff970000rockchip,rk3288-dp/@ b]ic5dppclkNmSdpX] 3o`dpS8 ldisabledportsport@0/endpoint@0/mn`endpoint@1/moeport@1/hdmi@ff980000rockchip,rk3288-dw-hdmi/ g]hmn5iahbisfrcecX] S8lokay}pportsport@0/endpoint@0/mq_endpoint@1/mrdport@1/video-codec@ff9a0000rockchip,rk3288-vpu/   vepuvdpu] 5aclkhclkfsX] iommu@ff9a0800rockchip,iommu/ ] 5aclkiface0X] siommu@ff9c0440rockchip,iommu /@@@ o] 5aclkiface0 ldisabledgpu@ffa30000#rockchip,rk3288-maliarm,mali-t760/$ jobmmugpu]:tNX] lokayu5opp-table-1operating-points-v2topp-100000000~opp-200000000 ~opp-300000000B@opp-400000000ׄopp-600000000#Fqos@ffaa0000rockchip,rk3288-qossyscon/ Xqos@ffaa0080rockchip,rk3288-qossyscon/ Yqos@ffad0000rockchip,rk3288-qossyscon/ Mqos@ffad0100rockchip,rk3288-qossyscon/ Nqos@ffad0180rockchip,rk3288-qossyscon/ Oqos@ffad0400rockchip,rk3288-qossyscon/ Pqos@ffad0480rockchip,rk3288-qossyscon/ Qqos@ffad0500rockchip,rk3288-qossyscon/ Lqos@ffad0800rockchip,rk3288-qossyscon/ Rqos@ffad0880rockchip,rk3288-qossyscon/ Sqos@ffad0900rockchip,rk3288-qossyscon/ Tqos@ffae0000rockchip,rk3288-qossyscon/ Wqos@ffaf0000rockchip,rk3288-qossyscon/ Uqos@ffaf0080rockchip,rk3288-qossyscon/ Vdma-controller@ffb20000arm,pl330arm,primecell/@] 5apb_pclkZefuse@ffb40000rockchip,rk3288-efuse/ ]q 5pclk_efusecpu-id@7/cpu_leakage@17/interrupt-controller@ffc01000 arm,gic-400@/ @ `   pinctrlrockchip,rk3288-pinctrlS8gpio@ff750000rockchip,gpio-bank/u Q]@Agpio@ff780000rockchip,gpio-bank/x R]A~gpio@ff790000rockchip,gpio-bank/y S]Bgpio@ff7a0000rockchip,gpio-bank/z T]Cgpio@ff7b0000rockchip,gpio-bank/{ U]D<gpio@ff7c0000rockchip,gpio-bank/| V]Egpio@ff7d0000rockchip,gpio-bank/} W]Fgpio@ff7e0000rockchip,gpio-bank/~ X]Ggpio@ff7f0000rockchip,gpio-bank/ Y]Hhdmihdmi-cec-c0vhdmi-cec-c7vhdmi-ddc vvhdmi-ddc-unwedge wvpcfg-output-lowwpcfg-pull-upxpcfg-pull-downypcfg-pull-none vpcfg-pull-none-12ma   |suspendglobal-pwroffvCddrio-pwroffvddr0-retentionxddr1-retentionxedpedp-hpd yi2c0i2c0-xfer vv@i2c1i2c1-xfer vv(i2c2i2c2-xfer  v vGi2c3i2c3-xfer vv)i2c4i2c4-xfer vv*i2c5i2c5-xfer vv+i2s0i2s0-bus`vvvvvv\lcdclcdc-ctl@vvvvjsdmmcsdmmc-clkz sdmmc-cmd{sdmmc-cdxsdmmc-bus1xsdmmc-bus4@{{{{sdmmc-pwr vsdio0sdio0-bus1xsdio0-bus4@xxxxsdio0-cmdxsdio0-clkvsdio0-cdxsdio0-wpxsdio0-pwrxsdio0-bkpwrxsdio0-intxsdio1sdio1-bus1xsdio1-bus4@xxxxsdio1-cdxsdio1-wpxsdio1-bkpwrxsdio1-intxsdio1-cmdxsdio1-clkvsdio1-pwr xemmcemmc-clkvemmc-cmdxemmc-pwr xemmc-bus1xemmc-bus4@xxxxemmc-bus8xxxxxxxxspi0spi0-clk xspi0-cs0 xspi0-txxspi0-rxxspi0-cs1xspi1spi1-clk x spi1-cs0 x#spi1-rxx"spi1-txx!spi2spi2-cs1xspi2-clkx$spi2-cs0x'spi2-rxx&spi2-tx x%uart0uart0-xfer xv,uart0-ctsxuart0-rtsvuart1uart1-xfer x v-uart1-cts xuart1-rts vuart2uart2-xfer xv.uart3uart3-xfer xv/uart3-cts xuart3-rts vuart4uart4-xfer xv0uart4-cts xuart4-rts vtsadcotp-pin v6otp-out v7pwm0pwm0-pinvHpwm1pwm1-pinvIpwm2pwm2-pinvJpwm3pwm3-pinvKgmacrgmii-pinsvvvv||||vvv ||vv;rmii-pinsvvvvvvvvvvspdifspdif-tx v[pcfg-pull-none-drv-8ma zpcfg-pull-up-drv-8ma {backlightbl-envbuttonspwrbtnx}eth_phyeth-phy-pwrvpmicpmic-intxBdvs-1 yDdvs-2 yEusbhost-vbus-drvvpwr-3gvsdiowifi-enable vvchosen (serial2:115200n8memory/#memoryexternal-gmac-clock fixed-clocksY@ ext_gmac9gpio-keys gpio-keys 4default}button A ?t JGPIO Key Power P adgpio-leds gpio-ledsled-0 ~ smmc0led-1 ~ sheartbeatled-2 A sdefault-onsdio-pwrseqmmc-pwrseq-simple] 5ext_clockdefault <<soundsimple-audio-card i2s rockchip,tinker-codec simple-audio-card,codec simple-audio-card,cpu regulator-vsysregulator-fixedvcc_sysLK@LK@yFregulator-sdmmcregulator-fixed  defaultvcc_sd2Z2Z   #address-cells#size-cellscompatibleinterrupt-parentmodelethernet0gpio0gpio1gpio2gpio3gpio4gpio5gpio6gpio7gpio8i2c0i2c1i2c2i2c3i2c4i2c5mshc0mshc1mshc2mshc3serial0serial1serial2serial3serial4spi0spi1spi2interruptsinterrupt-affinityenable-methodrockchip,pmudevice_typeregresetsoperating-points-v2#cooling-cellsclocksdynamic-power-coefficientcpu0-supplyphandleopp-sharedopp-hzopp-microvoltclock-latency-nsrangesclock-frequencyclock-output-names#clock-cellsarm,cpu-registers-not-fw-configuredarm,no-tick-in-suspendclock-namesportsmax-frequencyfifo-depthreset-namesstatusbus-widthcap-mmc-highspeedcap-sd-highspeedbroken-cddisable-wppinctrl-namespinctrl-0vmmc-supplyvqmmc-supplycap-sdio-irqkeep-power-in-suspendmmc-pwrseqnon-removablesd-uhs-sdr12sd-uhs-sdr25sd-uhs-sdr50#io-channel-cellsvref-supplydmasdma-namesreg-shiftreg-io-width#dma-cellsarm,pl330-broken-no-flushparm,pl330-periph-burstpolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresistripcooling-devicepinctrl-1pinctrl-2#thermal-sensor-cellsrockchip,grfrockchip,hw-tshut-temprockchip,hw-tshut-moderockchip,hw-tshut-polarityinterrupt-namesassigned-clocksassigned-clock-parentsclock_in_outphy-modephy-supplysnps,reset-gpiosnps,reset-active-lowsnps,reset-delays-ustx_delayrx_delayphysphy-namesdr_modesnps,reset-phy-on-wakeg-np-tx-fifo-sizeg-rx-fifo-sizeg-tx-fifo-sizedvs-gpiosrockchip,system-power-controllerwakeup-sourcevcc1-supplyvcc2-supplyvcc3-supplyvcc4-supplyvcc6-supplyvcc7-supplyvcc8-supplyvcc9-supplyvcc10-supplyvcc11-supplyvcc12-supplyvddio-supplyregulator-always-onregulator-boot-onregulator-min-microvoltregulator-max-microvoltregulator-nameregulator-ramp-delayregulator-off-in-suspendregulator-on-in-suspendregulator-suspend-microvolt#pwm-cells#power-domain-cellspm_qosoffsetmode-normalmode-recoverymode-bootloadermode-loader#reset-cellsassigned-clock-rates#phy-cellssdcard-supplywifi-supply#sound-dai-cellsrockchip,playback-channelsrockchip,capture-channels#iommu-cellsrockchip,disable-mmu-resetpower-domainsiommusremote-endpointddc-i2c-busmali-supplyinterrupt-controller#interrupt-cellsgpio-controller#gpio-cellsrockchip,pinsoutput-lowbias-pull-upbias-pull-downbias-disabledrive-strengthstdout-pathautorepeatlinux,codelabellinux,input-typedebounce-intervallinux,default-triggerreset-gpiossimple-audio-card,formatsimple-audio-card,namesimple-audio-card,mclk-fssound-daistartup-delay-usvin-supply