8\( $Kgoogle,veyron-brain-rev0google,veyron-braingoogle,veyronrockchip,rk3288& 7Google Brainaliases=/ethernet@ff290000G/pinctrl/gpio@ff750000M/pinctrl/gpio@ff780000S/pinctrl/gpio@ff790000Y/pinctrl/gpio@ff7a0000_/pinctrl/gpio@ff7b0000e/pinctrl/gpio@ff7c0000k/pinctrl/gpio@ff7d0000q/pinctrl/gpio@ff7e0000w/pinctrl/gpio@ff7f0000}/i2c@ff650000/i2c@ff140000/i2c@ff660000/i2c@ff150000/i2c@ff160000/i2c@ff170000/mmc@ff0f0000/mmc@ff0c0000/mmc@ff0d0000/mmc@ff0e0000/serial@ff180000/serial@ff190000/serial@ff690000/serial@ff1b0000/serial@ff1c0000/spi@ff110000/spi@ff120000/spi@ff130000/mmc@ff0f0000arm-pmuarm,cortex-a12-pmu0cpus rockchip,rk3066-smpcpu@500(cpuarm,cortex-a1248?Sbir cpu@501(cpuarm,cortex-a1248?Sbircpu@502(cpuarm,cortex-a1248?Sbircpu@503(cpuarm,cortex-a1248?Sbiropp-table-0operating-points-v2opp-126000000 @opp-216000000  opp-408000000Q opp-600000000#F opp-696000000)|~opp-8160000000,B@opp-1008000000<opp-1200000000Gopp-1416000000TfrOopp-1512000000ZJopp-1608000000_" opp-1704000000epopp-1800000000kI\reserved-memorydma-unusable@fe0000004oscillator fixed-clockn6xin24m timerarm,armv7-timer0   n6#timer@ff810000rockchip,rk3288-timer4  H ba  :pclktimerdisplay-subsystemrockchip,display-subsystemF mmc@ff0c0000rockchip,rk3288-dw-mshcLр bDrv:biuciuciu-driveciu-sampleZ 4 @8ereset qdisabledmmc@ff0d0000rockchip,rk3288-dw-mshcLр bEsw:biuciuciu-driveciu-sampleZ !4 @8eresetqokayx default (mmc@ff0e0000rockchip,rk3288-dw-mshcLр bFtx:biuciuciu-driveciu-sampleZ "4@8ereset qdisabledmmc@ff0f0000rockchip,rk3288-dw-mshcLр bGuy:biuciuciu-driveciu-sampleZ #4@8eresetqokayx5Gepdefault saradc@ff100000rockchip,saradc4 $bI[:saradcapb_pclk8W esaradc-apb qdisabledspi@ff110000(rockchip,rk3288-spirockchip,rk3066-spibAR:spiclkapb_pclk  txrx ,default4 qdisabledspi@ff120000(rockchip,rk3288-spirockchip,rk3066-spibBS:spiclkapb_pclk txrx -default4 qdisabledspi@ff130000(rockchip,rk3288-spirockchip,rk3066-spibCT:spiclkapb_pclktxrx .default !"#4qokay flash@0jedec,spi-nor4i2c@ff140000rockchip,rk3288-i2c4 >:i2cbMdefault$qokay2dtpm@20infineon,slb9645tt4 i2c@ff150000rockchip,rk3288-i2c4 ?:i2cbOdefault% qdisabledi2c@ff160000rockchip,rk3288-i2c4 @:i2cbPdefault&qokay2,i2c@ff170000rockchip,rk3288-i2c4 A:i2cbQdefault' qdisabledserial@ff180000&rockchip,rk3288-uartsnps,dw-apb-uart4 7 bMU:baudclkapb_pclktxrxdefault ()*qokaybluetoothdefault +,-brcm,bcm43540-bt #. 5. D.X-bserial@ff190000&rockchip,rk3288-uartsnps,dw-apb-uart4 8 bNV:baudclkapb_pclktxrxdefault/qokayserial@ff690000&rockchip,rk3288-uartsnps,dw-apb-uart4i 9 bOW:baudclkapb_pclkdefault0qokayserial@ff1b0000&rockchip,rk3288-uartsnps,dw-apb-uart4 : bPX:baudclkapb_pclktxrxdefault1 qdisabledserial@ff1c0000&rockchip,rk3288-uartsnps,dw-apb-uart4 ; bQY:baudclkapb_pclk  txrxdefault2 qdisableddma-controller@ff250000arm,pl330arm,primecell4%@yb :apb_pclkthermal-zonesreserve-thermal3cpu-thermald3tripscpu_alert0p/passive4cpu_alert1$/passive5cpu_crit /criticalcooling-mapsmap040map150gpu-thermald3tripsgpu_alert04/passive6gpu_crit /criticalcooling-mapsmap06 7tsadc@ff280000rockchip,rk3288-tsadc4( %bHZ:tsadcapb_pclk8 etsadc-apbinitdefaultsleep898)?:LHqokaycz3ethernet@ff290000rockchip,rk3288-gmac4)macirqeth_wake_irq?:8bfgc]M:stmmacethmac_clk_rxmac_clk_txclk_mac_refclk_mac_refoutaclk_macpclk_mac8B estmmaceth qdisabledusb@ff500000 generic-ehci4P b;usbqokayusb@ff520000 generic-ohci4R )b;usb qdisabledusb@ff5400002rockchip,rk3288-usbrockchip,rk3066-usbsnps,dwc24T b:otghost< usb2-phyqokayusb@ff5800002rockchip,rk3288-usbrockchip,rk3066-usbsnps,dwc24X b:otghost!@@ = usb2-phyqokay0z@=usb@ff5c0000 generic-ehci4\ b qdisableddma-controller@ff600000arm,pl330arm,primecell4`@yb :apb_pclk qdisabledi2c@ff650000rockchip,rk3288-i2c4e <:i2cbLdefault>qokay2dpmic@1brockchip,rk8084xin32kwifibt_32kin&?default @ABWxCD DregulatorsDCDC_REG1vdd_arm' q? Wq regulator-state-memlDCDC_REG2vdd_gpu' 5?Wquregulator-state-memlDCDC_REG3 vcc135_ddrregulator-state-memDCDC_REG4vcc_18'w@?w@regulator-state-memw@LDO_REG3vdd_10'B@?B@regulator-state-memB@LDO_REG7 vdd10_lcd'B@?B@regulator-state-memlSWITCH_REG1 vcc33_lcdXregulator-state-memlSWITCH_REG2 vcc18_hdmii2c@ff660000rockchip,rk3288-i2c4f =:i2cbNdefaultEqokay2 pwm@ff680000rockchip,rk3288-pwm4hdefaultFb_ qdisabledpwm@ff680010rockchip,rk3288-pwm4hdefaultGb_qokaypwm@ff680020rockchip,rk3288-pwm4h defaultHb_ qdisabledpwm@ff680030rockchip,rk3288-pwm4h0defaultIb_ qdisabledsram@ff700000 mmio-sram4ppsmp-sram@0rockchip,rk3066-smp-sram4sram@ff720000#rockchip,rk3288-pmu-srammmio-sram4rpower-management@ff730000&rockchip,rk3288-pmusysconsimple-mfd4spower-controller!rockchip,rk3288-power-controller0h@ \power-domain@94 bchgfdehilkj$JKLMNOPQRpower-domain@114 bopSTpower-domain@124 bUpower-domain@134 bVWreboot-modesyscon-reboot-modeRBRBRB /RBsyscon@ff740000rockchip,rk3288-sgrfsyscon4tclock-controller@ff760000rockchip,rk3288-cru4vb :xin24m?:;H0jk$H#gׄeрxhрxhsyscon@ff770000&rockchip,rk3288-grfsysconsimple-mfd4w:edp-phyrockchip,rk3288-dp-phybh:24m] qdisabledlio-domains"rockchip,rk3288-io-voltage-domainqokayhCr}CCXusbphyrockchip,rk3288-usb-phyqokayusb-phy@320]4 b]:phyclk8 ephy-reset=usb-phy@334]44b^:phyclk8 ephy-reset;usb-phy@348]4Hb_:phyclk8 ephy-reset<watchdog@ff800000 rockchip,rk3288-wdtsnps,dw-wdt4bp Oqokaysound@ff8b0000,rockchip,rk3288-spdifrockchip,rk3066-spdif4bT :mclkhclkYtx 6defaultZ?: qdisabledi2s@ff890000(rockchip,rk3288-i2srockchip,rk3066-i2s4 5bR:i2s_clki2s_hclkYYtxrxdefault[ qdisabledcrypto@ff8a0000rockchip,rk3288-crypto4@ 0 b}:aclkhclksclkapb_pclk8 ecrypto-rstiommu@ff900800rockchip,iommu4@ b :aclkiface  qdisablediommu@ff914000rockchip,iommu 4@P b :aclkiface   qdisabledrga@ff920000rockchip,rk3288-rga4 bj:aclkhclksclk /\ 8ilm ecoreaxiahbvop@ff930000rockchip,rk3288-vop 4 b:aclk_vopdclk_vophclk_vop /\ 8def eaxiahbdclk =]qokayport endpoint@04 D^qendpoint@14 D_mendpoint@24 D`gendpoint@34 Dajiommu@ff930300rockchip,iommu4 b :aclkiface /\  qokay]vop@ff940000rockchip,rk3288-vop 4 b:aclk_vopdclk_vophclk_vop /\ 8 eaxiahbdclk =b qdisabledport endpoint@04 Dcrendpoint@14 Ddnendpoint@24 Dehendpoint@34 Dfkiommu@ff940300rockchip,iommu4 b :aclkiface /\   qdisabledbdsi@ff960000*rockchip,rk3288-mipi-dsisnps,dw-mipi-dsi4@ b~d :refpclk /\ ?: qdisabledportsport@04endpoint@04 Dg`endpoint@14 Dheport@14lvds@ff96c000rockchip,rk3288-lvds4@bg :pclk_lvdslcdci /\ ?: qdisabledportsport@04endpoint@04 Djaendpoint@14 Dkfport@14dp@ff970000rockchip,rk3288-dp4@ bbic:dppclkldp /\ 8oedp?: qdisabledportsport@04endpoint@04 Dm_endpoint@14 Dndport@14hdmi@ff980000rockchip,rk3288-dw-hdmi4 gbhmn:iahbisfrcec /\ ?:qokaydefaultunwedgeopportsport@04endpoint@04 Dq^endpoint@14 Drcport@14video-codec@ff9a0000rockchip,rk3288-vpu4   vepuvdpub :aclkhclk =s /\ iommu@ff9a0800rockchip,iommu4 b :aclkiface  /\ siommu@ff9c0440rockchip,iommu 4@@@ ob :aclkiface  qdisabledgpu@ffa30000#rockchip,rk3288-maliarm,mali-t7604$ jobmmugpub?tS /\ qokay Tu7opp-table-1operating-points-v2topp-100000000~opp-200000000 ~opp-300000000B@opp-400000000ׄopp-600000000#Fqos@ffaa0000rockchip,rk3288-qossyscon4 Vqos@ffaa0080rockchip,rk3288-qossyscon4 Wqos@ffad0000rockchip,rk3288-qossyscon4 Kqos@ffad0100rockchip,rk3288-qossyscon4 Lqos@ffad0180rockchip,rk3288-qossyscon4 Mqos@ffad0400rockchip,rk3288-qossyscon4 Nqos@ffad0480rockchip,rk3288-qossyscon4 Oqos@ffad0500rockchip,rk3288-qossyscon4 Jqos@ffad0800rockchip,rk3288-qossyscon4 Pqos@ffad0880rockchip,rk3288-qossyscon4 Qqos@ffad0900rockchip,rk3288-qossyscon4 Rqos@ffae0000rockchip,rk3288-qossyscon4 Uqos@ffaf0000rockchip,rk3288-qossyscon4 Sqos@ffaf0080rockchip,rk3288-qossyscon4 Tdma-controller@ffb20000arm,pl330arm,primecell4@yb :apb_pclkYefuse@ffb40000rockchip,rk3288-efuse4 bq :pclk_efusecpu-id@74cpu_leakage@174interrupt-controller@ffc01000 arm,gic-400 ` u@4 @ `   pinctrlrockchip,rk3288-pinctrl?:default vwxgpio@ff750000rockchip,gpio-bank4u Qb@   ` u?gpio@ff780000rockchip,gpio-bank4x RbA   ` ugpio@ff790000rockchip,gpio-bank4y SbB   ` ugpio@ff7a0000rockchip,gpio-bank4z TbC   ` ugpio@ff7b0000rockchip,gpio-bank4{ UbD   ` u.gpio@ff7c0000rockchip,gpio-bank4| VbE   ` ugpio@ff7d0000rockchip,gpio-bank4} WbF   ` ugpio@ff7e0000rockchip,gpio-bank4~ XbG   ` uDgpio@ff7f0000rockchip,gpio-bank4 YbH   ` uhdmihdmi-cec-c0 yhdmi-cec-c7 yhdmi-ddc yyohdmi-ddc-unwedge zypvcc50-hdmi-en ypcfg-output-low zpcfg-pull-up {pcfg-pull-down |pcfg-pull-none ypcfg-pull-none-12ma  suspendglobal-pwroff yxddrio-pwroff ywddr0-retention {vddr1-retention {edpedp-hpd  |i2c0i2c0-xfer yy>i2c1i2c1-xfer yy$i2c2i2c2-xfer  y yEi2c3i2c3-xfer yy%i2c4i2c4-xfer yy&i2c5i2c5-xfer yy'i2s0i2s0-bus` yyyyyy[lcdclcdc-ctl@ yyyyisdmmcsdmmc-clk ysdmmc-cmd {sdmmc-cd {sdmmc-bus1 {sdmmc-bus4@ {{{{sdio0sdio0-bus1 {sdio0-bus4@ }}}}sdio0-cmd }sdio0-clk }sdio0-cd {sdio0-wp {sdio0-pwr {sdio0-bkpwr {sdio0-int {wifienable-h ybt-enable-l y,bt-host-wake |bt-host-wake-l y+bt-dev-wake-sleep zbt-dev-wake-awake ~bt-dev-wake y-sdio1sdio1-bus1 {sdio1-bus4@ {{{{sdio1-cd {sdio1-wp {sdio1-bkpwr {sdio1-int {sdio1-cmd {sdio1-clk ysdio1-pwr  {emmcemmc-clk }emmc-cmd }emmc-pwr  {emmc-bus1 {emmc-bus4@ {{{{emmc-bus8 }}}}}}}}emmc-reset  yspi0spi0-clk  {spi0-cs0  {spi0-tx {spi0-rx {spi0-cs1 {spi1spi1-clk  {spi1-cs0  {spi1-rx {spi1-tx {spi2spi2-cs1 {spi2-clk { spi2-cs0 {#spi2-rx {"spi2-tx  {!uart0uart0-xfer {y(uart0-cts {)uart0-rts y*uart1uart1-xfer { y/uart1-cts  {uart1-rts  yuart2uart2-xfer {y0uart3uart3-xfer {y1uart3-cts  {uart3-rts  yuart4uart4-xfer {y2uart4-cts  {uart4-rts  ytsadcotp-pin y8otp-out y9pwm0pwm0-pin yFpwm1pwm1-pin yGpwm2pwm2-pin yHpwm3pwm3-pin yIgmacrgmii-pins yyyyyyy yyrmii-pins yyyyyyyyyyspdifspdif-tx  yZpcfg-pull-none-drv-8ma  }pcfg-pull-up-drv-8ma  pcfg-output-high ~buttonspwr-key-l {pmicpmic-int-l {@dvs-1  |Advs-2 |Brebootap-warm-reset-h yrecovery-switchrec-mode-l {tpmtpm-int-h ywrite-protectfw-wp-ap yusb-hostusb2-pwr-en ychosen serial2:115200n8memory(memory4power-button gpio-keysdefaultkey-power Power /? t dxgpio-restart gpio-restart /? default .emmc-pwrseqmmc-pwrseq-emmcdefault 7 sdio-pwrseqmmc-pwrseq-simpleb :ext_clockdefault 7. regulator-vcc-5vregulator-fixedvcc_5v'LK@?LK@regulator-vcc33-sysregulator-fixed vcc33_sys'2Z?2Z Cregulator-vcc50-hdmiregulator-fixed vcc50_hdmi C N aDdefaultregulator-vdd-logicpwm-regulator vdd_logic f k v{ '~?pWregulator-vcc33-ioregulator-fixed vcc33_io CCregulator-vcc5-host2regulator-fixed N a? default vcc5_host2 #address-cells#size-cellscompatibleinterrupt-parentmodelethernet0gpio0gpio1gpio2gpio3gpio4gpio5gpio6gpio7gpio8i2c0i2c1i2c2i2c3i2c4i2c5mshc0mshc1mshc2mshc3serial0serial1serial2serial3serial4spi0spi1spi2mmc0interruptsinterrupt-affinityenable-methodrockchip,pmudevice_typeregresetsoperating-points-v2#cooling-cellsclocksdynamic-power-coefficientcpu0-supplyphandleopp-sharedopp-hzopp-microvoltclock-latency-nsrangesclock-frequencyclock-output-names#clock-cellsarm,cpu-registers-not-fw-configuredarm,no-tick-in-suspendclock-namesportsmax-frequencyfifo-depthreset-namesstatusbus-widthcap-sd-highspeedcap-sdio-irqkeep-power-in-suspendmmc-pwrseqnon-removablepinctrl-namespinctrl-0sd-uhs-sdr12sd-uhs-sdr25sd-uhs-sdr50sd-uhs-sdr104vmmc-supplyvqmmc-supplycap-mmc-highspeedrockchip,default-sample-phasedisable-wpmmc-hs200-1_8v#io-channel-cellsdmasdma-namesrx-sample-delay-nsspi-max-frequencyi2c-scl-falling-time-nsi2c-scl-rising-time-nspowered-while-suspendedreg-shiftreg-io-widthhost-wakeup-gpiosshutdown-gpiosdevice-wakeup-gpiosmax-speedbrcm,bt-pcm-int-params#dma-cellsarm,pl330-broken-no-flushparm,pl330-periph-burstpolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresistripcooling-devicepinctrl-1pinctrl-2#thermal-sensor-cellsrockchip,grfrockchip,hw-tshut-temprockchip,hw-tshut-moderockchip,hw-tshut-polarityinterrupt-namesphysphy-namesneeds-reset-on-resumedr_modesnps,reset-phy-on-wakesnps,need-phy-for-wakeg-np-tx-fifo-sizeg-rx-fifo-sizeg-tx-fifo-sizeassigned-clocksassigned-clock-parentsrockchip,system-power-controllerwakeup-sourcevcc1-supplyvcc2-supplyvcc3-supplyvcc4-supplyvcc7-supplyvcc8-supplyvcc12-supplyvddio-supplydvs-gpiosregulator-nameregulator-always-onregulator-boot-onregulator-min-microvoltregulator-max-microvoltregulator-ramp-delayregulator-off-in-suspendregulator-on-in-suspendregulator-suspend-microvoltregulator-suspend-mem-disabled#pwm-cells#power-domain-cellspm_qosoffsetmode-normalmode-recoverymode-bootloadermode-loader#reset-cellsassigned-clock-rates#phy-cellsbb-supplydvp-supplyflash0-supplygpio1830-supplygpio30-supplylcdc-supplywifi-supply#sound-dai-cellsrockchip,playback-channelsrockchip,capture-channels#iommu-cellsrockchip,disable-mmu-resetpower-domainsiommusremote-endpointmali-supplyinterrupt-controller#interrupt-cellsgpio-controller#gpio-cellsrockchip,pinsoutput-lowbias-pull-upbias-pull-downbias-disabledrive-strengthoutput-highstdout-pathlabellinux,codedebounce-intervalpriorityreset-gpiosvin-supplyenable-active-highgpiopwmspwm-supplypwm-dutycycle-rangepwm-dutycycle-unit