8( 5google,veyron-jaq-rev5google,veyron-jaq-rev4google,veyron-jaq-rev3google,veyron-jaq-rev2google,veyron-jaq-rev1google,veyron-jaqgoogle,veyronrockchip,rk3288& 7Google Jaqaliases=/ethernet@ff290000G/pinctrl/gpio@ff750000M/pinctrl/gpio@ff780000S/pinctrl/gpio@ff790000Y/pinctrl/gpio@ff7a0000_/pinctrl/gpio@ff7b0000e/pinctrl/gpio@ff7c0000k/pinctrl/gpio@ff7d0000q/pinctrl/gpio@ff7e0000w/pinctrl/gpio@ff7f0000}/i2c@ff650000/i2c@ff140000/i2c@ff660000/i2c@ff150000/i2c@ff160000/i2c@ff170000/mmc@ff0f0000/mmc@ff0c0000/mmc@ff0d0000/mmc@ff0e0000/serial@ff180000/serial@ff190000/serial@ff690000/serial@ff1b0000/serial@ff1c0000/spi@ff110000/spi@ff120000/spi@ff130000/mmc@ff0f0000/mmc@ff0c0000/spi@ff110000/ec@0/i2c-tunnelarm-pmuarm,cortex-a12-pmu0cpusrockchip,rk3066-smp&cpu@5003cpuarm,cortex-a12?CJ^mtr cpu@5013cpuarm,cortex-a12?CJ^mtrcpu@5023cpuarm,cortex-a12?CJ^mtrcpu@5033cpuarm,cortex-a12?CJ^mtropp-table-0operating-points-v2opp-126000000 @opp-216000000  opp-408000000Q opp-600000000#F opp-696000000)|~opp-8160000000,B@opp-1008000000<opp-1200000000Gopp-1416000000TfrOopp-1512000000ZJopp-1608000000_" opp-1704000000epopp-1800000000kI\reserved-memorydma-unusable@fe000000?oscillator fixed-clockn6xin24m timerarm,armv7-timer 0   n6.timer@ff810000rockchip,rk3288-timer?  H ma  Epclktimerdisplay-subsystemrockchip,display-subsystemQ mmc@ff0c0000rockchip,rk3288-dw-mshcWр mDrvEbiuciuciu-driveciu-samplee ? @Cpreset|okay  Z*7BdefaultPmmc@ff0d0000rockchip,rk3288-dw-mshcWр mEswEbiuciuciu-driveciu-samplee !? @Cpreset|okayZg}Bdefault P*btmrvl@2marvell,sd8897-bt?& BdefaultPmmc@ff0e0000rockchip,rk3288-dw-mshcWр mFtxEbiuciuciu-driveciu-samplee "?@Cpreset |disabledmmc@ff0f0000rockchip,rk3288-dw-mshcWр mGuyEbiuciuciu-driveciu-samplee #?@Cpreset|okay7}Bdefault P saradc@ff100000rockchip,saradc? $mI[Esaradcapb_pclkCW psaradc-apb |disabledspi@ff110000(rockchip,rk3288-spirockchip,rk3066-spimAREspiclkapb_pclk! ! txrx ,BdefaultP"#$%?|okayec@0google,cros-ec-spi?& BdefaultP&-i2c-tunnelgoogle,cros-ec-i2c-tunnelsbs-battery@bsbs,sbs-battery? .keyboard-controllergoogle,cros-ec-keybCS fD;<=>?@A B CD}0Y1 d"#(  \V |})   + ^a !%$' & + ,./-32*5 4 9    8 l j6  g ispi@ff120000(rockchip,rk3288-spirockchip,rk3066-spimBSEspiclkapb_pclk! !txrx -BdefaultP'()*? |disabledspi@ff130000(rockchip,rk3288-spirockchip,rk3066-spimCTEspiclkapb_pclk!!txrx .BdefaultP+,-.?|okay flash@0jedec,spi-nor?i2c@ff140000rockchip,rk3288-i2c? >Ei2cmMBdefaultP/|okay2dtpm@20infineon,slb9645tt? i2c@ff150000rockchip,rk3288-i2c? ?Ei2cmOBdefaultP0 |disabledi2c@ff160000rockchip,rk3288-i2c? @Ei2cmPBdefaultP1|okay2,ts3a227e@3b ti,ts3a227e?;&2BdefaultP3trackpad@15elan,ekth3000?& BdefaultP45i2c@ff170000rockchip,rk3288-i2c? AEi2cmQBdefaultP6 |disabledserial@ff180000&rockchip,rk3288-uartsnps,dw-apb-uart? 7 mMUEbaudclkapb_pclk!!txrxBdefault P789|okayserial@ff190000&rockchip,rk3288-uartsnps,dw-apb-uart? 8 mNVEbaudclkapb_pclk!!txrxBdefaultP:|okayserial@ff690000&rockchip,rk3288-uartsnps,dw-apb-uart?i 9 mOWEbaudclkapb_pclkBdefaultP;|okayserial@ff1b0000&rockchip,rk3288-uartsnps,dw-apb-uart? : mPXEbaudclkapb_pclk!!txrxBdefaultP< |disabledserial@ff1c0000&rockchip,rk3288-uartsnps,dw-apb-uart? ; mQYEbaudclkapb_pclk! ! txrxBdefaultP= |disableddma-controller@ff250000arm,pl330arm,primecell?%@"-Hm Eapb_pclk!thermal-zonesreserve-thermal_u>cpu-thermal_du>tripscpu_alert0p:passive?cpu_alert1$:passive@cpu_crit :criticalcooling-mapsmap0?0map1@0gpu-thermal_du>tripsgpu_alert04:passiveAgpu_crit :criticalcooling-mapsmap0A Btsadc@ff280000rockchip,rk3288-tsadc?( %mHZEtsadcapb_pclkC ptsadc-apbBinitdefaultsleepPCDCEH|okay #>ethernet@ff290000rockchip,rk3288-gmac?)>macirqeth_wake_irqE8mfgc]MEstmmacethmac_clk_rxmac_clk_txclk_mac_refclk_mac_refoutaclk_macpclk_macCB pstmmaceth |disabledusb@ff500000 generic-ehci?P mNFSusb|okay]usb@ff520000 generic-ohci?R )mNFSusb |disabledusb@ff5400002rockchip,rk3288-usbrockchip,rk3066-usbsnps,dwc2?T mEotgshostNG Susb2-phy{|okayusb@ff5800002rockchip,rk3288-usbrockchip,rk3066-usbsnps,dwc2?X mEotgshost@@ NH Susb2-phy|okayzHusb@ff5c0000 generic-ehci?\ m |disableddma-controller@ff600000arm,pl330arm,primecell?`@"-Hm Eapb_pclk |disabledi2c@ff650000rockchip,rk3288-i2c?e <Ei2cmLBdefaultPI|okay2dpmic@1brockchip,rk808?xin32kwifibt_32kin&2Bdefault PJKL!-9EQM]iu5MM regulatorsDCDC_REG1vdd_arm q  $q regulator-state-mem9DCDC_REG2vdd_gpu 5 $qregulator-state-mem9DCDC_REG3 vcc135_ddrregulator-state-memRDCDC_REG4vcc_18w@ w@regulator-state-memRjw@LDO_REG1 vcc33_io2Z 2Z5regulator-state-memRj2ZLDO_REG3vdd_10B@ B@regulator-state-memRjB@LDO_REG7vdd10_lcd_pwren_h&% &%regulator-state-mem9SWITCH_REG1 vcc33_lcdcregulator-state-mem9LDO_REG6 vcc18_codecw@ w@dregulator-state-mem9LDO_REG4 vccio_sdw@ 2Zregulator-state-mem9LDO_REG5 vcc33_sd2Z 2Zregulator-state-mem9LDO_REG8 vcc33_ccd2Z 2Zregulator-state-mem9LDO_REG2mic_vccw@ w@regulator-state-mem9i2c@ff660000rockchip,rk3288-i2c?f =Ei2cmNBdefaultPN|okay2 max98090@10maxim,max98090?&OEmclkmqBdefaultPPpwm@ff680000rockchip,rk3288-pwm?hBdefaultPQm_|okaypwm@ff680010rockchip,rk3288-pwm?hBdefaultPRm_|okaypwm@ff680020rockchip,rk3288-pwm?h BdefaultPSm_ |disabledpwm@ff680030rockchip,rk3288-pwm?h0BdefaultPTm_ |disabledsram@ff700000 mmio-sram?ppsmp-sram@0rockchip,rk3066-smp-sram?sram@ff720000#rockchip,rk3288-pmu-srammmio-sram?rpower-management@ff730000&rockchip,rk3288-pmusysconsimple-mfd?spower-controller!rockchip,rk3288-power-controllerh hpower-domain@9? mchgfdehilkj$UVWXYZ[\]power-domain@11? mop^_power-domain@12? m`power-domain@13? mabreboot-modesyscon-reboot-modeRBRBRB RBsyscon@ff740000rockchip,rk3288-sgrfsyscon?tclock-controller@ff760000rockchip,rk3288-cru?vm Exin24mEHjk$#gׄeрxhрxhsyscon@ff770000&rockchip,rk3288-grfsysconsimple-mfd?wEedp-phyrockchip,rk3288-dp-phymhE24m |okayxio-domains"rockchip,rk3288-io-voltage-domain|okay 5  + 95 I5 Wc c od |usbphyrockchip,rk3288-usb-phy|okayusb-phy@320 ? m]EphyclkC pphy-resetHusb-phy@334 ?4m^EphyclkC pphy-resetFusb-phy@348 ?Hm_EphyclkC pphy-resetGwatchdog@ff800000 rockchip,rk3288-wdtsnps,dw-wdt?mp O|okaysound@ff8b0000,rockchip,rk3288-spdifrockchip,rk3066-spdif? mT Emclkhclketx 6BdefaultPfE |disabledi2s@ff890000(rockchip,rk3288-i2srockchip,rk3066-i2s?  5mREi2s_clki2s_hclkeetxrxBdefaultPg  |okaycrypto@ff8a0000rockchip,rk3288-crypto?@ 0 m}Eaclkhclksclkapb_pclkC pcrypto-rstiommu@ff900800rockchip,iommu?@ m Eaclkiface  |disablediommu@ff914000rockchip,iommu ?@P m Eaclkiface   |disabledrga@ff920000rockchip,rk3288-rga? mjEaclkhclksclk h Cilm pcoreaxiahbvop@ff930000rockchip,rk3288-vop ? mEaclk_vopdclk_vophclk_vop h Cdef paxiahbdclk i|okayport endpoint@0? jendpoint@1? kzendpoint@2? lsendpoint@3? mviommu@ff930300rockchip,iommu? m Eaclkiface h  |okayivop@ff940000rockchip,rk3288-vop ? mEaclk_vopdclk_vophclk_vop h C paxiahbdclk n|okayport endpoint@0? oendpoint@1? p{endpoint@2? qtendpoint@3? rwiommu@ff940300rockchip,iommu? m Eaclkiface h  |okayndsi@ff960000*rockchip,rk3288-mipi-dsisnps,dw-mipi-dsi?@ m~d Erefpclk h E |disabledportsport@0?endpoint@0? slendpoint@1? tqport@1?lvds@ff96c000rockchip,rk3288-lvds?@mg Epclk_lvdsBlcdcPu h E |disabledportsport@0?endpoint@0? vmendpoint@1? wrport@1?dp@ff970000rockchip,rk3288-dp?@ bmicEdppclkNxSdp h CopdpE|okayBdefaultPyportsport@0?endpoint@0? zkendpoint@1? {pport@1?endpoint@0? |hdmi@ff980000rockchip,rk3288-dw-hdmi? gmhmnEiahbisfrcec h E |okayBdefaultunwedgeP}~portsport@0?endpoint@0? jendpoint@1? oport@1?video-codec@ff9a0000rockchip,rk3288-vpu?   >vepuvdpum Eaclkhclk  h iommu@ff9a0800rockchip,iommu? m Eaclkiface  h iommu@ff9c0440rockchip,iommu ?@@@ om Eaclkiface  |disabledgpu@ffa30000#rockchip,rk3288-maliarm,mali-t760?$ >jobmmugpumJ^ h |okay Bopp-table-1operating-points-v2opp-100000000~opp-200000000 ~opp-300000000B@opp-400000000ׄopp-600000000#Fqos@ffaa0000rockchip,rk3288-qossyscon? aqos@ffaa0080rockchip,rk3288-qossyscon? bqos@ffad0000rockchip,rk3288-qossyscon? Vqos@ffad0100rockchip,rk3288-qossyscon? Wqos@ffad0180rockchip,rk3288-qossyscon? Xqos@ffad0400rockchip,rk3288-qossyscon? Yqos@ffad0480rockchip,rk3288-qossyscon? Zqos@ffad0500rockchip,rk3288-qossyscon? Uqos@ffad0800rockchip,rk3288-qossyscon? [qos@ffad0880rockchip,rk3288-qossyscon? \qos@ffad0900rockchip,rk3288-qossyscon? ]qos@ffae0000rockchip,rk3288-qossyscon? `qos@ffaf0000rockchip,rk3288-qossyscon? ^qos@ffaf0080rockchip,rk3288-qossyscon? _dma-controller@ffb20000arm,pl330arm,primecell?@"-Hm Eapb_pclkeefuse@ffb40000rockchip,rk3288-efuse? mq Epclk_efusecpu-id@7?cpu_leakage@17?interrupt-controller@ffc01000 arm,gic-400 ) >@? @ `   pinctrlrockchip,rk3288-pinctrlE&BdefaultsleepPgpio@ff750000rockchip,gpio-bank?u Qm@ O _ ) > kPMIC_SLEEP_APDDRIO_PWROFFDDRIO_RETENTS3A227E_INT_LPMIC_INT_LPWR_KEY_LAP_LID_INT_LEC_IN_RWAC_PRESENT_APRECOVERY_SW_LOTP_OUTHOST1_PWR_ENUSBOTG_PWREN_HAP_WARM_RESET_HnFALUT2I2C0_SDA_PMICI2C0_SCL_PMICSUSPEND_LUSB_INT2gpio@ff780000rockchip,gpio-bank?x RmA O _ ) >gpio@ff790000rockchip,gpio-bank?y SmB O _ ) >M kCONFIG0CONFIG1CONFIG2CONFIG3EMMC_RST_LBL_PWR_ENAVDD_1V8_DISP_ENgpio@ff7a0000rockchip,gpio-bank?z TmC O _ ) > kFLASH0_D0FLASH0_D1FLASH0_D2FLASH0_D3FLASH0_D4FLASH0_D5FLASH0_D6FLASH0_D7FLASH0_CS2/EMMC_CMDFLASH0_DQS/EMMC_CLKOgpio@ff7b0000rockchip,gpio-bank?{ UmD O _ ) > kUART0_RXDUART0_TXDUART0_CTSUART0_RTSSDIO0_D0SDIO0_D1SDIO0_D2SDIO0_D3SDIO0_CMDSDIO0_CLKBT_DEV_WAKEWIFI_ENABLE_HBT_ENABLE_LWIFI_HOST_WAKEBT_HOST_WAKEgpio@ff7c0000rockchip,gpio-bank?| VmE O _ ) >A kSPI0_CLKSPI0_CS0SPI0_TXDSPI0_RXDVCC50_HDMI_ENgpio@ff7d0000rockchip,gpio-bank?} WmF O _ ) > kI2S0_SCLKI2S0_LRCK_RXI2S0_LRCK_TXI2S0_SDII2S0_SDO0HP_DET_HALS_INTINT_CODECI2S0_CLKI2C2_SDAI2C2_SCLMICDETSDMMC_D0SDMMC_D1SDMMC_D2SDMMC_D3SDMMC_CLKSDMMC_CMDOgpio@ff7e0000rockchip,gpio-bank?~ XmG O _ ) > kLCDC_BLPWM_LOGBL_ENTRACKPAD_INTTPM_INT_HSDMMC_DET_LAP_FLASH_WP_LEC_INTCPU_NMIDVSOKSDMMC_WPEDP_HPDDVS1nFALUT1LCD_ENDVS2VCC5V_GOOD_HI2C4_SDA_TPI2C4_SCL_TPI2C5_SDA_HDMII2C5_SCL_HDMI5V_DRVUART2_RXDUART2_TXD gpio@ff7f0000rockchip,gpio-bank? YmH O _ ) >^ kRAM_ID0RAM_ID1RAM_ID2RAM_ID3I2C1_SDA_TPMI2C1_SCL_TPMSPI2_CLKSPI2_CS0SPI2_RXDSPI2_TXDhdmihdmi-cec-c0 {hdmi-cec-c7 {hdmi-ddc {}hdmi-ddc-unwedge {~vcc50-hdmi-en {pcfg-output-low pcfg-pull-up pcfg-pull-down pcfg-pull-none pcfg-pull-none-12ma  suspendglobal-pwroff {ddrio-pwroff {ddr0-retention {ddr1-retention {suspend-l-wake {suspend-l-sleep {edpedp-hpd { yi2c0i2c0-xfer {Ii2c1i2c1-xfer {/i2c2i2c2-xfer {  Ni2c3i2c3-xfer {0i2c4i2c4-xfer {1i2c5i2c5-xfer {6i2s0i2s0-bus` {glcdclcdc-ctl@ {usdmmcsdmmc-clk {sdmmc-cmd {sdmmc-cd {sdmmc-bus1 {sdmmc-bus4@ {sdmmc-cd-disabled {sdmmc-cd-pin {sdio0sdio0-bus1 {sdio0-bus4@ {sdio0-cmd {sdio0-clk {sdio0-cd {sdio0-wp {sdio0-pwr {sdio0-bkpwr {sdio0-int {wifienable-h {bt-enable-l {bt-host-wake {bt-host-wake-l {bt-dev-wake-sleep {bt-dev-wake-awake {bt-dev-wake {sdio1sdio1-bus1 {sdio1-bus4@ {sdio1-cd {sdio1-wp {sdio1-bkpwr {sdio1-int {sdio1-cmd {sdio1-clk {sdio1-pwr { emmcemmc-clk {emmc-cmd {emmc-pwr { emmc-bus1 {emmc-bus4@ {emmc-bus8 { emmc-reset { spi0spi0-clk { "spi0-cs0 { %spi0-tx {#spi0-rx {$spi0-cs1 {spi1spi1-clk { 'spi1-cs0 { *spi1-rx {)spi1-tx {(spi2spi2-cs1 {spi2-clk {+spi2-cs0 {.spi2-rx {-spi2-tx { ,uart0uart0-xfer {7uart0-cts {8uart0-rts {9uart1uart1-xfer { :uart1-cts { uart1-rts { uart2uart2-xfer {;uart3uart3-xfer {<uart3-cts { uart3-rts { uart4uart4-xfer {=uart4-cts { uart4-rts { tsadcotp-pin { Cotp-out { Dpwm0pwm0-pin {Qpwm1pwm1-pin {Rpwm2pwm2-pin {Spwm3pwm3-pin {Tgmacrgmii-pins { rmii-pins {spdifspdif-tx { fpcfg-pull-none-drv-8ma  pcfg-pull-up-drv-8ma  pcfg-output-high buttonspwr-key-l {ap-lid-int-l {pmicpmic-int-l {Jdvs-1 { Kdvs-2 {Lrebootap-warm-reset-h { recovery-switchrec-mode-l { tpmtpm-int-h {write-protectfw-wp-ap {codechp-det {int-codec {Pmic-det { headsetts3a227e-int-l {3backlightbl_pwr_en { bl-en {lcdlcd-en {avdd-1v8-disp-en { chargerac-present-ap {cros-ecec-int {&trackpadtrackpad-int {4usb-hosthost1-pwr-en { usbotg-pwren-h { buck-5vdrv-5v {chosen serial2:115200n8memory3memory?power-button gpio-keysBdefaultPkey-power Power 2 t dgpio-restart gpio-restart 2 BdefaultP emmc-pwrseqmmc-pwrseq-emmcPBdefault  sdio-pwrseqmmc-pwrseq-simplem Eext_clockBdefaultP regulator-vcc-5vregulator-fixedvcc_5vLK@ LK@  ' : BdefaultPMregulator-vcc33-sysregulator-fixed vcc33_sys2Z 2Z regulator-vcc50-hdmiregulator-fixed vcc50_hdmi M ' :BdefaultPregulator-vdd-logicpwm-regulator vdd_logic ? D O{ c~ p$sound!rockchip,rockchip-audio-max98090BdefaultP vVEYRON-I2S   O O   regulator-backlightregulator-fixed ' : BdefaultPbacklight_regulator  :regulator-panelregulator-fixed ' : BdefaultPpanel_regulator vcc18-lcdregulator-fixed ' : BdefaultP vcc18_lcd backlightpwm-backlight  - D ] BdefaultP ?B@ j    panelinnolux,n116bge|okay  panel-timingl V  <       portsportendpoint |gpio-charger gpio-charger mains 2BdefaultPlid-switch gpio-keysBdefaultPswitch-lid Lid 2  $ regulator-vccsysregulator-fixedvccsysregulator-vcc5-host1regulator-fixed ' :2 BdefaultP vcc5_host1regulator-vcc5v-otgregulator-fixed ' :2 BdefaultP vcc5_host2 #address-cells#size-cellscompatibleinterrupt-parentmodelethernet0gpio0gpio1gpio2gpio3gpio4gpio5gpio6gpio7gpio8i2c0i2c1i2c2i2c3i2c4i2c5mshc0mshc1mshc2mshc3serial0serial1serial2serial3serial4spi0spi1spi2mmc0mmc1i2c20interruptsinterrupt-affinityenable-methodrockchip,pmudevice_typeregresetsoperating-points-v2#cooling-cellsclocksdynamic-power-coefficientcpu0-supplyphandleopp-sharedopp-hzopp-microvoltclock-latency-nsrangesclock-frequencyclock-output-names#clock-cellsarm,cpu-registers-not-fw-configuredarm,no-tick-in-suspendclock-namesportsmax-frequencyfifo-depthreset-namesstatusbus-widthcap-mmc-highspeedcap-sd-highspeedcard-detect-delaycd-gpiosrockchip,default-sample-phasesd-uhs-sdr12sd-uhs-sdr25sd-uhs-sdr50sd-uhs-sdr104vmmc-supplyvqmmc-supplydisable-wppinctrl-namespinctrl-0cap-sdio-irqkeep-power-in-suspendmmc-pwrseqnon-removablemarvell,wakeup-pinmmc-hs200-1_8v#io-channel-cellsdmasdma-namesgoogle,cros-ec-spi-pre-delayspi-max-frequencygoogle,remote-bussbs,i2c-retry-countsbs,poll-retry-countkeypad,num-rowskeypad,num-columnsgoogle,needs-ghost-filterlinux,keymaprx-sample-delay-nsi2c-scl-falling-time-nsi2c-scl-rising-time-nspowered-while-suspendedti,micbiasvcc-supplywakeup-sourcereg-shiftreg-io-width#dma-cellsarm,pl330-broken-no-flushparm,pl330-periph-burstpolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresistripcooling-devicepinctrl-1pinctrl-2#thermal-sensor-cellsrockchip,grfrockchip,hw-tshut-temprockchip,hw-tshut-moderockchip,hw-tshut-polarityinterrupt-namesphysphy-namesneeds-reset-on-resumedr_modesnps,reset-phy-on-wakesnps,need-phy-for-wakeg-np-tx-fifo-sizeg-rx-fifo-sizeg-tx-fifo-sizeassigned-clocksassigned-clock-parentsrockchip,system-power-controllervcc1-supplyvcc2-supplyvcc3-supplyvcc4-supplyvcc6-supplyvcc7-supplyvcc8-supplyvcc12-supplyvddio-supplyvcc10-supplyvcc9-supplyvcc11-supplydvs-gpiosregulator-nameregulator-always-onregulator-boot-onregulator-min-microvoltregulator-max-microvoltregulator-ramp-delayregulator-off-in-suspendregulator-on-in-suspendregulator-suspend-microvolt#pwm-cells#power-domain-cellspm_qosoffsetmode-normalmode-recoverymode-bootloadermode-loader#reset-cellsassigned-clock-rates#phy-cellsbb-supplydvp-supplyflash0-supplygpio1830-supplygpio30-supplylcdc-supplywifi-supplyaudio-supplysdcard-supply#sound-dai-cellsrockchip,playback-channelsrockchip,capture-channels#iommu-cellsrockchip,disable-mmu-resetpower-domainsiommusremote-endpointmali-supplyinterrupt-controller#interrupt-cellsgpio-controller#gpio-cellsgpio-line-namesrockchip,pinsoutput-lowbias-pull-upbias-pull-downbias-disabledrive-strengthoutput-highstdout-pathlabellinux,codedebounce-intervalpriorityreset-gpiosvin-supplyenable-active-highgpiopwmspwm-supplypwm-dutycycle-rangepwm-dutycycle-unitrockchip,modelrockchip,i2s-controllerrockchip,audio-codecrockchip,hp-det-gpiosrockchip,mic-det-gpiosrockchip,headset-codecrockchip,hdmi-codecstartup-delay-usbrightness-levelsnum-interpolated-stepsdefault-brightness-levelenable-gpiospost-pwm-on-delay-mspwm-off-delay-mspower-supplybacklighthactivehfront-porchhback-porchhsync-lenhsync-activevactivevfront-porchvback-porchvsync-lenvsync-activecharger-typelinux,input-type