|8( \google,veyron-mickey-rev8google,veyron-mickey-rev7google,veyron-mickey-rev6google,veyron-mickey-rev5google,veyron-mickey-rev4google,veyron-mickey-rev3google,veyron-mickey-rev2google,veyron-mickey-rev1google,veyron-mickey-rev0google,veyron-mickeygoogle,veyronrockchip,rk3288&7Google Mickeyaliases=/ethernet@ff290000G/pinctrl/gpio@ff750000M/pinctrl/gpio@ff780000S/pinctrl/gpio@ff790000Y/pinctrl/gpio@ff7a0000_/pinctrl/gpio@ff7b0000e/pinctrl/gpio@ff7c0000k/pinctrl/gpio@ff7d0000q/pinctrl/gpio@ff7e0000w/pinctrl/gpio@ff7f0000}/i2c@ff650000/i2c@ff140000/i2c@ff660000/i2c@ff150000/i2c@ff160000/i2c@ff170000/mmc@ff0f0000/mmc@ff0c0000/mmc@ff0d0000/mmc@ff0e0000/serial@ff180000/serial@ff190000/serial@ff690000/serial@ff1b0000/serial@ff1c0000/spi@ff110000/spi@ff120000/spi@ff130000/mmc@ff0f0000arm-pmuarm,cortex-a12-pmu0cpus rockchip,rk3066-smpcpu@500(cpuarm,cortex-a1248?Sbir cpu@501(cpuarm,cortex-a1248?Sbircpu@502(cpuarm,cortex-a1248?Sbircpu@503(cpuarm,cortex-a1248?Sbiropp-table-0operating-points-v2opp-126000000 @opp-216000000  opp-408000000Q opp-600000000#F opp-696000000)|~opp-8160000000,B@opp-1008000000<opp-1200000000Gopp-1416000000TfrOopp-1512000000ZJopp-1608000000_" opp-1704000000epopp-1800000000kI\reserved-memorydma-unusable@fe0000004oscillator fixed-clockn6xin24m timerarm,armv7-timer0   n6#timer@ff810000rockchip,rk3288-timer4  H ba  :pclktimerdisplay-subsystemrockchip,display-subsystemF mmc@ff0c0000rockchip,rk3288-dw-mshcLр bDrv:biuciuciu-driveciu-sampleZ 4 @8ereset qdisabledmmc@ff0d0000rockchip,rk3288-dw-mshcLр bEsw:biuciuciu-driveciu-sampleZ !4 @8eresetqokayx default (mmc@ff0e0000rockchip,rk3288-dw-mshcLр bFtx:biuciuciu-driveciu-sampleZ "4@8ereset qdisabledmmc@ff0f0000rockchip,rk3288-dw-mshcLр bGuy:biuciuciu-driveciu-sampleZ #4@8eresetqokayx5Gepdefault saradc@ff100000rockchip,saradc4 $bI[:saradcapb_pclk8W esaradc-apb qdisabledspi@ff110000(rockchip,rk3288-spirockchip,rk3066-spibAR:spiclkapb_pclk  txrx ,default4 qdisabledspi@ff120000(rockchip,rk3288-spirockchip,rk3066-spibBS:spiclkapb_pclk txrx -default4 qdisabledspi@ff130000(rockchip,rk3288-spirockchip,rk3066-spibCT:spiclkapb_pclktxrx .default !"#4qokay flash@0jedec,spi-nor4i2c@ff140000rockchip,rk3288-i2c4 >:i2cbMdefault$qokay2dtpm@20infineon,slb9645tt4 i2c@ff150000rockchip,rk3288-i2c4 ?:i2cbOdefault% qdisabledi2c@ff160000rockchip,rk3288-i2c4 @:i2cbPdefault& qdisabled2,i2c@ff170000rockchip,rk3288-i2c4 A:i2cbQdefault' qdisabledserial@ff180000&rockchip,rk3288-uartsnps,dw-apb-uart4 7 bMU:baudclkapb_pclktxrxdefault ()*qokaybluetoothdefault +,-brcm,bcm43540-bt #. 5. D.X-bserial@ff190000&rockchip,rk3288-uartsnps,dw-apb-uart4 8 bNV:baudclkapb_pclktxrxdefault/qokayserial@ff690000&rockchip,rk3288-uartsnps,dw-apb-uart4i 9 bOW:baudclkapb_pclkdefault0qokayserial@ff1b0000&rockchip,rk3288-uartsnps,dw-apb-uart4 : bPX:baudclkapb_pclktxrxdefault1 qdisabledserial@ff1c0000&rockchip,rk3288-uartsnps,dw-apb-uart4 ; bQY:baudclkapb_pclk  txrxdefault2 qdisableddma-controller@ff250000arm,pl330arm,primecell4%@yb :apb_pclkthermal-zonesreserve-thermal3cpu-thermald3tripscpu_crit_ /criticalcpu_alert_almost_warm/passivecpu_alert_warm/passive4cpu_alert_almost_hot8/passive6cpu_alert_hot@P/passive7cpu_alert_hotterH /passive8cpu_alert_very_hotL/passive9cooling-mapscpu_warm_limit_cpu40cpu_warm_limit_gpu4 5cpu_almost_hot_limit_cpu60cpu_hot_limit_cpu70cpu_hotter_limit_cpu80cpu_very_hot_limit_cpu90cpu_very_hot_limit_gpu9 5gpu-thermald3tripsgpu_crit_ /criticalgpu_alert_warmish`/passive:gpu_alert_warm/passive;gpu_alert_hotterH /passive<gpu_alert_very_very_hotO/passive=cooling-mapsgpu_warmish_limit_gpu: 5gpu_warm_limit_cpu;0gpu_hotter_limit_gpu< 5gpu_very_very_hot_limit_gpu= 5tsadc@ff280000rockchip,rk3288-tsadc4( %bHZ:tsadcapb_pclk8 etsadc-apbinitdefaultsleep>?>)?@LHqokaycz3ethernet@ff290000rockchip,rk3288-gmac4)macirqeth_wake_irq?@8bfgc]M:stmmacethmac_clk_rxmac_clk_txclk_mac_refclk_mac_refoutaclk_macpclk_mac8B estmmaceth qdisabledusb@ff500000 generic-ehci4P bAusb qdisabledusb@ff520000 generic-ohci4R )bAusb qdisabledusb@ff5400002rockchip,rk3288-usbrockchip,rk3066-usbsnps,dwc24T b:otghostB usb2-phy qdisabledusb@ff5800002rockchip,rk3288-usbrockchip,rk3066-usbsnps,dwc24X b:otghost!@@ C usb2-phyqokay0z@Cusb@ff5c0000 generic-ehci4\ b qdisableddma-controller@ff600000arm,pl330arm,primecell4`@yb :apb_pclk qdisabledi2c@ff650000rockchip,rk3288-i2c4e <:i2cbLdefaultDqokay2dpmic@1brockchip,rk8084xin32kwifibt_32kin&Edefault FGHWxIJ JregulatorsDCDC_REG1vdd_arm' q? Wq regulator-state-memlDCDC_REG2vdd_gpu' 5?Wq{regulator-state-memlDCDC_REG3 vcc135_ddrregulator-state-memDCDC_REG4vcc_18'w@?w@regulator-state-memw@LDO_REG3vdd_10'B@?B@regulator-state-memB@LDO_REG7 vdd10_lcd'B@?B@SWITCH_REG1 vcc33_lcd^regulator-state-memlLDO_REG8'w@?w@ vcc18_lcdi2c@ff660000rockchip,rk3288-i2c4f =:i2cbNdefaultK qdisabled2 pwm@ff680000rockchip,rk3288-pwm4hdefaultLb_ qdisabledpwm@ff680010rockchip,rk3288-pwm4hdefaultMb_qokaypwm@ff680020rockchip,rk3288-pwm4h defaultNb_ qdisabledpwm@ff680030rockchip,rk3288-pwm4h0defaultOb_ qdisabledsram@ff700000 mmio-sram4ppsmp-sram@0rockchip,rk3066-smp-sram4sram@ff720000#rockchip,rk3288-pmu-srammmio-sram4rpower-management@ff730000&rockchip,rk3288-pmusysconsimple-mfd4spower-controller!rockchip,rk3288-power-controller0h@ bpower-domain@94 bchgfdehilkj$PQRSTUVWXpower-domain@114 bopYZpower-domain@124 b[power-domain@134 b\]reboot-modesyscon-reboot-modeRBRBRB /RBsyscon@ff740000rockchip,rk3288-sgrfsyscon4tclock-controller@ff760000rockchip,rk3288-cru4vb :xin24m?@;H0jk$H#gׄeрxhрxhsyscon@ff770000&rockchip,rk3288-grfsysconsimple-mfd4w@edp-phyrockchip,rk3288-dp-phybh:24m] qdisabledrio-domains"rockchip,rk3288-io-voltage-domainqokayhIr}II^usbphyrockchip,rk3288-usb-phyqokayusb-phy@320]4 b]:phyclk8 ephy-resetCusb-phy@334]44b^:phyclk8 ephy-resetAusb-phy@348]4Hb_:phyclk8 ephy-resetBwatchdog@ff800000 rockchip,rk3288-wdtsnps,dw-wdt4bp Oqokaysound@ff8b0000,rockchip,rk3288-spdifrockchip,rk3066-spdif4bT :mclkhclk_tx 6default`?@ qdisabledi2s@ff890000(rockchip,rk3288-i2srockchip,rk3066-i2s4 5bR:i2s_clki2s_hclk__txrxdefaultaqokaycrypto@ff8a0000rockchip,rk3288-crypto4@ 0 b}:aclkhclksclkapb_pclk8 ecrypto-rstiommu@ff900800rockchip,iommu4@ b :aclkiface  qdisablediommu@ff914000rockchip,iommu 4@P b :aclkiface   qdisabledrga@ff920000rockchip,rk3288-rga4 bj:aclkhclksclk /b 8ilm ecoreaxiahbvop@ff930000rockchip,rk3288-vop 4 b:aclk_vopdclk_vophclk_vop /b 8def eaxiahbdclk =cqokayport endpoint@04 Ddwendpoint@14 Desendpoint@24 Dfmendpoint@34 Dgpiommu@ff930300rockchip,iommu4 b :aclkiface /b  qokaycvop@ff940000rockchip,rk3288-vop 4 b:aclk_vopdclk_vophclk_vop /b 8 eaxiahbdclk =h qdisabledport endpoint@04 Dixendpoint@14 Djtendpoint@24 Dknendpoint@34 Dlqiommu@ff940300rockchip,iommu4 b :aclkiface /b   qdisabledhdsi@ff960000*rockchip,rk3288-mipi-dsisnps,dw-mipi-dsi4@ b~d :refpclk /b ?@ qdisabledportsport@04endpoint@04 Dmfendpoint@14 Dnkport@14lvds@ff96c000rockchip,rk3288-lvds4@bg :pclk_lvdslcdco /b ?@ qdisabledportsport@04endpoint@04 Dpgendpoint@14 Dqlport@14dp@ff970000rockchip,rk3288-dp4@ bbic:dppclkrdp /b 8oedp?@ qdisabledportsport@04endpoint@04 Dseendpoint@14 Dtjport@14hdmi@ff980000rockchip,rk3288-dw-hdmi4 gbhmn:iahbisfrcec /b ?@qokaydefaultunwedgeuvportsport@04endpoint@04 Dwdendpoint@14 Dxiport@14video-codec@ff9a0000rockchip,rk3288-vpu4   vepuvdpub :aclkhclk =y /b iommu@ff9a0800rockchip,iommu4 b :aclkiface  /b yiommu@ff9c0440rockchip,iommu 4@@@ ob :aclkiface  qdisabledgpu@ffa30000#rockchip,rk3288-maliarm,mali-t7604$ jobmmugpub?zS /b qokay T{5opp-table-1operating-points-v2zopp-100000000~opp-200000000 ~opp-300000000B@opp-400000000ׄopp-600000000#Fqos@ffaa0000rockchip,rk3288-qossyscon4 \qos@ffaa0080rockchip,rk3288-qossyscon4 ]qos@ffad0000rockchip,rk3288-qossyscon4 Qqos@ffad0100rockchip,rk3288-qossyscon4 Rqos@ffad0180rockchip,rk3288-qossyscon4 Sqos@ffad0400rockchip,rk3288-qossyscon4 Tqos@ffad0480rockchip,rk3288-qossyscon4 Uqos@ffad0500rockchip,rk3288-qossyscon4 Pqos@ffad0800rockchip,rk3288-qossyscon4 Vqos@ffad0880rockchip,rk3288-qossyscon4 Wqos@ffad0900rockchip,rk3288-qossyscon4 Xqos@ffae0000rockchip,rk3288-qossyscon4 [qos@ffaf0000rockchip,rk3288-qossyscon4 Yqos@ffaf0080rockchip,rk3288-qossyscon4 Zdma-controller@ffb20000arm,pl330arm,primecell4@yb :apb_pclk_efuse@ffb40000rockchip,rk3288-efuse4 bq :pclk_efusecpu-id@74cpu_leakage@174interrupt-controller@ffc01000 arm,gic-400 ` u@4 @ `   pinctrlrockchip,rk3288-pinctrl?@default |}~gpio@ff750000rockchip,gpio-bank4u Qb@   ` u| PMIC_SLEEP_APPMIC_INT_LPOWER_BUTTON_LRECOVERY_SW_LOT_RESETAP_WARM_RESET_HI2C0_SDA_PMICI2C0_SCL_PMICnFALUTEgpio@ff780000rockchip,gpio-bank4x RbA   ` ugpio@ff790000rockchip,gpio-bank4y SbB   ` u0 CONFIG0CONFIG1CONFIG2CONFIG3EMMC_RST_Lgpio@ff7a0000rockchip,gpio-bank4z TbC   ` u FLASH0_D0FLASH0_D1FLASH0_D2FLASH0_D3FLASH0_D4FLASH0_D5FLASH0_D6FLASH0_D7FLASH0_CS2/EMMC_CMDFLASH0_DQS/EMMC_CLKOgpio@ff7b0000rockchip,gpio-bank4{ UbD   ` u UART0_RXDUART0_TXDUART0_CTS_LUART0_RTS_LSDIO0_D0SDIO0_D1SDIO0_D2SDIO0_D3SDIO0_CMDSDIO0_CLKBT_DEV_WAKEWIFI_ENABLE_HBT_ENABLE_LWIFI_HOST_WAKEBT_HOST_WAKE.gpio@ff7c0000rockchip,gpio-bank4| VbE   ` ugpio@ff7d0000rockchip,gpio-bank4} WbF   ` ugpio@ff7e0000rockchip,gpio-bank4~ XbG   ` u PWM_LOGTPM_INT_HSDMMC_DET_LAP_FLASH_WP_LCPU_NMIDVSOKHDMI_WAKEPOWER_HDMI_ONDVS1DVS2HDMI_CECI2C5_SDA_HDMII2C5_SCL_HDMIUART2_RXDUART2_TXDJgpio@ff7f0000rockchip,gpio-bank4 YbH   ` u^ RAM_ID0RAM_ID1RAM_ID2RAM_ID3I2C1_SDA_TPMI2C1_SCL_TPMSPI2_CLKSPI2_CS0SPI2_RXDSPI2_TXDhdmihdmi-cec-c0 hdmi-cec-c7 hdmi-ddc uhdmi-ddc-unwedge vpower-hdmi-on  pcfg-output-low pcfg-pull-up pcfg-pull-down pcfg-pull-none pcfg-pull-none-12ma  suspendglobal-pwroff ~ddrio-pwroff }ddr0-retention |ddr1-retention edpedp-hpd  i2c0i2c0-xfer Di2c1i2c1-xfer $i2c2i2c2-xfer   Ki2c3i2c3-xfer %i2c4i2c4-xfer &i2c5i2c5-xfer 'i2s0i2s0-bus` alcdclcdc-ctl@ osdmmcsdmmc-clk sdmmc-cmd sdmmc-cd sdmmc-bus1 sdmmc-bus4@ sdio0sdio0-bus1 sdio0-bus4@ sdio0-cmd sdio0-clk sdio0-cd sdio0-wp sdio0-pwr sdio0-bkpwr sdio0-int wifienable-h bt-enable-l ,bt-host-wake bt-host-wake-l +bt-dev-wake-sleep bt-dev-wake-awake bt-dev-wake -sdio1sdio1-bus1 sdio1-bus4@ sdio1-cd sdio1-wp sdio1-bkpwr sdio1-int sdio1-cmd sdio1-clk sdio1-pwr  emmcemmc-clk emmc-cmd emmc-pwr  emmc-bus1 emmc-bus4@ emmc-bus8 emmc-reset  spi0spi0-clk  spi0-cs0  spi0-tx spi0-rx spi0-cs1 spi1spi1-clk  spi1-cs0  spi1-rx spi1-tx spi2spi2-cs1 spi2-clk  spi2-cs0 #spi2-rx "spi2-tx  !uart0uart0-xfer (uart0-cts )uart0-rts *uart1uart1-xfer  /uart1-cts  uart1-rts  uart2uart2-xfer 0uart3uart3-xfer 1uart3-cts  uart3-rts  uart4uart4-xfer 2uart4-cts  uart4-rts  tsadcotp-pin >otp-out ?pwm0pwm0-pin Lpwm1pwm1-pin Mpwm2pwm2-pin Npwm3pwm3-pin Ogmacrgmii-pins  rmii-pins spdifspdif-tx  `pcfg-pull-none-drv-8ma  pcfg-pull-up-drv-8ma  pcfg-output-high buttonspwr-key-l pmicpmic-int-l Fdvs-1  Gdvs-2 Hrebootap-warm-reset-h recovery-switchrec-mode-l tpmtpm-int-h write-protectfw-wp-ap chosen serial2:115200n8memory(memory4power-button gpio-keysdefaultkey-power Power /E !t ,dxgpio-restart gpio-restart /E default >emmc-pwrseqmmc-pwrseq-emmcdefault G sdio-pwrseqmmc-pwrseq-simpleb :ext_clockdefault G. regulator-vcc-5vregulator-fixedvcc_5v'LK@?LK@ Sregulator-vcc33-sysregulator-fixed vcc33_sys'2Z?2Zregulator-vcc50-hdmiregulator-fixed vcc50_hdmi S ^ qJ defaultregulator-vdd-logicpwm-regulator vdd_logic v { { '~?pWregulator-vcc33-ioregulator-fixed vcc33_io SIsound!rockchip,rockchip-audio-max98090 VEYRON-HDMI   #address-cells#size-cellscompatibleinterrupt-parentmodelethernet0gpio0gpio1gpio2gpio3gpio4gpio5gpio6gpio7gpio8i2c0i2c1i2c2i2c3i2c4i2c5mshc0mshc1mshc2mshc3serial0serial1serial2serial3serial4spi0spi1spi2mmc0interruptsinterrupt-affinityenable-methodrockchip,pmudevice_typeregresetsoperating-points-v2#cooling-cellsclocksdynamic-power-coefficientcpu0-supplyphandleopp-sharedopp-hzopp-microvoltclock-latency-nsrangesclock-frequencyclock-output-names#clock-cellsarm,cpu-registers-not-fw-configuredarm,no-tick-in-suspendclock-namesportsmax-frequencyfifo-depthreset-namesstatusbus-widthcap-sd-highspeedcap-sdio-irqkeep-power-in-suspendmmc-pwrseqnon-removablepinctrl-namespinctrl-0sd-uhs-sdr12sd-uhs-sdr25sd-uhs-sdr50sd-uhs-sdr104vmmc-supplyvqmmc-supplycap-mmc-highspeedrockchip,default-sample-phasedisable-wpmmc-hs200-1_8v#io-channel-cellsdmasdma-namesrx-sample-delay-nsspi-max-frequencyi2c-scl-falling-time-nsi2c-scl-rising-time-nspowered-while-suspendedreg-shiftreg-io-widthhost-wakeup-gpiosshutdown-gpiosdevice-wakeup-gpiosmax-speedbrcm,bt-pcm-int-params#dma-cellsarm,pl330-broken-no-flushparm,pl330-periph-burstpolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresistripcooling-devicepinctrl-1pinctrl-2#thermal-sensor-cellsrockchip,grfrockchip,hw-tshut-temprockchip,hw-tshut-moderockchip,hw-tshut-polarityinterrupt-namesphysphy-namesneeds-reset-on-resumedr_modesnps,reset-phy-on-wakesnps,need-phy-for-wakeg-np-tx-fifo-sizeg-rx-fifo-sizeg-tx-fifo-sizeassigned-clocksassigned-clock-parentsrockchip,system-power-controllerwakeup-sourcevcc1-supplyvcc2-supplyvcc3-supplyvcc4-supplyvcc7-supplyvcc8-supplyvddio-supplydvs-gpiosvcc11-supplyregulator-nameregulator-always-onregulator-boot-onregulator-min-microvoltregulator-max-microvoltregulator-ramp-delayregulator-off-in-suspendregulator-on-in-suspendregulator-suspend-microvoltregulator-suspend-mem-disabled#pwm-cells#power-domain-cellspm_qosoffsetmode-normalmode-recoverymode-bootloadermode-loader#reset-cellsassigned-clock-rates#phy-cellsbb-supplydvp-supplyflash0-supplygpio1830-supplygpio30-supplylcdc-supplywifi-supply#sound-dai-cellsrockchip,playback-channelsrockchip,capture-channels#iommu-cellsrockchip,disable-mmu-resetpower-domainsiommusremote-endpointmali-supplyinterrupt-controller#interrupt-cellsgpio-controller#gpio-cellsgpio-line-namesrockchip,pinsoutput-lowbias-pull-upbias-pull-downbias-disabledrive-strengthoutput-highstdout-pathlabellinux,codedebounce-intervalpriorityreset-gpiosvin-supplyenable-active-highgpiopwmspwm-supplypwm-dutycycle-rangepwm-dutycycle-unitrockchip,modelrockchip,hdmi-codecrockchip,i2s-controller