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ČmĘÍČĚĹĆžżÔŐÖŮŃŇchgfdehilkj$ŽVWXYZ[\]^špower-domain@11? mĎopŽ_`špower-domain@12? mĐÜŽašpower-domain@13? mŔŽbcšreboot-modesyscon-reboot-modeľ”źRBĂČRBĂÖRBĂ ćRBĂsyscon@ff740000rockchip,rk3288-sgrfsyscon?˙tclock-controller@ff760000rockchip,rk3288-cru?˙vm Exin24mńFýňHâŃÝjŇŢk$˙#g¸€ׄÍeáŁđрxhŔáŁđрxhŔšsyscon@ff770000&rockchip,rk3288-grfsysconsimple-mfd?˙wšFedp-phyrockchip,rk3288-dp-phymhE24m |okayšyio-domains"rockchip,rk3288-io-voltage-domain|okay 6 ) 4 B6 R6 `d l xe …usbphyrockchip,rk3288-usb-phy|okayusb-phy@320 ? m]EphyclkýC… pphy-resetšIusb-phy@334 ?4m^EphyclkýCˆ pphy-resetšGusb-phy@348 ?Hm_EphyclkýC‹ pphy-resetšHwatchdog@ff800000 rockchip,rk3288-wdtsnps,dw-wdt?˙€mp úO|okaysound@ff8b0000,rockchip,rk3288-spdifrockchip,rk3066-spdif?˙‹ “mTĐ EmclkhclkÓfŘtx ú67defaultEgńF |disabledi2s@ff890000(rockchip,rk3288-i2srockchip,rk3066-i2s?˙‰ “ ú5mRÎEi2s_clki2s_hclkÓffŘtxrx7defaultEh ¤ ż|okayš crypto@ff8a0000rockchip,rk3288-crypto?˙Š@ ú0 mÇÍ}ÁEaclkhclksclkapb_pclkCŽ pcrypto-rstiommu@ff900800rockchip,iommu?˙@ úmĘÔ Eaclkiface Ů |disablediommu@ff914000rockchip,iommu ?˙‘@˙‘P úmÍŐ Eaclkiface Ů ć |disabledrga@ff920000rockchip,rk3288-rga?˙’€ úmČÖjEaclkhclksclk i Cilm pcoreaxiahbvop@ff930000rockchip,rk3288-vop ?˙“œ˙“ úmĹžŃEaclk_vopdclk_vophclk_vop i Cdef paxiahbdclk j|okayportš endpoint@0? kš€endpoint@1? lš{endpoint@2? mštendpoint@3? nšwiommu@ff930300rockchip,iommu?˙“ úmĹŃ Eaclkiface i  Ů|okayšjvop@ff940000rockchip,rk3288-vop ?˙”œ˙” úmĆżŇEaclk_vopdclk_vophclk_vop i C°ą˛ paxiahbdclk o|okayportš endpoint@0? pšendpoint@1? qš|endpoint@2? ršuendpoint@3? sšxiommu@ff940300rockchip,iommu?˙” úmĆŇ Eaclkiface i  Ů|okayšodsi@ff960000*rockchip,rk3288-mipi-dsisnps,dw-mipi-dsi?˙–@ úm~d Erefpclk i ńF |disabledportsport@0?endpoint@0? tšmendpoint@1? ušrport@1?lvds@ff96c000rockchip,rk3288-lvds?˙–Ŕ@mg Epclk_lvds7lcdcEv i ńF |disabledportsport@0?endpoint@0? wšnendpoint@1? xšsport@1?dp@ff970000rockchip,rk3288-dp?˙—@ úbmicEdppclkWy\dp i CopdpńF|okay7defaultEzportsport@0?endpoint@0? {šlendpoint@1? |šqport@1?endpoint@0? }šŹhdmi@ff980000rockchip,rk3288-dw-hdmi?˙˜ úgmhmnEiahbisfrcec i ńF “|okay7defaultunwedgeE~ÇšŁportsport@0?endpoint@0? €škendpoint@1? špport@1?video-codec@ff9a0000rockchip,rk3288-vpu?˙šú   GvepuvdpumĐÜ Eaclkhclk ‚ i iommu@ff9a0800rockchip,iommu?˙š ú mĐÜ Eaclkiface Ů i š‚iommu@ff9c0440rockchip,iommu ?˙œ@@˙œ€@ úomĎŰ Eaclkiface Ů |disabledgpu@ffa30000#rockchip,rk3288-maliarm,mali-t760?˙Ł$ú GjobmmugpumŔJƒ^ i |okay &„šCopp-table-1operating-points-v2šƒopp-100000000­őá´~đopp-200000000­ ë´~đopp-300000000­áŁ´B@opp-400000000­ׄ´Čŕopp-600000000­#ĂF´Đqos@ffaa0000rockchip,rk3288-qossyscon?˙Ş šbqos@ffaa0080rockchip,rk3288-qossyscon?˙Ş€ šcqos@ffad0000rockchip,rk3288-qossyscon?˙­ šWqos@ffad0100rockchip,rk3288-qossyscon?˙­ šXqos@ffad0180rockchip,rk3288-qossyscon?˙­€ šYqos@ffad0400rockchip,rk3288-qossyscon?˙­ šZqos@ffad0480rockchip,rk3288-qossyscon?˙­€ š[qos@ffad0500rockchip,rk3288-qossyscon?˙­ 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G‚ tFLASH0_D0FLASH0_D1FLASH0_D2FLASH0_D3FLASH0_D4FLASH0_D5FLASH0_D6FLASH0_D7FLASH0_CS2/EMMC_CMDFLASH0_DQS/EMMC_CLKOgpio@ff7b0000rockchip,gpio-bank?˙{ úUmD X h 2 Gł tUART0_RXDUART0_TXDUART0_CTSUART0_RTSSDIO0_D0SDIO0_D1SDIO0_D2SDIO0_D3SDIO0_CMDSDIO0_CLKBT_DEV_WAKEWIFI_ENABLE_HBT_ENABLE_LWIFI_HOST_WAKEBT_HOST_WAKEšgpio@ff7c0000rockchip,gpio-bank?˙| úVmE X h 2 GA tSPI0_CLKSPI0_CS0SPI0_TXDSPI0_RXDVCC50_HDMI_ENš›gpio@ff7d0000rockchip,gpio-bank?˙} úWmF X h 2 G° tI2S0_SCLKI2S0_LRCK_RXI2S0_LRCK_TXI2S0_SDII2S0_SDO0HP_DET_HALS_INTINT_CODECI2S0_CLKI2C2_SDAI2C2_SCLMICDETSDMMC_D0SDMMC_D1SDMMC_D2SDMMC_D3SDMMC_CLKSDMMC_CMDšPgpio@ff7e0000rockchip,gpio-bank?˙~ úXmG X h 2 Gâ tLCDC_BLPWM_LOGBL_ENTRACKPAD_INTTPM_INT_HSDMMC_DET_LAP_FLASH_WP_LEC_INTCPU_NMIDVSOKSDMMC_WPEDP_HPDDVS1nFALUT1LCD_ENDVS2VCC5V_GOOD_HI2C4_SDA_TPI2C4_SCL_TPI2C5_SDA_HDMII2C5_SCL_HDMI5V_DRVUART2_RXDUART2_TXDš gpio@ff7f0000rockchip,gpio-bank?˙ úYmH X h 2 G^ tRAM_ID0RAM_ID1RAM_ID2RAM_ID3I2C1_SDA_TPMI2C1_SCL_TPMSPI2_CLKSPI2_CS0SPI2_RXDSPI2_TXDhdmihdmi-cec-c0 „Œhdmi-cec-c7 „Œhdmi-ddc „ŒŒš~hdmi-ddc-unwedge „Œšvcc50-hdmi-en „Œšœpcfg-output-low ’špcfg-pull-up šŽpcfg-pull-down Şšpcfg-pull-none ššŒpcfg-pull-none-12ma š Ć š’suspendglobal-pwroff „Œš‡ddrio-pwroff „Œš†ddr0-retention „Žš…ddr1-retention „Žsuspend-l-wake „šˆsuspend-l-sleep „šŠedpedp-hpd „ šzi2c0i2c0-xfer „ŒŒšJi2c1i2c1-xfer „ŒŒš0i2c2i2c2-xfer „ Œ ŒšOi2c3i2c3-xfer „ŒŒš1i2c4i2c4-xfer „ŒŒš2i2c5i2c5-xfer „ŒŒš7i2s0i2s0-bus` „ŒŒŒŒŒŒšhlcdclcdc-ctl@ „ŒŒŒŒšvsdmmcsdmmc-clk „‘šsdmmc-cmd „‘šsdmmc-cd „Žsdmmc-bus1 „Žsdmmc-bus4@ „‘‘‘‘šsdmmc-cd-disabled „Œšsdmmc-cd-pin „Œšsdmmc-wp-pin „ Žšsdio0sdio0-bus1 „Žsdio0-bus4@ „‘‘‘‘šsdio0-cmd „‘šsdio0-clk „‘šsdio0-cd „Žsdio0-wp „Žsdio0-pwr „Žsdio0-bkpwr „Žsdio0-int „Žwifienable-h „Œš˜bt-enable-l „Œbt-host-wake „bt-host-wake-l „Œšbt-dev-wake-sleep „š‹bt-dev-wake-awake „š‰bt-dev-wake „Œsdio1sdio1-bus1 „Žsdio1-bus4@ „ŽŽŽŽsdio1-cd „Žsdio1-wp „Žsdio1-bkpwr „Žsdio1-int „Žsdio1-cmd „Žsdio1-clk „Œsdio1-pwr „ Žemmcemmc-clk „‘šemmc-cmd „‘š emmc-pwr „ Žemmc-bus1 „Žemmc-bus4@ „ŽŽŽŽemmc-bus8€ „‘‘‘‘‘‘‘‘š!emmc-reset „ Œš•spi0spi0-clk „ Žš#spi0-cs0 „ Žš&spi0-tx „Žš$spi0-rx „Žš%spi0-cs1 „Žspi1spi1-clk „ Žš(spi1-cs0 „ Žš+spi1-rx „Žš*spi1-tx „Žš)spi2spi2-cs1 „Žspi2-clk „Žš,spi2-cs0 „Žš/spi2-rx „Žš.spi2-tx „ Žš-uart0uart0-xfer „ŽŒš8uart0-cts „Žš9uart0-rts „Œš:uart1uart1-xfer „Ž Œš;uart1-cts „ Žuart1-rts „ Œuart2uart2-xfer „ŽŒš<uart3uart3-xfer „ŽŒš=uart3-cts „ Žuart3-rts „ Œuart4uart4-xfer „ŽŒš>uart4-cts „ Žuart4-rts „ Œtsadcotp-pin „ ŒšDotp-out „ ŒšEpwm0pwm0-pin „ŒšRpwm1pwm1-pin „ŒšSpwm2pwm2-pin „ŒšTpwm3pwm3-pin „ŒšUgmacrgmii-pinsđ „ŒŒŒŒ’’’’ŒŒŒ ’’ŒŒrmii-pins  „ŒŒŒŒŒŒŒŒŒŒspdifspdif-tx „ Œšgpcfg-pull-none-drv-8ma š Ćš‘pcfg-pull-up-drv-8ma  Ćpcfg-output-high Őšbuttonspwr-key-l „Žš“ap-lid-int-l „ŽšŽpmicpmic-int-l „ŽšKdvs-1 „ šLdvs-2 „šMrebootap-warm-reset-h „ Œš”recovery-switchrec-mode-l „ Žtpmtpm-int-h „Œwrite-protectfw-wp-ap „Œcodechp-det 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#address-cells#size-cellscompatibleinterrupt-parentmodelethernet0gpio0gpio1gpio2gpio3gpio4gpio5gpio6gpio7gpio8i2c0i2c1i2c2i2c3i2c4i2c5mshc0mshc1mshc2mshc3serial0serial1serial2serial3serial4spi0spi1spi2mmc0mmc1i2c20interruptsinterrupt-affinityenable-methodrockchip,pmudevice_typeregresetsoperating-points-v2#cooling-cellsclocksdynamic-power-coefficientcpu0-supplyphandleopp-sharedopp-hzopp-microvoltclock-latency-nsrangesclock-frequencyclock-output-names#clock-cellsarm,cpu-registers-not-fw-configuredarm,no-tick-in-suspendclock-namesportsmax-frequencyfifo-depthreset-namesstatusbus-widthcap-mmc-highspeedcap-sd-highspeedcard-detect-delaycd-gpiosrockchip,default-sample-phasesd-uhs-sdr12sd-uhs-sdr25sd-uhs-sdr50sd-uhs-sdr104vmmc-supplyvqmmc-supplypinctrl-namespinctrl-0wp-gpioscap-sdio-irqkeep-power-in-suspendmmc-pwrseqnon-removablemarvell,wakeup-pindisable-wpmmc-hs200-1_8v#io-channel-cellsdmasdma-namesgoogle,cros-ec-spi-pre-delayspi-max-frequencygoogle,remote-bussbs,i2c-retry-countsbs,poll-retry-countkeypad,num-rowskeypad,num-columnsgoogle,needs-ghost-filterlinux,keymaprx-sample-delay-nsi2c-scl-falling-time-nsi2c-scl-rising-time-nspowered-while-suspendedti,micbiasvcc-supplywakeup-sourcereg-shiftreg-io-width#dma-cellsarm,pl330-broken-no-flushparm,pl330-periph-burstpolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresistripcooling-devicepinctrl-1pinctrl-2#thermal-sensor-cellsrockchip,grfrockchip,hw-tshut-temprockchip,hw-tshut-moderockchip,hw-tshut-polarityinterrupt-namesphysphy-namesneeds-reset-on-resumedr_modesnps,reset-phy-on-wakesnps,need-phy-for-wakeg-np-tx-fifo-sizeg-rx-fifo-sizeg-tx-fifo-sizeassigned-clocksassigned-clock-parentsrockchip,system-power-controllervcc1-supplyvcc2-supplyvcc3-supplyvcc4-supplyvcc6-supplyvcc7-supplyvcc8-supplyvcc12-supplyvddio-supplyvcc10-supplyvcc9-supplyvcc11-supplydvs-gpiosregulator-nameregulator-always-onregulator-boot-onregulator-min-microvoltregulator-max-microvoltregulator-ramp-delayregulator-off-in-suspendregulator-on-in-suspendregulator-suspend-microvolt#pwm-cells#power-domain-cellspm_qosoffsetmode-normalmode-recoverymode-bootloadermode-loader#reset-cellsassigned-clock-rates#phy-cellsbb-supplydvp-supplyflash0-supplygpio1830-supplygpio30-supplylcdc-supplywifi-supplyaudio-supplysdcard-supply#sound-dai-cellsrockchip,playback-channelsrockchip,capture-channels#iommu-cellsrockchip,disable-mmu-resetpower-domainsiommusremote-endpointmali-supplyinterrupt-controller#interrupt-cellsgpio-controller#gpio-cellsgpio-line-namesrockchip,pinsoutput-lowbias-pull-upbias-pull-downbias-disabledrive-strengthoutput-highstdout-pathlabellinux,codedebounce-intervalpriorityreset-gpiosvin-supplyenable-active-highgpiopwmspwm-supplypwm-dutycycle-rangepwm-dutycycle-unitrockchip,modelrockchip,i2s-controllerrockchip,audio-codecrockchip,hp-det-gpiosrockchip,mic-det-gpiosrockchip,headset-codecrockchip,hdmi-codecstartup-delay-usbrightness-levelsnum-interpolated-stepsdefault-brightness-levelenable-gpiospost-pwm-on-delay-mspwm-off-delay-mspower-supplybacklighthactivehfront-porchhback-porchhsync-lenhsync-activevactivevfront-porchvback-porchvsync-lenvsync-activecharger-typelinux,input-type