ǹ8t( E<google,veyron-minnie-rev4google,veyron-minnie-rev3google,veyron-minnie-rev2google,veyron-minnie-rev1google,veyron-minnie-rev0google,veyron-minniegoogle,veyronrockchip,rk3288&7Google Minniealiases=/ethernet@ff290000G/pinctrl/gpio@ff750000M/pinctrl/gpio@ff780000S/pinctrl/gpio@ff790000Y/pinctrl/gpio@ff7a0000_/pinctrl/gpio@ff7b0000e/pinctrl/gpio@ff7c0000k/pinctrl/gpio@ff7d0000q/pinctrl/gpio@ff7e0000w/pinctrl/gpio@ff7f0000}/i2c@ff650000/i2c@ff140000/i2c@ff660000/i2c@ff150000/i2c@ff160000/i2c@ff170000/mmc@ff0f0000/mmc@ff0c0000/mmc@ff0d0000/mmc@ff0e0000/serial@ff180000/serial@ff190000/serial@ff690000/serial@ff1b0000/serial@ff1c0000/spi@ff110000/spi@ff120000/spi@ff130000/mmc@ff0f0000/mmc@ff0c0000/spi@ff110000/ec@0/i2c-tunnelarm-pmuarm,cortex-a12-pmu0cpusrockchip,rk3066-smp&cpu@5003cpuarm,cortex-a12?CJ^mtr cpu@5013cpuarm,cortex-a12?CJ^mtrcpu@5023cpuarm,cortex-a12?CJ^mtrcpu@5033cpuarm,cortex-a12?CJ^mtropp-table-0operating-points-v2opp-126000000 @opp-216000000  opp-408000000Q opp-600000000#F opp-696000000)|~opp-8160000000,B@opp-1008000000<opp-1200000000Gopp-1416000000TfrOopp-1512000000ZJopp-1608000000_" opp-1704000000epopp-1800000000kI\reserved-memorydma-unusable@fe000000?oscillator fixed-clockn6xin24m timerarm,armv7-timer 0   n6.timer@ff810000rockchip,rk3288-timer?  H ma  Epclktimerdisplay-subsystemrockchip,display-subsystemQ mmc@ff0c0000rockchip,rk3288-dw-mshcWр mDrvEbiuciuciu-driveciu-samplee ? @Cpreset|okay  Z*7BdefaultPmmc@ff0d0000rockchip,rk3288-dw-mshcWр mEswEbiuciuciu-driveciu-samplee !? @Cpreset|okayZg}Bdefault P*mmc@ff0e0000rockchip,rk3288-dw-mshcWр mFtxEbiuciuciu-driveciu-samplee "?@Cpreset |disabledmmc@ff0f0000rockchip,rk3288-dw-mshcWр mGuyEbiuciuciu-driveciu-samplee #?@Cpreset|okay7}Bdefault Psaradc@ff100000rockchip,saradc? $mI[Esaradcapb_pclkCW psaradc-apb |disabledspi@ff110000(rockchip,rk3288-spirockchip,rk3066-spimAREspiclkapb_pclk  txrx ,BdefaultP !"#?|okayec@0google,cros-ec-spi?& BdefaultP$-i2c-tunnelgoogle,cros-ec-i2c-tunnelbq27500@55 ti,bq27500?Ukeyboard-controllergoogle,cros-ec-keyb *DD;<=>?@A B CD}0Y1 d"#(  \V |})   + ^a !%$' & + ,./-32*5 4 9    8 l j6  g ispi@ff120000(rockchip,rk3288-spirockchip,rk3066-spimBSEspiclkapb_pclk txrx -BdefaultP%&'(? |disabledspi@ff130000(rockchip,rk3288-spirockchip,rk3066-spimCTEspiclkapb_pclktxrx .BdefaultP)*+,?|okayQ flash@0jedec,spi-nor?i2c@ff140000rockchip,rk3288-i2c? >Ei2cmMBdefaultP-|okayd2|dtpm@20infineon,slb9645tt? i2c@ff150000rockchip,rk3288-i2c? ?Ei2cmOBdefaultP.|okayd2|,touchscreen@10elan,ekth3500?&/BdefaultP01 /22i2c@ff160000rockchip,rk3288-i2c? @Ei2cmPBdefaultP3|okayd2|,ts3a227e@3b ti,ts3a227e?;&4BdefaultP5trackpad@15elan,ekth3000?& BdefaultP67i2c@ff170000rockchip,rk3288-i2c? AEi2cmQBdefaultP8 |disabledserial@ff180000&rockchip,rk3288-uartsnps,dw-apb-uart? 7mMUEbaudclkapb_pclktxrxBdefault P9:;|okaybluetoothBdefault P<=>brcm,bcm43540-bt  ? ? -?A-Kserial@ff190000&rockchip,rk3288-uartsnps,dw-apb-uart? 8mNVEbaudclkapb_pclktxrxBdefaultP@|okayserial@ff690000&rockchip,rk3288-uartsnps,dw-apb-uart?i 9mOWEbaudclkapb_pclkBdefaultPA|okayserial@ff1b0000&rockchip,rk3288-uartsnps,dw-apb-uart? :mPXEbaudclkapb_pclktxrxBdefaultPB |disabledserial@ff1c0000&rockchip,rk3288-uartsnps,dw-apb-uart? ;mQYEbaudclkapb_pclk  txrxBdefaultPC |disableddma-controller@ff250000arm,pl330arm,primecell?%@bmm Eapb_pclkthermal-zonesreserve-thermalDcpu-thermaldDtripscpu_alert0p:passiveEcpu_alert1$:passiveFcpu_crit :criticalcooling-mapsmap0E0map1F0gpu-thermaldDtripsgpu_alert04:passiveGgpu_crit :criticalcooling-mapsmap0G Htsadc@ff280000rockchip,rk3288-tsadc?( %mHZEtsadcapb_pclkC ptsadc-apbBinitdefaultsleepPIJI(K5H|okayLcDethernet@ff290000rockchip,rk3288-gmac?)~macirqeth_wake_irq(K8mfgc]MEstmmacethmac_clk_rxmac_clk_txclk_mac_refclk_mac_refoutaclk_macpclk_macCB pstmmaceth |disabledusb@ff500000 generic-ehci?P mLusb|okayusb@ff520000 generic-ohci?R )mLusb |disabledusb@ff5400002rockchip,rk3288-usbrockchip,rk3066-usbsnps,dwc2?T mEotghostM usb2-phy|okayusb@ff5800002rockchip,rk3288-usbrockchip,rk3066-usbsnps,dwc2?X mEotghost @@ N usb2-phy|okayz)Nusb@ff5c0000 generic-ehci?\ m |disableddma-controller@ff600000arm,pl330arm,primecell?`@bmm Eapb_pclk |disabledi2c@ff650000rockchip,rk3288-i2c?e <Ei2cmLBdefaultPO|okayd2|dpmic@1brockchip,rk808?xin32kwifibt_32kin&4Bdefault PPQR@amyS7SSregulatorsDCDC_REG1vdd_arm* qB Zq regulator-state-memoDCDC_REG2vdd_gpu* 5BZqregulator-state-memoDCDC_REG3 vcc135_ddrregulator-state-memDCDC_REG4vcc_18*w@Bw@regulator-state-memw@LDO_REG1 vcc33_io*2ZB2Z7regulator-state-mem2ZLDO_REG3vdd_10*B@BB@regulator-state-memB@LDO_REG7vdd10_lcd_pwren_h*&%B&%regulator-state-memoSWITCH_REG1 vcc33_lcdiregulator-state-memoLDO_REG6 vcc18_codec*w@Bw@jregulator-state-memoLDO_REG4 vccio_sd*w@B2Zregulator-state-memoLDO_REG5 vcc33_sd*2ZB2Zregulator-state-memoLDO_REG8 vcc33_ccd*2ZB2Zregulator-state-memoLDO_REG2*2ZB2Z vcc33_touch2regulator-state-memoSWITCH_REG2 vcc5v_touchregulator-state-memoi2c@ff660000rockchip,rk3288-i2c?f =Ei2cmNBdefaultPT|okayd2| max98090@10maxim,max98090?&UEmclkmqBdefaultPVpwm@ff680000rockchip,rk3288-pwm?hBdefaultPWm_|okaypwm@ff680010rockchip,rk3288-pwm?hBdefaultPXm_|okaypwm@ff680020rockchip,rk3288-pwm?h BdefaultPYm_ |disabledpwm@ff680030rockchip,rk3288-pwm?h0BdefaultPZm_ |disabledsram@ff700000 mmio-sram?ppsmp-sram@0rockchip,rk3066-smp-sram?sram@ff720000#rockchip,rk3288-pmu-srammmio-sram?rpower-management@ff730000&rockchip,rk3288-pmusysconsimple-mfd?spower-controller!rockchip,rk3288-power-controllerh) npower-domain@9? mchgfdehilkj$[\]^_`abcpower-domain@11? mopdepower-domain@12? mfpower-domain@13? mghreboot-modesyscon-reboot-modeRBRB RB  RBsyscon@ff740000rockchip,rk3288-sgrfsyscon?tclock-controller@ff760000rockchip,rk3288-cru?vm Exin24m(K Hjk$ ,#gׄeрxhрxhsyscon@ff770000&rockchip,rk3288-grfsysconsimple-mfd?wKedp-phyrockchip,rk3288-dp-phymhE24m A|okay~io-domains"rockchip,rk3288-io-voltage-domain|okay L7 V a o7 7 i  j usbphyrockchip,rk3288-usb-phy|okayusb-phy@320 A? m]EphyclkC pphy-resetNusb-phy@334 A?4m^EphyclkC pphy-resetLusb-phy@348 A?Hm_EphyclkC pphy-resetMwatchdog@ff800000 rockchip,rk3288-wdtsnps,dw-wdt?mp O|okaysound@ff8b0000,rockchip,rk3288-spdifrockchip,rk3066-spdif? mT Emclkhclkktx 6BdefaultPl(K |disabledi2s@ff890000(rockchip,rk3288-i2srockchip,rk3066-i2s?  5mREi2s_clki2s_hclkkktxrxBdefaultPm  |okaycrypto@ff8a0000rockchip,rk3288-crypto?@ 0 m}Eaclkhclksclkapb_pclkC pcrypto-rstiommu@ff900800rockchip,iommu?@ m Eaclkiface  |disablediommu@ff914000rockchip,iommu ?@P m Eaclkiface   |disabledrga@ff920000rockchip,rk3288-rga? mjEaclkhclksclk .n Cilm pcoreaxiahbvop@ff930000rockchip,rk3288-vop ? mEaclk_vopdclk_vophclk_vop .n Cdef paxiahbdclk <o|okayport endpoint@0? Cpendpoint@1? Cqendpoint@2? Cryendpoint@3? Cs|iommu@ff930300rockchip,iommu? m Eaclkiface .n  |okayovop@ff940000rockchip,rk3288-vop ? mEaclk_vopdclk_vophclk_vop .n C paxiahbdclk <t|okayport endpoint@0? Cuendpoint@1? Cvendpoint@2? Cwzendpoint@3? Cx}iommu@ff940300rockchip,iommu? m Eaclkiface .n  |okaytdsi@ff960000*rockchip,rk3288-mipi-dsisnps,dw-mipi-dsi?@ m~d Erefpclk .n (K |disabledportsport@0?endpoint@0? Cyrendpoint@1? Czwport@1?lvds@ff96c000rockchip,rk3288-lvds?@mg Epclk_lvdsBlcdcP{ .n (K |disabledportsport@0?endpoint@0? C|sendpoint@1? C}xport@1?dp@ff970000rockchip,rk3288-dp?@ bmicEdppclk~dp .n Copdp(K|okayBdefaultPportsport@0?endpoint@0? Cqendpoint@1? Cvport@1?endpoint@0? Chdmi@ff980000rockchip,rk3288-dw-hdmi? gmhmnEiahbisfrcec .n (K |okayBdefaultunwedgePportsport@0?endpoint@0? Cpendpoint@1? Cuport@1?video-codec@ff9a0000rockchip,rk3288-vpu?   ~vepuvdpum Eaclkhclk < .n iommu@ff9a0800rockchip,iommu? m Eaclkiface  .n iommu@ff9c0440rockchip,iommu ?@@@ om Eaclkiface  |disabledgpu@ffa30000#rockchip,rk3288-maliarm,mali-t760?$ ~jobmmugpumJ^ .n |okay SHopp-table-1operating-points-v2opp-100000000~opp-200000000 ~opp-300000000B@opp-400000000ׄopp-600000000#Fqos@ffaa0000rockchip,rk3288-qossyscon? gqos@ffaa0080rockchip,rk3288-qossyscon? hqos@ffad0000rockchip,rk3288-qossyscon? \qos@ffad0100rockchip,rk3288-qossyscon? ]qos@ffad0180rockchip,rk3288-qossyscon? ^qos@ffad0400rockchip,rk3288-qossyscon? _qos@ffad0480rockchip,rk3288-qossyscon? `qos@ffad0500rockchip,rk3288-qossyscon? [qos@ffad0800rockchip,rk3288-qossyscon? aqos@ffad0880rockchip,rk3288-qossyscon? bqos@ffad0900rockchip,rk3288-qossyscon? cqos@ffae0000rockchip,rk3288-qossyscon? fqos@ffaf0000rockchip,rk3288-qossyscon? dqos@ffaf0080rockchip,rk3288-qossyscon? edma-controller@ffb20000arm,pl330arm,primecell?@bmm Eapb_pclkkefuse@ffb40000rockchip,rk3288-efuse? mq Epclk_efusecpu-id@7?cpu_leakage@17?interrupt-controller@ffc01000 arm,gic-400 _ t@? @ `   pinctrlrockchip,rk3288-pinctrl(K&BdefaultsleepPgpio@ff750000rockchip,gpio-bank?u Qm@   _ t PMIC_SLEEP_APDDRIO_PWROFFDDRIO_RETENTS3A227E_INT_LPMIC_INT_LPWR_KEY_LAP_LID_INT_LEC_IN_RWAC_PRESENT_APRECOVERY_SW_LOTP_OUTHOST1_PWR_ENUSBOTG_PWREN_HAP_WARM_RESET_HnFALUT2I2C0_SDA_PMICI2C0_SCL_PMICSUSPEND_LUSB_INT4gpio@ff780000rockchip,gpio-bank?x RmA   _ tgpio@ff790000rockchip,gpio-bank?y SmB   _ t CONFIG0CONFIG1CONFIG2CONFIG3PROCHOT#EMMC_RST_LBL_PWR_ENAVDD_1V8_DISP_ENTOUCH_INTTOUCH_RSTI2C3_SCL_TPI2C3_SDA_TP/gpio@ff7a0000rockchip,gpio-bank?z TmC   _ t FLASH0_D0FLASH0_D1FLASH0_D2FLASH0_D3FLASH0_D4FLASH0_D5FLASH0_D6FLASH0_D7FLASH0_CS2/EMMC_CMDFLASH0_DQS/EMMC_CLKOgpio@ff7b0000rockchip,gpio-bank?{ UmD   _ t UART0_RXDUART0_TXDUART0_CTSUART0_RTSSDIO0_D0SDIO0_D1SDIO0_D2SDIO0_D3SDIO0_CMDSDIO0_CLKdev_wakeWIFI_ENABLE_HBT_ENABLE_LWIFI_HOST_WAKEBT_HOST_WAKE?gpio@ff7c0000rockchip,gpio-bank?| VmE   _ tU Volum_Up#Volum_Down#SPI0_CLKSPI0_CS0SPI0_TXDSPI0_RXDVCC50_HDMI_ENgpio@ff7d0000rockchip,gpio-bank?} WmF   _ t I2S0_SCLKI2S0_LRCK_RXI2S0_LRCK_TXI2S0_SDII2S0_SDO0HP_DET_HINT_CODECI2S0_CLKI2C2_SDAI2C2_SCLMICDETSDMMC_D0SDMMC_D1SDMMC_D2SDMMC_D3SDMMC_CLKSDMMC_CMDUgpio@ff7e0000rockchip,gpio-bank?~ XmG   _ t LCDC_BLPWM_LOGBL_ENTRACKPAD_INTTPM_INT_HSDMMC_DET_LAP_FLASH_WP_LEC_INTCPU_NMIDVS_OKSDMMC_WPEDP_HPDDVS1nFALUT1LCD_ENDVS2VCC5V_GOOD_HI2C4_SDA_TPI2C4_SCL_TPI2C5_SDA_HDMII2C5_SCL_HDMI5V_DRVUART2_RXDUART2_TXD gpio@ff7f0000rockchip,gpio-bank? YmH   _ t^ RAM_ID0RAM_ID1RAM_ID2RAM_ID3I2C1_SDA_TPMI2C1_SCL_TPMSPI2_CLKSPI2_CS0SPI2_RXDSPI2_TXDhdmihdmi-cec-c0 hdmi-cec-c7 hdmi-ddc hdmi-ddc-unwedge vcc50-hdmi-en pcfg-output-low pcfg-pull-up pcfg-pull-down pcfg-pull-none pcfg-pull-none-12ma  suspendglobal-pwroff ddrio-pwroff ddr0-retention ddr1-retention suspend-l-wake suspend-l-sleep edpedp-hpd  i2c0i2c0-xfer Oi2c1i2c1-xfer -i2c2i2c2-xfer   Ti2c3i2c3-xfer .i2c4i2c4-xfer 3i2c5i2c5-xfer 8i2s0i2s0-bus` mlcdclcdc-ctl@ {sdmmcsdmmc-clk sdmmc-cmd sdmmc-cd sdmmc-bus1 sdmmc-bus4@ sdmmc-cd-disabled sdmmc-cd-pin sdio0sdio0-bus1 sdio0-bus4@ sdio0-cmd sdio0-clk sdio0-cd sdio0-wp sdio0-pwr sdio0-bkpwr sdio0-int wifienable-h bt-enable-l =bt-host-wake bt-host-wake-l <bt-dev-wake-sleep bt-dev-wake-awake bt-dev-wake >sdio1sdio1-bus1 sdio1-bus4@ sdio1-cd sdio1-wp sdio1-bkpwr sdio1-int sdio1-cmd sdio1-clk sdio1-pwr  emmcemmc-clk emmc-cmd emmc-pwr  emmc-bus1 emmc-bus4@ emmc-bus8 emmc-reset  spi0spi0-clk   spi0-cs0  #spi0-tx !spi0-rx "spi0-cs1 spi1spi1-clk  %spi1-cs0  (spi1-rx 'spi1-tx &spi2spi2-cs1 spi2-clk )spi2-cs0 ,spi2-rx +spi2-tx  *uart0uart0-xfer 9uart0-cts :uart0-rts ;uart1uart1-xfer  @uart1-cts  uart1-rts  uart2uart2-xfer Auart3uart3-xfer Buart3-cts  uart3-rts  uart4uart4-xfer Cuart4-cts  uart4-rts  tsadcotp-pin Iotp-out Jpwm0pwm0-pin Wpwm1pwm1-pin Xpwm2pwm2-pin Ypwm3pwm3-pin Zgmacrgmii-pins  rmii-pins spdifspdif-tx  lpcfg-pull-none-drv-8ma  pcfg-pull-up-drv-8ma  pcfg-output-high buttonspwr-key-l ap-lid-int-l volum-down-l  volum-up-l  pmicpmic-int-l Pdvs-1  Qdvs-2 Rrebootap-warm-reset-h recovery-switchrec-mode-l tpmtpm-int-h write-protectfw-wp-ap codechp-det int-codec Vmic-det  headsetts3a227e-int-l 5backlightbl_pwr_en  bl-en lcdlcd-en avdd-1v8-disp-en  chargerac-present-ap cros-ecec-int $trackpadtrackpad-int 6usb-hosthost1-pwr-en usbotg-pwren-h buck-5vdrv-5v prochotgpio-prochot touchscreentouch-int 0touch-rst 1chosen serial2:115200n8memory3memory?power-button gpio-keysBdefaultPkey-power Power 4 t +dgpio-restart gpio-restart 4 BdefaultP =emmc-pwrseqmmc-pwrseq-emmcPBdefault / sdio-pwrseqmmc-pwrseq-simplem Eext_clockBdefaultP ?regulator-vcc-5vregulator-fixedvcc_5v*LK@BLK@ F Q d BdefaultPSregulator-vcc33-sysregulator-fixed vcc33_sys*2ZB2Z Fregulator-vcc50-hdmiregulator-fixed vcc50_hdmi FS Q dBdefaultPregulator-vdd-logicpwm-regulator vdd_logic i n y{ *~BpZsound!rockchip,rockchip-audio-max98090BdefaultP VEYRON-I2S   U U   regulator-backlightregulator-fixed Q d/ BdefaultPbacklight_regulator F 4:regulator-panelregulator-fixed Q d BdefaultPpanel_regulator Fvcc18-lcdregulator-fixed Q d/ BdefaultP vcc18_lcd Fbacklightpwm-backlight E W n BdefaultP iB@   panelauo,b101ean01|okay  panel-timing@         portsportendpoint Cgpio-charger gpio-charger 'mains 4BdefaultPlid-switch gpio-keysBdefaultPswitch-lid Lid 4  4 +regulator-vccsysregulator-fixedvccsysregulator-vcc5-host1regulator-fixed Q d4 BdefaultP vcc5_host1regulator-vcc5v-otgregulator-fixed Q d4 BdefaultP vcc5_host2volume-buttons gpio-keysBdefaultPkey-volum-down Volum_down   r +dkey-volum-up Volum_up   s +d #address-cells#size-cellscompatibleinterrupt-parentmodelethernet0gpio0gpio1gpio2gpio3gpio4gpio5gpio6gpio7gpio8i2c0i2c1i2c2i2c3i2c4i2c5mshc0mshc1mshc2mshc3serial0serial1serial2serial3serial4spi0spi1spi2mmc0mmc1i2c20interruptsinterrupt-affinityenable-methodrockchip,pmudevice_typeregresetsoperating-points-v2#cooling-cellsclocksdynamic-power-coefficientcpu0-supplyphandleopp-sharedopp-hzopp-microvoltclock-latency-nsrangesclock-frequencyclock-output-names#clock-cellsarm,cpu-registers-not-fw-configuredarm,no-tick-in-suspendclock-namesportsmax-frequencyfifo-depthreset-namesstatusbus-widthcap-mmc-highspeedcap-sd-highspeedcard-detect-delaycd-gpiosrockchip,default-sample-phasesd-uhs-sdr12sd-uhs-sdr25sd-uhs-sdr50sd-uhs-sdr104vmmc-supplyvqmmc-supplydisable-wppinctrl-namespinctrl-0cap-sdio-irqkeep-power-in-suspendmmc-pwrseqnon-removablemmc-hs200-1_8v#io-channel-cellsdmasdma-namesgoogle,cros-ec-spi-pre-delayspi-max-frequencygoogle,remote-buskeypad,num-rowskeypad,num-columnsgoogle,needs-ghost-filterlinux,keymaprx-sample-delay-nsi2c-scl-falling-time-nsi2c-scl-rising-time-nspowered-while-suspendedreset-gpiosvcc33-supplyvccio-supplyti,micbiasvcc-supplywakeup-sourcereg-shiftreg-io-widthhost-wakeup-gpiosshutdown-gpiosdevice-wakeup-gpiosmax-speedbrcm,bt-pcm-int-params#dma-cellsarm,pl330-broken-no-flushparm,pl330-periph-burstpolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresistripcooling-devicepinctrl-1pinctrl-2#thermal-sensor-cellsrockchip,grfrockchip,hw-tshut-temprockchip,hw-tshut-moderockchip,hw-tshut-polarityinterrupt-namesphysphy-namesneeds-reset-on-resumedr_modesnps,reset-phy-on-wakesnps,need-phy-for-wakeg-np-tx-fifo-sizeg-rx-fifo-sizeg-tx-fifo-sizeassigned-clocksassigned-clock-parentsrockchip,system-power-controllervcc1-supplyvcc2-supplyvcc3-supplyvcc4-supplyvcc6-supplyvcc7-supplyvcc8-supplyvcc12-supplyvddio-supplyvcc10-supplyvcc9-supplyvcc11-supplyregulator-nameregulator-always-onregulator-boot-onregulator-min-microvoltregulator-max-microvoltregulator-ramp-delayregulator-off-in-suspendregulator-on-in-suspendregulator-suspend-microvolt#pwm-cells#power-domain-cellspm_qosoffsetmode-normalmode-recoverymode-bootloadermode-loader#reset-cellsassigned-clock-rates#phy-cellsbb-supplydvp-supplyflash0-supplygpio1830-supplygpio30-supplylcdc-supplywifi-supplyaudio-supplysdcard-supply#sound-dai-cellsrockchip,playback-channelsrockchip,capture-channels#iommu-cellsrockchip,disable-mmu-resetpower-domainsiommusremote-endpointmali-supplyinterrupt-controller#interrupt-cellsgpio-controller#gpio-cellsgpio-line-namesrockchip,pinsoutput-lowbias-pull-upbias-pull-downbias-disabledrive-strengthoutput-highstdout-pathlabellinux,codedebounce-intervalpriorityvin-supplyenable-active-highgpiopwmspwm-supplypwm-dutycycle-rangepwm-dutycycle-unitrockchip,modelrockchip,i2s-controllerrockchip,audio-codecrockchip,hp-det-gpiosrockchip,mic-det-gpiosrockchip,headset-codecrockchip,hdmi-codecstartup-delay-usbrightness-levelsnum-interpolated-stepsdefault-brightness-levelenable-gpiospost-pwm-on-delay-mspwm-off-delay-mspower-supplybacklighthactivehfront-porchhback-porchhsync-lenvactivevfront-porchvback-porchvsync-lencharger-typelinux,input-type