8T( google,veyron-tiger-rev8google,veyron-tiger-rev7google,veyron-tiger-rev6google,veyron-tiger-rev5google,veyron-tiger-rev4google,veyron-tiger-rev3google,veyron-tiger-rev2google,veyron-tiger-rev1google,veyron-tiger-rev0google,veyron-tigergoogle,veyronrockchip,rk3288& 7Google Tigeraliases=/ethernet@ff290000G/pinctrl/gpio@ff750000M/pinctrl/gpio@ff780000S/pinctrl/gpio@ff790000Y/pinctrl/gpio@ff7a0000_/pinctrl/gpio@ff7b0000e/pinctrl/gpio@ff7c0000k/pinctrl/gpio@ff7d0000q/pinctrl/gpio@ff7e0000w/pinctrl/gpio@ff7f0000}/i2c@ff650000/i2c@ff140000/i2c@ff660000/i2c@ff150000/i2c@ff160000/i2c@ff170000/mmc@ff0f0000/mmc@ff0c0000/mmc@ff0d0000/mmc@ff0e0000/serial@ff180000/serial@ff190000/serial@ff690000/serial@ff1b0000/serial@ff1c0000/spi@ff110000/spi@ff120000/spi@ff130000/mmc@ff0f0000arm-pmuarm,cortex-a12-pmu0cpus rockchip,rk3066-smpcpu@500(cpuarm,cortex-a1248?Sbir cpu@501(cpuarm,cortex-a1248?Sbircpu@502(cpuarm,cortex-a1248?Sbircpu@503(cpuarm,cortex-a1248?Sbiropp-table-0operating-points-v2opp-126000000 @opp-216000000  opp-408000000Q opp-600000000#F opp-696000000)|~opp-8160000000,B@opp-1008000000<opp-1200000000Gopp-1416000000TfrOopp-1512000000ZJopp-1608000000_" opp-1704000000epopp-1800000000kI\reserved-memorydma-unusable@fe0000004oscillator fixed-clockn6xin24m timerarm,armv7-timer0   n6#timer@ff810000rockchip,rk3288-timer4  H ba  :pclktimerdisplay-subsystemrockchip,display-subsystemF mmc@ff0c0000rockchip,rk3288-dw-mshcLр bDrv:biuciuciu-driveciu-sampleZ 4 @8ereset qdisabledmmc@ff0d0000rockchip,rk3288-dw-mshcLр bEsw:biuciuciu-driveciu-sampleZ !4 @8eresetqokayx default (btmrvl@2marvell,sd8897-bt4&5 defaultmmc@ff0e0000rockchip,rk3288-dw-mshcLр bFtx:biuciuciu-driveciu-sampleZ "4@8ereset qdisabledmmc@ff0f0000rockchip,rk3288-dw-mshcLр bGuy:biuciuciu-driveciu-sampleZ #4@8eresetqokayxHZxdefault saradc@ff100000rockchip,saradc4 $bI[:saradcapb_pclk8W esaradc-apb qdisabledspi@ff110000(rockchip,rk3288-spirockchip,rk3066-spibAR:spiclkapb_pclk  txrx ,default4 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;^hbQY:baudclkapb_pclk  txrxdefault6 qdisableddma-controller@ff250000arm,pl330arm,primecell4%@ub :apb_pclkthermal-zonesreserve-thermal7cpu-thermald7tripscpu_alert0p/passive8cpu_alert1$/passive9cpu_crit /criticalcooling-mapsmap080map190gpu-thermald7tripsgpu_alert04/passive:gpu_crit /criticalcooling-mapsmap0: ;tsadc@ff280000rockchip,rk3288-tsadc4( %bHZ:tsadcapb_pclk8 etsadc-apbinitdefaultsleep<=<%;>HHqokay_v7ethernet@ff290000rockchip,rk3288-gmac4)macirqeth_wake_irq;>8bfgc]M:stmmacethmac_clk_rxmac_clk_txclk_mac_refclk_mac_refoutaclk_macpclk_mac8B estmmacethqokay?input@rgmiiAdefaultBCDE0  ,'u0Emdio0snps,dwmac-mdioethernet-phy@14@usb@ff500000 generic-ehci4P bAFFusbqokayPusb@ff520000 generic-ohci4R )bAFFusb qdisabledusb@ff5400002rockchip,rk3288-usbrockchip,rk3066-usbsnps,dwc24T b:otgfhostAG Fusb2-phynqokayusb@ff5800002rockchip,rk3288-usbrockchip,rk3066-usbsnps,dwc24X b:otgfhost@@ AH Fusb2-phyqokayzHusb@ff5c0000 generic-ehci4\ b qdisableddma-controller@ff600000arm,pl330arm,primecell4`@ub :apb_pclk qdisabledi2c@ff650000rockchip,rk3288-i2c4e <:i2cbLdefaultIqokay2dpmic@1brockchip,rk8084xin32kwifibt_32kin&-default JKLE)5AN+[hM MrNregulatorsDCDC_REG1vdd_arm q q regulator-state-memDCDC_REG2vdd_gpu 5qregulator-state-memDCDC_REG3 vcc135_ddrregulator-state-memDCDC_REG4vcc_18w@w@regulator-state-mem*w@LDO_REG3vdd_10B@B@regulator-state-mem*B@LDO_REG7 vdd10_lcdB@B@regulator-state-memSWITCH_REG1 vcc33_lcddregulator-state-memLDO_REG6 vcc18_codecw@w@eregulator-state-memLDO_REG2w@w@ vdd18_lcdtregulator-state-memLDO_REG82Z2Z vcc33_ccdregulator-state-memSWITCH_REG2 vcc33_lanAi2c@ff660000rockchip,rk3288-i2c4f =:i2cbNdefaultOqokay2 max98090@10maxim,max980904&P:mclkbqdefaultQpwm@ff680000rockchip,rk3288-pwm4hFdefaultRb_qokaypwm@ff680010rockchip,rk3288-pwm4hFdefaultSb_qokaypwm@ff680020rockchip,rk3288-pwm4h FdefaultTb_ qdisabledpwm@ff680030rockchip,rk3288-pwm4h0FdefaultUb_ qdisabledsram@ff700000 mmio-sram4ppsmp-sram@0rockchip,rk3066-smp-sram4sram@ff720000#rockchip,rk3288-pmu-srammmio-sram4rpower-management@ff730000&rockchip,rk3288-pmusysconsimple-mfd4spower-controller!rockchip,rk3288-power-controllerQh ipower-domain@94 bchgfdehilkj$eVWXYZ[\]^Qpower-domain@114 bope_`Qpower-domain@124 beaQpower-domain@134 bebcQreboot-modesyscon-reboot-modelsRBRBRB RBsyscon@ff740000rockchip,rk3288-sgrfsyscon4tclock-controller@ff760000rockchip,rk3288-cru4vb :xin24m;>Hjk$#gׄeрxhрxhsyscon@ff770000&rockchip,rk3288-grfsysconsimple-mfd4w>edp-phyrockchip,rk3288-dp-phybh:24mqokayyio-domains"rockchip,rk3288-io-voltage-domainqokay++ + d # /eusbphyrockchip,rk3288-usb-phyqokayusb-phy@3204 b]:phyclk8 ephy-resetHusb-phy@33444b^:phyclk8 ephy-resetFusb-phy@3484Hb_:phyclk8 ephy-resetGwatchdog@ff800000 rockchip,rk3288-wdtsnps,dw-wdt4bp Oqokaysound@ff8b0000,rockchip,rk3288-spdifrockchip,rk3066-spdif4 <bT :mclkhclkftx 6defaultg;> qdisabledi2s@ff890000(rockchip,rk3288-i2srockchip,rk3066-i2s4 < 5bR:i2s_clki2s_hclkfftxrxdefaulth M hqokaycrypto@ff8a0000rockchip,rk3288-crypto4@ 0 b}:aclkhclksclkapb_pclk8 ecrypto-rstiommu@ff900800rockchip,iommu4@ b :aclkiface  qdisablediommu@ff914000rockchip,iommu 4@P b :aclkiface   qdisabledrga@ff920000rockchip,rk3288-rga4 bj:aclkhclksclk i 8ilm ecoreaxiahbvop@ff930000rockchip,rk3288-vop 4 b:aclk_vopdclk_vophclk_vop i 8def eaxiahbdclk jqokayport endpoint@04 kendpoint@14 l{endpoint@24 mtendpoint@34 nwiommu@ff930300rockchip,iommu4 b :aclkiface i  qokayjvop@ff940000rockchip,rk3288-vop 4 b:aclk_vopdclk_vophclk_vop i 8 eaxiahbdclk oqokayport endpoint@04 pendpoint@14 q|endpoint@24 ruendpoint@34 sxiommu@ff940300rockchip,iommu4 b :aclkiface i  qokayodsi@ff960000*rockchip,rk3288-mipi-dsisnps,dw-mipi-dsi4@ b~d :refpclk i ;> qdisabledportsport@04endpoint@04 tmendpoint@14 urport@14lvds@ff96c000rockchip,rk3288-lvds4@bg :pclk_lvdslcdcv i ;> qdisabledportsport@04endpoint@04 wnendpoint@14 xsport@14dp@ff970000rockchip,rk3288-dp4@ bbic:dppclkAyFdp i 8oedp;>qokaydefaultzportsport@04endpoint@04 {lendpoint@14 |qport@14endpoint@04 }hdmi@ff980000rockchip,rk3288-dw-hdmi4h gbhmn:iahbisfrcec i ;> <qokaydefaultunwedge~portsport@04endpoint@04 kendpoint@14 pport@14video-codec@ff9a0000rockchip,rk3288-vpu4   vepuvdpub :aclkhclk  i iommu@ff9a0800rockchip,iommu4 b :aclkiface  i iommu@ff9c0440rockchip,iommu 4@@@ ob :aclkiface  qdisabledgpu@ffa30000#rockchip,rk3288-maliarm,mali-t7604$ jobmmugpub?S i qokay ;opp-table-1operating-points-v2opp-100000000~opp-200000000 ~opp-300000000B@opp-400000000ׄopp-600000000#Fqos@ffaa0000rockchip,rk3288-qossyscon4 bqos@ffaa0080rockchip,rk3288-qossyscon4 cqos@ffad0000rockchip,rk3288-qossyscon4 Wqos@ffad0100rockchip,rk3288-qossyscon4 Xqos@ffad0180rockchip,rk3288-qossyscon4 Yqos@ffad0400rockchip,rk3288-qossyscon4 Zqos@ffad0480rockchip,rk3288-qossyscon4 [qos@ffad0500rockchip,rk3288-qossyscon4 Vqos@ffad0800rockchip,rk3288-qossyscon4 \qos@ffad0880rockchip,rk3288-qossyscon4 ]qos@ffad0900rockchip,rk3288-qossyscon4 ^qos@ffae0000rockchip,rk3288-qossyscon4 aqos@ffaf0000rockchip,rk3288-qossyscon4 _qos@ffaf0080rockchip,rk3288-qossyscon4 `dma-controller@ffb20000arm,pl330arm,primecell4@ub :apb_pclkfefuse@ffb40000rockchip,rk3288-efuse4 bq :pclk_efusecpu-id@74cpu_leakage@174interrupt-controller@ffc01000 arm,gic-400  @4 @ `   pinctrlrockchip,rk3288-pinctrl;>defaultsleepgpio@ff750000rockchip,gpio-bank4u Qb@     PMIC_SLEEP_APDDRIO_PWROFFDDRIO_RETENTS3A227E_INT_LPMIC_INT_LPWR_KEY_LHUB_USB1_nFALUTPHY_PMEBPHY_INTRECOVERY_SW_LOTP_OUTUSB_OTG_POWER_ENAP_WARM_RESET_HUSB_OTG_nFALUTI2C0_SDA_PMICI2C0_SCL_PMICDEVMODE_LUSB_INT-gpio@ff780000rockchip,gpio-bank4x RbA    gpio@ff790000rockchip,gpio-bank4y SbB    i CONFIG0CONFIG1CONFIG2CONFIG3EMMC_RST_LBL_PWR_ENTOUCH_INTTOUCH_RSTI2C3_SCL_TPI2C3_SDA_TP(gpio@ff7a0000rockchip,gpio-bank4z TbC     FLASH0_D0FLASH0_D1FLASH0_D2FLASH0_D3FLASH0_D4FLASH0_D5FLASH0_D6FLASH0_D7VCC5V_GOOD_HFLASH0_CS2/EMMC_CMDFLASH0_DQS/EMMC_CLKOPHY_TXD2PHY_TXD3MAC_RXD2MAC_RXD3PHY_TXD0PHY_TXD1MAC_RXD0MAC_RXD1gpio@ff7b0000rockchip,gpio-bank4{ UbD     MAC_MDCMAC_RXDVMAC_RXERMAC_CLKPHY_TXENMAC_MDIOMAC_RXCLKPHY_RSTPHY_TXCLKUART0_RXDUART0_TXDUART0_CTS_LUART0_RTS_LSDIO0_D0SDIO0_D1SDIO0_D2SDIO0_D3SDIO0_CMDSDIO0_CLKBT_DEV_WAKEWIFI_ENABLE_HBT_ENABLE_LWIFI_HOST_WAKEBT_HOST_WAKEgpio@ff7c0000rockchip,gpio-bank4| VbE     USB_OTG_CTL1HUB_USB2_CTL1HUB_USB2_PWR_ENHUB_USB_ILIM_SELUSB_OTG_STATUS_LHUB_USB1_CTL1HUB_USB1_PWR_ENVCC50_HDMI_ENgpio@ff7d0000rockchip,gpio-bank4} WbF     I2S0_SCLKI2S0_LRCK_RXI2S0_LRCK_TXI2S0_SDII2S0_SDO0HP_DET_HINT_CODECI2S0_CLKI2C2_SDAI2C2_SCLMICDETHUB_USB2_nFALUTUSB_OTG_ILIM_SELPgpio@ff7e0000rockchip,gpio-bank4~ XbG     LCD_BL_PWMPWM_LOGBL_ENPWR_LED1TPM_INT_HSPK_ONAP_FLASH_WP_LCPU_NMIDVSOKEDP_HPDDVS1LCD_ENDVS2HDMI_CECI2C4_SDAI2C4_SCLI2C5_SDA_HDMII2C5_SCL_HDMI5V_DRVUART2_RXDUART2_TXDMgpio@ff7f0000rockchip,gpio-bank4 YbH    ^ RAM_ID0RAM_ID1RAM_ID2RAM_ID3I2C1_SDA_TPMI2C1_SCL_TPMSPI2_CLKSPI2_CS0SPI2_RXDSPI2_TXDhdmihdmi-cec-c0 -hdmi-cec-c7 -hdmi-ddc -~hdmi-ddc-unwedge -vcc50-hdmi-en -pcfg-output-low ;pcfg-pull-up Fpcfg-pull-down Spcfg-pull-none bpcfg-pull-none-12ma b o suspendglobal-pwroff -ddrio-pwroff -ddr0-retention -ddr1-retention -edpedp-hpd - zi2c0i2c0-xfer -Ii2c1i2c1-xfer -&i2c2i2c2-xfer -  Oi2c3i2c3-xfer -'i2c4i2c4-xfer -,i2c5i2c5-xfer -/i2s0i2s0-bus` -hlcdclcdc-ctl@ -vsdmmcsdmmc-clk -sdmmc-cmd -sdmmc-cd -sdmmc-bus1 -sdmmc-bus4@ -sdio0sdio0-bus1 -sdio0-bus4@ -sdio0-cmd -sdio0-clk -sdio0-cd -sdio0-wp -sdio0-pwr -sdio0-bkpwr -sdio0-int -wifienable-h -bt-enable-l -bt-host-wake -bt-host-wake-l -bt-dev-wake-sleep -bt-dev-wake-awake -bt-dev-wake -sdio1sdio1-bus1 -sdio1-bus4@ -sdio1-cd -sdio1-wp -sdio1-bkpwr -sdio1-int -sdio1-cmd -sdio1-clk -sdio1-pwr - emmcemmc-clk -emmc-cmd -emmc-pwr - emmc-bus1 -emmc-bus4@ -emmc-bus8 -emmc-reset - spi0spi0-clk - spi0-cs0 - spi0-tx -spi0-rx -spi0-cs1 -spi1spi1-clk - spi1-cs0 - !spi1-rx - spi1-tx -spi2spi2-cs1 -spi2-clk -"spi2-cs0 -%spi2-rx -$spi2-tx - #uart0uart0-xfer -0uart0-cts -1uart0-rts -2uart1uart1-xfer - 3uart1-cts - uart1-rts - uart2uart2-xfer -4uart3uart3-xfer -5uart3-cts - uart3-rts - uart4uart4-xfer -6uart4-cts - uart4-rts - tsadcotp-pin - <otp-out - =pwm0pwm0-pin -Rpwm1pwm1-pin -Spwm2pwm2-pin -Tpwm3pwm3-pin -Ugmacrgmii-pins - Brmii-pins -phy-rst -Cphy-pmeb -Dphy-int -Espdifspdif-tx - gpcfg-pull-none-drv-8ma b opcfg-pull-up-drv-8ma F opcfg-output-high ~buttonspwr-key-l -pmicpmic-int-l -Jdvs-1 - Kdvs-2 -Lrebootap-warm-reset-h - recovery-switchrec-mode-l - tpmtpm-int-h -write-protectfw-wp-ap -codechp-det -int-codec -Qmic-det - headsetts3a227e-int-l -.buck-5vdrv-5v -ledspwr-led1-on -pwr-led1-blink -usb-bc12usb-otg-ilim-sel -usb-usb-ilim-sel -usb-hosthub_usb1_pwr_en -hub_usb2_pwr_en -usb_otg_pwr_en - backlightbl_pwr_en - bl-en -lcdlcd-en -touchscreentouch-int -)touch-rst -*chosen serial2:115200n8memory(memory4power-button gpio-keysdefaultkey-power Power %- t dEgpio-restart gpio-restart %- default emmc-pwrseqmmc-pwrseq-emmcdefault ( sdio-pwrseqmmc-pwrseq-simpleb :ext_clockdefault  regulator-vcc-5vregulator-fixedvcc_5vLK@LK@  MdefaultNregulator-vcc33-sysregulator-fixed vcc33_sys2Z2Zregulator-vcc50-hdmiregulator-fixed vcc50_hdmi N  defaultregulator-vdd-logicpwm-regulator vdd_logic   { ~psound!rockchip,rockchip-audio-max98090default VEYRON-I2S & > SP iP   regulator-vccsysregulator-fixedvccsysregulator-vcc33-ioregulator-fixed vcc33_io+regulator-vcc5-host1regulator-fixed  default vcc5_host1regulator-vcc5-host2regulator-fixed  default vcc5_host2regulator-vcc5v-otgregulator-fixed  - default vcc5_otgexternal-gmac-clock fixed-clocksY@ ext_gmac?regulator-backlightregulator-fixed  ( defaultbacklight_regulator  :regulator-panelregulator-fixed  Mdefaultpanel_regulator backlightpwm-backlight    Mdefault B@   1panelauo,b101ean01qokay 1 >panel-timing@ H P ] i  s  {  portsportendpoint } #address-cells#size-cellscompatibleinterrupt-parentmodelethernet0gpio0gpio1gpio2gpio3gpio4gpio5gpio6gpio7gpio8i2c0i2c1i2c2i2c3i2c4i2c5mshc0mshc1mshc2mshc3serial0serial1serial2serial3serial4spi0spi1spi2mmc0interruptsinterrupt-affinityenable-methodrockchip,pmudevice_typeregresetsoperating-points-v2#cooling-cellsclocksdynamic-power-coefficientcpu0-supplyphandleopp-sharedopp-hzopp-microvoltclock-latency-nsrangesclock-frequencyclock-output-names#clock-cellsarm,cpu-registers-not-fw-configuredarm,no-tick-in-suspendclock-namesportsmax-frequencyfifo-depthreset-namesstatusbus-widthcap-sd-highspeedcap-sdio-irqkeep-power-in-suspendmmc-pwrseqnon-removablepinctrl-namespinctrl-0sd-uhs-sdr12sd-uhs-sdr25sd-uhs-sdr50sd-uhs-sdr104vmmc-supplyvqmmc-supplymarvell,wakeup-pincap-mmc-highspeedrockchip,default-sample-phasedisable-wpmmc-hs200-1_8v#io-channel-cellsdmasdma-namesrx-sample-delay-nsspi-max-frequencyi2c-scl-falling-time-nsi2c-scl-rising-time-nspowered-while-suspendedreset-gpiosvcc33-supplyvccio-supplywakeup-sourceti,micbiasreg-shiftreg-io-width#dma-cellsarm,pl330-broken-no-flushparm,pl330-periph-burstpolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresistripcooling-devicepinctrl-1pinctrl-2#thermal-sensor-cellsrockchip,grfrockchip,hw-tshut-temprockchip,hw-tshut-moderockchip,hw-tshut-polarityinterrupt-namesassigned-clocksassigned-clock-parentsclock_in_outphy-handlephy-modephy-supplyrx_delaytx_delaysnps,reset-gpiosnps,reset-active-lowsnps,reset-delays-usphysphy-namesneeds-reset-on-resumedr_modesnps,reset-phy-on-wakesnps,need-phy-for-wakeg-np-tx-fifo-sizeg-rx-fifo-sizeg-tx-fifo-sizerockchip,system-power-controllervcc1-supplyvcc2-supplyvcc3-supplyvcc4-supplyvcc6-supplyvcc7-supplyvcc8-supplyvcc12-supplyvddio-supplyvcc10-supplydvs-gpiosvcc11-supplyregulator-nameregulator-always-onregulator-boot-onregulator-min-microvoltregulator-max-microvoltregulator-ramp-delayregulator-off-in-suspendregulator-on-in-suspendregulator-suspend-microvolt#pwm-cells#power-domain-cellspm_qosoffsetmode-normalmode-recoverymode-bootloadermode-loader#reset-cellsassigned-clock-rates#phy-cellsbb-supplydvp-supplyflash0-supplygpio1830-supplygpio30-supplylcdc-supplywifi-supplyaudio-supply#sound-dai-cellsrockchip,playback-channelsrockchip,capture-channels#iommu-cellsrockchip,disable-mmu-resetpower-domainsiommusremote-endpointmali-supplyinterrupt-controller#interrupt-cellsgpio-controller#gpio-cellsgpio-line-namesrockchip,pinsoutput-lowbias-pull-upbias-pull-downbias-disabledrive-strengthoutput-highstdout-pathlabellinux,codedebounce-intervalpriorityenable-active-highvin-supplypwmspwm-supplypwm-dutycycle-rangepwm-dutycycle-unitrockchip,modelrockchip,i2s-controllerrockchip,audio-codecrockchip,hp-det-gpiosrockchip,mic-det-gpiosrockchip,headset-codecrockchip,hdmi-codecstartup-delay-usbrightness-levelsnum-interpolated-stepsdefault-brightness-levelenable-gpiospost-pwm-on-delay-mspwm-off-delay-mspower-supplybacklighthactivehfront-porchhback-porchhsync-lenvactivevfront-porchvback-porchvsync-len