f8_X(_ #itead,sonoff-ihostrockchip,rv1126&7Sonoff iHost 4Galiases=/i2c@ff3f0000B/i2c@ff400000G/i2c@ff520000L/serial@ff560000T/serial@ff410000\/serial@ff570000d/serial@ff580000l/serial@ff590000t/serial@ff5a0000|/ethernet@ffc40000/mmc@ffc50000/mmc@ffc70000/mmc@ffc60000cpuscpu@f00cpuarm,cortex-a7pscicpu@f01cpuarm,cortex-a7pscicpu@f02cpuarm,cortex-a7pscicpu@f03cpuarm,cortex-a7psciarm-pmuarm,cortex-a7-pmu0{|}~psci arm,psci-1.0smctimerarm,armv7-timer0   n6display_subsystemrockchip,display-subsystemoscillator fixed-clockn6xin24m)syscon@fe000000&rockchip,rv1126-grfsysconsimple-mfd(syscon@fe020000)rockchip,rv1126-pmugrfsysconsimple-mfdio-domains&rockchip,rv1126-pmu-io-voltage-domain!okay( 6 D R ` n |   qos@fe860000rockchip,rv1126-qossyscon qos@fe860080rockchip,rv1126-qossyscon qos@fe860200rockchip,rv1126-qossyscon qos@fe86c000rockchip,rv1126-qossyscon qos@fe8a0000rockchip,rv1126-qossyscon qos@fe8a0080rockchip,rv1126-qossyscon qos@fe8a0100rockchip,rv1126-qossyscon qos@fe8a0180rockchip,rv1126-qossyscon interrupt-controller@feff0000 arm,gic-400  @ `   power-management@ff3e0000&rockchip,rv1126-pmusysconsimple-mfd>power-controller!rockchip,rv1126-power-controllerEpower-domain@158ruv power-domain@16opower-domain@10 PZ[i2c@ff3f0000(rockchip,rv1126-i2crockchip,rk3399-i2c?  ! i2cpclkdefault!okaypmic@20rockchip,rk809 & rk808-clkout1rk808-clkout2default9GS_kw bregulatorsDCDC_REG1 vdd_npu_vepu ~/qregulator-state-memDDCDC_REG2vdd_arm p/qregulator-state-memDDCDC_REG3vcc_ddrregulator-state-mem]DCDC_REG4 vcc3v3_sys2Z2Z regulator-state-mem]u2ZDCDC_REG5 vcc_buck5!!regulator-state-mem]u!LDO_REG1vcc_0v8 5 5regulator-state-memDLDO_REG2 vcc1v8_pmuw@w@regulator-state-mem]uw@LDO_REG3 vcc0v8_pmu 5 5regulator-state-mem]u 5LDO_REG4vcc_1v8w@w@ regulator-state-mem]uw@LDO_REG5 vcc_dovddw@w@regulator-state-memDLDO_REG6 vcc_dvddOOregulator-state-memDLDO_REG7 vcc_avdd**regulator-state-memDLDO_REG8 vccio_sdw@2Z regulator-state-memDLDO_REG9 vcc3v3_sd2Z2Z regulator-state-memDSWITCH_REG1vcc_5v0SWITCH_REG2vcc_3v3 i2c@ff400000(rockchip,rv1126-i2crockchip,rk3399-i2c@  " i2cpclkdefault!okayrtc@51 nxp,pcf8563Q&xin32kserial@ff410000&rockchip,rv1126-uartsnps,dw-apb-uartA n6  baudclkapb_pclktxrxdefault !disabledpwm@ff430000(rockchip,rv1126-pwmrockchip,rk3328-pwmC pwmpclk#default  !disabledpwm@ff430010(rockchip,rv1126-pwmrockchip,rk3328-pwmC pwmpclk#default! !disabledpwm@ff430020(rockchip,rv1126-pwmrockchip,rk3328-pwmC  pwmpclk#default" !disabledpwm@ff430030(rockchip,rv1126-pwmrockchip,rk3328-pwmC0 pwmpclk#default# !disabledpwm@ff440000(rockchip,rv1126-pwmrockchip,rk3328-pwmD pwmpclk$default$ !disabledpwm@ff440010(rockchip,rv1126-pwmrockchip,rk3328-pwmD pwmpclk$default% !disabledpwm@ff440020(rockchip,rv1126-pwmrockchip,rk3328-pwmD  pwmpclk$default& !disabledpwm@ff440030(rockchip,rv1126-pwmrockchip,rk3328-pwmD0 pwmpclk$default' !disabledclock-controller@ff480000rockchip,rv1126-pmucruH(clock-controller@ff490000rockchip,rv1126-cruI)xin24m(dma-controller@ff4e0000arm,pl330arm,primecellN@ apb_pclki2c@ff520000(rockchip,rv1126-i2crockchip,rk3399-i2cR " i2cpclkdefault* !disabledpwm@ff550000(rockchip,rv1126-pwmrockchip,rk3328-pwmU pwmpclk'+default !disabledpwm@ff550010(rockchip,rv1126-pwmrockchip,rk3328-pwmU pwmpclk',default !disabledpwm@ff550020(rockchip,rv1126-pwmrockchip,rk3328-pwmU  pwmpclk'-default !disabledpwm@ff550030(rockchip,rv1126-pwmrockchip,rk3328-pwmU0 pwmpclk'.default !disabledserial@ff560000&rockchip,rv1126-uartsnps,dw-apb-uartV n6baudclkapb_pclktxrxdefault /01!okaybluetoothrealtek,rtl8723ds-bt 2 2  20default 345serial@ff570000&rockchip,rv1126-uartsnps,dw-apb-uartW n6baudclkapb_pclk txrxdefault6!okayserial@ff580000&rockchip,rv1126-uartsnps,dw-apb-uartX n6baudclkapb_pclk  txrxdefault7!okayserial@ff590000&rockchip,rv1126-uartsnps,dw-apb-uartY n6baudclkapb_pclk  txrxdefault8!okayserial@ff5a0000&rockchip,rv1126-uartsnps,dw-apb-uartZ n6 baudclkapb_pclktxrxdefault9 !disabledadc@ff5e0000.rockchip,rv1126-saradcrockchip,rk3399-saradc^ (:, saradcapb_pclkL; Ssaradc-apb!okay_ timer@ff660000,rockchip,rv1126-timerrockchip,rk3288-timerf   - pclktimerwatchdog@ff680000 rockchip,rv1126-wdtsnps,dw-wdth  !disabledi2s@ff800000rockchip,rv1126-i2s-tdm .=Amclk_txmclk_rxhclktxrxdefault(:;<=>?@ABCLcd Stx-mrx-m(k !disabledvop@ffb00000rockchip,rv1126-vop  ;aclk_vopdclk_vophclk_vop SaxiahbdclkL|DE  !disabledportendpoint@0endpoint@1iommu@ffb00f00rockchip,iommu ; aclkifaceE  !disabledDethernet@ffc40000&rockchip,rv1126-gmacsnps,dwmac-4.20a@_`macirqeth_wake_irq(@~Tstmmacethmac_clk_rxmac_clk_txclk_mac_refaclk_macpclk_macclk_mac_speedptp_refL SstmmacethFGH!okay}~|}%:outputGIRrmii[ defaultJKLMmdiosnps,dwmac-mdioethernet-phy@0ethernet-phy-ieee802.3-c22defaultNfwP' OIstmmac-axi-configFrx-queues-configGqueue0tx-queues-configHqueue0mmc@ffc500000rockchip,rv1126-dw-mshcrockchip,rk3288-dw-mshc@ N rstbiuciuciu-driveciu-sample E!okay0?defaultPQRSMZk w mmc@ffc600000rockchip,rv1126-dw-mshcrockchip,rk3288-dw-mshc@ L lmnbiuciuciu-driveciu-sample !okaydefaultTUVWMZw mmc@ffc700000rockchip,rv1126-dw-mshcrockchip,rk3288-dw-mshc@ M opqbiuciuciu-driveciu-sample}x@E!okayX?default YZ[MZk w spi@ffc90000 rockchip,sfc@ Pv%Ĵclk_sfchclk_sfcvE !disabledpinctrlrockchip,rv1126-pinctrl( gpio@ff460000rockchip,gpio-bankF "&!gpio@ff620000rockchip,gpio-bankb #(!2gpio@ff630000rockchip,gpio-bankc $)!Ogpio@ff640000rockchip,gpio-bankd %*!gpio@ff650000rockchip,gpio-banke & +!pcfg-pull-up-_pcfg-pull-down:^pcfg-pull-noneI\pcfg-pull-none-drv-level-3IVapcfg-pull-up-drv-level-2-V]pcfg-pull-none-drv-level-0-smtIVe`clk_out_ethernetemmcemmc-rstnoutz\Semmc-bus8z]]]]]]]]Pemmc-clkz]Remmc-cmdz]Qfspii2c0i2c0-xfer z ` `i2c2i2c2-xfer z``i2c3i2c3m0-xfer z\\*i2s0i2s0m0-lrck-txz\=i2s0m0-lrck-rxz\>i2s0m0-mclkz\<i2s0m0-sclk-rxz\;i2s0m0-sclk-txz\:i2s0m0-sdi0z\?i2s0m0-sdo0z\@i2s0m0-sdo1-sdi3z\Ai2s0m0-sdo2-sdi2z\Bi2s0m0-sdo3-sdi1z\Ci2s0m1-lrck-txz\i2s0m1-lrck-rxz \i2s0m1-mclkz\i2s0m1-sclk-rxz \i2s0m1-sclk-txz\i2s0m1-sdi0z\i2s0m1-sdo0z\i2s0m1-sdo1-sdi3z \i2s0m1-sdo2-sdi2z \i2s0m1-sdo3-sdi1z \pwm0pwm0m0-pinsz\ pwm1pwm1m0-pinsz\!pwm2pwm2m0-pinsz\"pwm3pwm3m0-pinsz\#pwm4pwm4m0-pinsz\$pwm5pwm5m0-pinsz\%pwm6pwm6m0-pinsz \&pwm7pwm7m0-pinsz \'pwm8pwm8m0-pinsz\+pwm9pwm9m0-pinsz\,pwm10pwm10m0-pinsz\-pwm11pwm11m0-pinsz\.rgmiirgmiim1-miim z\\Jrgmiim1-rxerz\Krgmiim1-bus2`z \\ \aaaLrgmiim1-mclkinoutz\Msdmmc0sdmmc0-bus4@z]]]]Vsdmmc0-clkz]Tsdmmc0-cmdz ]Usdmmc0-detz\Wsdmmc1sdmmc1-bus4@z ] ]]][sdmmc1-clkz ]Ysdmmc1-cmdz ]Zuart0uart0-xfer z__/uart0-ctsnz\0uart0-rtsnz\1uart1uart1m0-xfer z__uart2uart2m1-xfer z__6uart3uart3m2-xfer z__7uart4uart4m2-xfer z__8uart5uart5m0-xfer z__9etherneteth-phy-rstz^Nbtbt-enablez\3bt-wake-devz\4bt-wake-hostz\5pmicpmic-int-lz _wifiwifi-enable-hz\cchosenserial2:1500000n8regulator-vcc5v0-sysregulator-fixed vcc5v0_sysLK@LK@pwrseq-sdiommc-pwrseq-simpleb ext_clockdefaultc 2X #address-cells#size-cellscompatibleinterrupt-parentmodeli2c0i2c2i2c3serial0serial1serial2serial3serial4serial5ethernet0mmc0mmc1mmc2device_typeregenable-methodclockscpu-supplyphandleinterruptsinterrupt-affinityclock-frequencyportsclock-output-names#clock-cellsstatuspmuio0-supplypmuio1-supplyvccio1-supplyvccio2-supplyvccio3-supplyvccio4-supplyvccio5-supplyvccio6-supplyvccio7-supplyinterrupt-controller#interrupt-cells#power-domain-cellspm_qosrockchip,grfclock-namespinctrl-namespinctrl-0rockchip,system-power-controllerwakeup-sourcevcc1-supplyvcc2-supplyvcc3-supplyvcc4-supplyvcc5-supplyvcc6-supplyvcc7-supplyvcc8-supplyvcc9-supplyregulator-nameregulator-always-onregulator-boot-onregulator-initial-moderegulator-min-microvoltregulator-max-microvoltregulator-ramp-delayregulator-off-in-suspendregulator-on-in-suspendregulator-suspend-microvoltdmasdma-namesreg-shiftreg-io-width#pwm-cells#reset-cells#dma-cellsarm,pl330-periph-burstuart-has-rtsctsdevice-wake-gpiosenable-gpioshost-wake-gpiosmax-speed#io-channel-cellsresetsreset-namesvref-supply#sound-dai-cellsiommuspower-domains#iommu-cellsinterrupt-namessnps,mixed-burstsnps,tsosnps,axi-configsnps,mtl-rx-configsnps,mtl-tx-configassigned-clocksassigned-clock-parentsassigned-clock-ratesclock_in_outphy-handlephy-modephy-supplyreset-active-lowreset-assert-usreset-deassert-usreset-gpiossnps,wr_osr_lmtsnps,rd_osr_lmtsnps,blensnps,rx-queues-to-usesnps,tx-queues-to-usefifo-depthmax-frequencybus-widthcap-mmc-highspeedmmc-hs200-1_8vnon-removablerockchip,default-sample-phasevmmc-supplyvqmmc-supplycap-sd-highspeedcard-detect-delaysd-uhs-sdr12sd-uhs-sdr25sd-uhs-sdr104cap-sdio-irqkeep-power-in-suspendmmc-pwrseqrockchip,pmurangesgpio-controller#gpio-cellsbias-pull-upbias-pull-downbias-disabledrive-strengthinput-schmitt-enablerockchip,pinsstdout-path