8( L'DH electronics STM32MP135F DHCOR DHSBCB!dh,stm32mp135f-dhcor-dhsbcdh,stm32mp135f-dhcor-somst,stm32mp135cpuscpu@0!arm,cortex-a7,cpu8<arm-pmu!arm,cortex-a7-pmu DObfirmwareopteessmc!linaro,optee-tzb Dscmi!linaro,scmi-opteezprotocol@148<!protocol@168<aprotocol@178 disabledregulatorsregulator@08reg11regulator@18reg18regulator@28usb33interrupt-controller@a0021000!arm,cortex-a7-gic8 <psci !arm,psci-1.0ssmctimer!arm,armv7-timer0D   bthermal-zonescpu-thermaltripscpu-alert1&L23passivecpu-crit&2 3criticalcooling-mapssoc !simple-busb=timer@40000000!st,stm32-timers8@ DDglobalTi[intPglch1ch2ch3ch4up disabledpwm !st,stm32-pwmv disabledtimer@1!st,stm32h7-timer-trigger8 disabledcounter!st,stm32-timer-counter disabledtimer@40001000!st,stm32-timers8@ DDglobalTj[int`glch1ch2ch3ch4uptrig disabledpwm !st,stm32-pwmv disabledtimer@2!st,stm32h7-timer-trigger8 disabledcounter!st,stm32-timer-counter disabledtimer@40002000!st,stm32-timers8@  DDglobalTk[int@g lch1ch2ch3up disabledpwm !st,stm32-pwmv disabledtimer@3!st,stm32h7-timer-trigger8 disabledcounter!st,stm32-timer-counter disabledtimer@40003000!st,stm32-timers8@0 D3DglobalTl[intokaypwm !st,stm32-pwmvokaydefaultsleeptimer@4!st,stm32h7-timer-trigger8okaycounter!st,stm32-timer-counter disabledtimer@40004000!st,stm32-timers8@@ D7DglobalTm[intgElup disabledcounter!st,stm32-timer-counter disabledtimer@5!st,stm32h7-timer-trigger8 disabledtimer@40005000!st,stm32-timers8@P D8DglobalTn[intgFlup disabledcounter!st,stm32-timer-counter disabledtimer@6!st,stm32h7-timer-trigger8 disabledtimer@40009000!st,stm32-lptimer8@ /Tw[mux disabledpwm!st,stm32-pwm-lpv disabledtrigger@0!st,stm32-lptimer-trigger8 disabledcounter!st,stm32-lptimer-counter disabledtimer!st,stm32-lptimer-timer disabledaudio-controller@4000b000!st,stm32h7-i2s8@ D% g'(lrxtx disabledspi@4000b000!st,stm32h7-spi8@ D%T`5  g'(lrxtxokaydefaultsleep    tpm@0 !st,st33htpm-spitcg,tpm_tis-spi8b D   n6audio-controller@4000c000!st,stm32h7-i2s8@ D4 g=>lrxtx disabledspi@4000c000!st,stm32h7-spi8@ D4Ta5  g=>lrxtx disableddefaultsleep  audio-controller@4000d000!st,stm32h7-spdifrx8@T^[kclk D_ g]^ lrxrx-ctrl disabledserial@4000f000!st,stm32h7-uart8@ T~5 g-.lrxtx disabledserial@40010000!st,stm32h7-uart8@ T5okaydefaultsleepidleserial@40011000!st,stm32h7-uart8@ T5 gABlrxtx disabledi2c@40012000!st,stm32mp13-i2c8@  DeventerrorD !Td5 okaydefaultsleep.`E]i2c@40013000!st,stm32mp13-i2c8@0 DeventerrorD"#Te5 g#$lrxtx  disabledserial@40018000!st,stm32h7-uart8@  T5 gOPlrxtxokaydefaultsleepidlembluetooth%!infineon,cyw43439-btbrcm,bcm4329-bt}-   serial@40019000!st,stm32h7-uart8@ !T5 gQRlrxtx disabledtimer@44000000!st,stm32-timers8D0DDbrkuptrg-comccTr[intpg   lch1ch2ch3ch4uptrigcom disabledpwm !st,stm32-pwmv disabledtimer@0!st,stm32h7-timer-trigger8 disabledcounter!st,stm32-timer-counter disabledtimer@44001000!st,stm32-timers8D0D,-./Dbrkuptrg-comccTs[intpg/012345lch1ch2ch3ch4uptrigcom disabledpwm !st,stm32-pwmv disabledtimer@7!st,stm32h7-timer-trigger8 disabledcounter!st,stm32-timer-counter disabledserial@44003000!st,stm32h7-uart8D0 T5M gGHlrxtx disabledaudio-controller@44004000!st,stm32h7-i2s8D@ D$ g%&lrxtx disabledspi@44004000!st,stm32h7-spi8D@ D$T_5H g%&lrxtx disabledsai@4400a000!st,stm32h7-sai8DD =D DW5P disabledT[pclkx8kx11kdefaultsleepaudio-controller@4400a004!st,stm32-sai-sub-a8 T[sai_ckgW disabledaudio-controller@4400a024!st,stm32-sai-sub-b8$ T[sai_ckgX disabledsai@4400b000!st,stm32h7-sai8DD =D DZ5Q disabledaudio-controller@4400b004!st,stm32-sai-sub-a8 T[sai_ckgY disabledaudio-controller@4400b024!st,stm32-sai-sub-b8$ T[sai_ckgZ disableddfsdm@4400d000!st,stm32mp1-dfsdm8DT[dfsdm disabledfilter@0!st,stm32-dfsdm-adc8 Dgelrx disabledfilter@1!st,stm32-dfsdm-adc8 Dgflrx disableddma-controller@48000000 !st,stm32-dma8H`D   0T56<dma-controller@48001000 !st,stm32-dma8H`D9:;<=EFGT66< dma-router@48002000!st,stm32h7-dmamux8H @T76 <rcc@50000000!st,stm32mp13-rccsyscon8P[hsehsicsilselsi(T!!!!!<pwr@50001000!st,stm32mp1,pwr-reg8Pokay"#reg11reg110<Preg18reg18w@0w@<Qusb33usb332Z02Z<*interrupt-controller@5000d000!st,stm32mp1-extisyscon8P  ABCD)+MNjm "I]r&'(H56ST`\tuvw?b<syscon@50020000!st,stm32mp157-syscfgsyscon8PT(<timer@50023000!st,stm32-lptimer8P0 4Tz[mux disabledpwm!st,stm32-pwm-lpv disabledtimer!st,stm32-lptimer-timer disabledtimer@50024000!st,stm32-lptimer8P@ 5T{[mux disabledpwm!st,stm32-pwm-lpv disabledtimer!st,stm32-lptimer-timer disabledthermal@50028000!st,stm32-thermal8P DT*[pclkH disabled<dma-controller@58000000!st,stm32h7-mdma8X DkTE 0<8crc@58009000!st,stm32f7-crc8XTF disabledusb@5800c000 !generic-ohci8X T$G7 DKokay^%<&usb@5800d000 !generic-ehci8X T$G7 DLc&okay^%watchdog@5a002000!st,stm32mp1-iwdg8Z T-! [pclklsiokaym rtc@5c004000!st,stm32mp1-rtc8\@ T!! [pclkrtc_ck disabledefuse@5c005000!st,stm32mp13-bsec8\Ppart_number_otp@48y vrefin-cal@528R<)calib@5c8\calib@5e8^mac1@e48<Kmac2@ea8<Xbus@5c007000!st,stm32-etzpcsimple-bus8\p~=<'adc@48004000!st,stm32mp13-adc-core8H@ DTX[busadc'! disabled<(adc@0!st,stm32mp13-adc8b(Dg lrx)vrefint disabledchannel@138 vrefintchannel@148vddcorechannel@168vddcpuchannel@178 vddq_ddrusb@49000000!st,stm32mp15-hsotgsnps,dwc28IT[otg6dwc2 D`    peripheral*'"okay^+ 'usb2-physerial@4c000000!st,stm32h7-uart8L T|6@ g)*lrxtx'okaydefaultsleepidle,-.serial@4c001000!st,stm32h7-uart8L T}6A g+,lrxtx'okaydefaultsleepidle/01maudio-controller@4c002000!st,stm32h7-i2s8L  DU gSTlrxtx'  disabledspi@4c002000!st,stm32h7-spi8L  DUTb6B gSTlrxtx' disabledspi@4c003000!st,stm32h7-spi8L0 DVTc6C gUVlrxtx' disabledi2c@4c004000!st,stm32mp13-i2c8L@ DeventerrorDIJTf6D 'okay.`E]stpmic@33 !st,stpmic183 okayregulators!st,stpmic1-regulators12=2I2U2a2m2y33buck1vddcpup0pbuck2vdd_ddrp0pbuck3vddw@02Z<"buck4vddcore0ldo1vdd_adcw@0w@D<Uldo2 vdd_ldo22Z02ZDldo3 vdd_ldo3w@0w@Dldo4vdd_usb2Z02ZD<#ldo5vdd_sd2Z02ZDldo6vdd_sd2w@02ZDvref_ddr vref_ddrboostbst_out<3pwr_sw1 vbus_otgD pwr_sw2vbus_swD <Ronkey!st,stpmic1-onkeyDDonkey-fallingonkey-risingokaywatchdog!st,stpmic1-wdt disabledeeprom@50 !atmel,24c2568P@rtc@51!microcrystal,rv30328Q eeprom@58 !st,24256e-wl@8Xi2c@4c005000!st,stm32mp13-i2c8LP DeventerrorD]^Tg6E gKLlrxtx ' disabledi2c@4c006000!st,stm32mp13-i2c8L` DeventerrorDrsTh6F 'okaydefaultsleep45.`E]timer@4c007000!st,stm32-timers8Lp DhDglobalTo[int' disabledcounter!st,stm32-timer-counter disabledpwm !st,stm32-pwmv disabledtimer@11!st,stm32h7-timer-trigger8  disabledtimer@4c008000!st,stm32-timers8L DoDglobalTp[int'okaycounter!st,stm32-timer-counter disabledpwm !st,stm32-pwmvokay67defaultsleeptimer@12!st,stm32h7-timer-trigger8 okaytimer@4c009000!st,stm32-timers8L DpDglobalTq[int' disabledcounter!st,stm32-timer-counter disabledpwm !st,stm32-pwmv disabledtimer@13!st,stm32h7-timer-trigger8  disabledtimer@4c00a000!st,stm32-timers8L DeDglobalTt[int@gijkllch1uptrigcom' disabledcounter!st,stm32-timer-counter disabledpwm !st,stm32-pwmv disabledtimer@14!st,stm32h7-timer-trigger8 disabledtimer@4c00b000!st,stm32-timers8L DfDglobalTu[int gmnlch1up' disabledcounter!st,stm32-timer-counter disabledpwm !st,stm32-pwmv disabledtimer@15!st,stm32h7-timer-trigger8 disabledtimer@4c00c000!st,stm32-timers8L DgDglobalTv[int goplch1up' disabledcounter!st,stm32-timer-counter disabledpwm !st,stm32-pwmv disabledtimer@16!st,stm32h7-timer-trigger8 disabledtimer@50021000!st,stm32-lptimer8P 0Tx[mux' disabledpwm!st,stm32-pwm-lpv disabledtrigger@1!st,stm32-lptimer-trigger8 disabledcounter!st,stm32-lptimer-counter disabledtimer!st,stm32-lptimer-timer disabledtimer@50022000!st,stm32-lptimer8P  2Ty[mux' disabledpwm!st,stm32-pwm-lpv disabledtrigger@2!st,stm32-lptimer-trigger8 disabledtimer!st,stm32-lptimer-timer disabledhash@54003000!st,stm32mp13-hash8T0 DQTC7Eg8 lin') disabledrng@54004000!st,stm32mp13-rng8T@T[7F'( disabledmemory-controller@58002000!st,stm32mp1-fmc2-ebi8X P=`dhlTY7'6 disablednand-controller@4,0!st,stm32mp1-fmc2-nfcH8   D1Hg8 8 8  ltxrxecc disabledspi@58003000!st,stm32f469-qspi8X0p qspiqspi_mm D[0g88ltxrxTZ7'7okaydefaultsleep 9:; <=>flash@0!jedec,spi-nor8$ommc@58005000(!st,stm32-sdmmc2arm,pl18xarm,primecell5 %18XPX` D2TU [apb_pclk7L]'2okaydefaultopendrainsleep?@A@B+o"Cwifi@18)!infineon,cyw43439-fmacbrcm,bcm4329-fmacb D Dhost-wakemmc@58007000(!st,stm32-sdmmc2arm,pl18xarm,primecell5 %18XpX DlTV [apb_pclk7L]'3okaydefaultopendrainsleep DEF GEFHI+""ethernet@5800a000$!st,stm32mp13-dwmacsnps,dwmac-4.20a8X  stmmaceth>DDmacirqeth_wake_irq.[stmmacethmac-clk-txmac-clk-rxethstpeth-ck(TQMOS  J%'0okay mac-addressK.L 9rgmii-idMNdefaultsleepBstmmac-axi-configPZj<Jmdio!snps,dwmac-mdioethernet-phy@1!ethernet-phy-id001c.c916bD 8z: O <Lledsled@08wannetdevled@18wannetdevusbphyc@5a006000!st,stm32mp1-usbphyc8Z`T\5PQ'okay<$usb-phy@08# &?Sq <%connector!usb-a-connectorRusb-phy@18# &?Sq <+connector%!gpio-usb-b-connectorusb-b-connector Type-C3microadc@48003000!st,stm32mp13-adc-core8H0 DTW[busadc' okaydefaultST UU<Vadc@0!st,stm32mp13-adc8bVDg lrx)vrefintokaychannel@188vrefintchannel@28%channel@118 %channel@128 %ethernet@5800e000$!st,stm32mp13-dwmacsnps,dwmac-4.20a8X  stmmacethaDmacirq.[stmmacethmac-clk-txmac-clk-rxethstpeth-ck(TRNPT  W%'1okay mac-addressX.Y 9rgmii-idZ[defaultsleepBstmmac-axi-configPZj<Wmdio!snps,dwmac-mdioethernet-phy@1!ethernet-phy-id001c.c916bD8z: <Yledsled@08lannetdevled@18lannetdevcrypto@54002000!st,stm32mp1-cryp8T  DPTB7D'* disabledpinctrl@50002000!st,stm32mp135-pinctrl =P b ;`<\gpio@50002000EU8T9aGPIOAnu\PDHSBC_USB_PWR_CC1DHSBC_nETH1_RSTDHCOR_HW-CODING_0DHSBC_HW-CODE_2<Ogpio@50003000EU8T:aGPIOBnu\/DHCOR_BT_HOST_WAKEDHSBC_nTPM_CS< gpio@50004000EU8 T;aGPIOCnu\ !DHSBC_USB_5V_MEASgpio@50005000EU80T<aGPIODnu\0CDHCOR_RAM-CODING_0DHCOR_RAM-CODING_1DHSBC_HW-CODE_1gpio@50006000EU8@T=aGPIOEnu\@?DHSBC_nTPM_RSTDHSBC_nTPM_PIRQDHCOR_WL_HOST_WAKE< gpio@50007000EU8PT>aGPIOFnu\PBDHSBC_USB_PWR_nFLTDHCOR_WL_REG_ONDHSBC_USB_PWR_CC2<gpio@50008000EU8`T?aGPIOGnu\`NDHSBC_nETH2_RSTDHCOR_BT_DEV_WAKEDHSBC_ETH1_INTBDHSBC_ETH2_INTB<gpio@50009000EU8pT@aGPIOHnu\pDHSBC_HW-CODE_0gpio@5000a000EU8TAaGPIOInu\{DHCOR_RTC_nINTDHCOR_HW-CODING_1DHCOR_BT_REG_ONDHCOR_PMIC_nINTDHSBC_BOOT0DHSBC_BOOT1DHSBC_BOOT2DHSBC_USB-C_DATA_VBUS<adc1-pins-0<Spinsadc1-usb-cc-pins-1<Tpins]eth1-rgmii-0<Mpins1 m n " E  !  b 5pins2$ %    7 eth1-rgmii-sleep-0<Npins1 b 5pins20mn"E!$%7eth2-rgmii-0<Zpins1 W k a F V c  e 5pins2T B v  { eth2-rgmii-sleep-0<[pins1 e 5pins20WkaFVcTBv {i2c1-0<pins<H5i2c1-sleep-0<pins<Hi2c5-1<4pins1M5i2c5-sleep-1<5pins1Mm-can1-0<]pins1j 5pins20 m_can1-sleep-0<^pinsj0m-can2-0<_pins1` 5pins2@ m_can2-sleep-0<`pins`@pwm5-0<pins|5pwm5-sleep-0<pins|pwm13-0<6pins 5pwm13-sleep-0<7pinsqspi-clk-0<9pinsZ 5qspi-clk-sleep-0<<pinsZqspi-bk1-0<:pinsX Y ; w5qspi-bk1-sleep-0<=pinsXY;wqspi-cs1-0<;pins 5qspi-cs1-sleep-0<>pinssai1a-0<pins  6K5sai1a-sleep-0<pins 6Ksai1b-0<pinssai1b-sleep-0<pinssdmmc1-b4-0<?pins( ) * + 2 5sdmmc1-b4-od-0<Apins1( ) * + 5pins22 5sdmmc1-b4-sleep-0<Bpins()*+,2sdmmc1-clk-0<@pins, 5sdmmc2-b4-0<Dpins    f 5sdmmc2-b4-od-0<Gpins1    5pins2f 5sdmmc2-b4-sleep-0<HpinsCfsdmmc2-clk-0<FpinsC 5sdmmc2-d47-0<EpinsP  & ' 5sdmmc2-d47-sleep-0<IpinsP&'spi2-0< pins1z5pins2spi2-sleep-0< pins zspi3-0< pins1}Q5pins24spi3-sleep-0<pins }4Quart4-1<pins1 5pins28 uart4-idle-1<pins1 pins28 uart4-sleep-1<pins 8uart7-0<pins1r 5pins2Jg uart7-idle-0<pins1rgpins25pins3Juart7-sleep-0<pinsrJgusart1-1<,pins1 5pins2>usart1-idle-1<.pins1 pins2>usart1-sleep-1<-pins >usart2-1</pins1[5pins2?Ousart2-idle-1<1pins1[Opins25pins3?usart2-sleep-1<0pins[?Ocan@4400e000 !bosch,m_can8DDm_canmessage_ramD Dint0int1T! [hclkcclk  okaydefaultsleep]^can@4400f000 !bosch,m_can8DD(m_canmessage_ramD Dint0int1T! [hclkcclk  okaydefaultsleep_`dcmipp@5a000000!st,stm32mp13-dcmipp8Z DO5T disabledportdisplay-controller@5a001000!st,stm32-ltdc8ZDXYT[lcda disabledaliases/soc/bus@5c007000/mmc@58007000/soc/bus@5c007000/mmc@58005000/soc/serial@40010000 /soc/serial@40018000& /soc/bus@5c007000/i2c@4c004000/rtc@51 /soc/bus@5c007000/spi@58003000$ /soc/bus@5c007000/ethernet@5800a000$ /soc/bus@5c007000/ethernet@5800e000" )/soc/bus@5c007000/serial@4c000000" 1/soc/bus@5c007000/serial@4c001000memory@c0000000,memory8 reserved-memory=optee@dd0000008 9sdio-pwrseq!mmc-pwrseq-simple  <Cvin!regulator-fixedvinLK@0LK@<2chosen @serial0:115200n8 #address-cells#size-cellsmodelcompatibledevice_typeregphandleinterruptsinterrupt-affinityinterrupt-parentmethodlinaro,optee-channel-id#clock-cells#reset-cellsstatusregulator-name#interrupt-cellsinterrupt-controlleralways-onpolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresisrangesinterrupt-namesclocksclock-namesdmasdma-names#pwm-cellspinctrl-0pinctrl-1pinctrl-namesinterrupts-extendedwakeup-source#sound-dai-cellsresetscs-gpiosreset-gpiosspi-max-frequencypinctrl-2st,syscfg-fmpi2c-analog-filteri2c-scl-rising-time-nsi2c-scl-falling-time-nsclock-frequencyuart-has-rtsctsmax-speeddevice-wakeup-gpiosshutdown-gpios#io-channel-cells#dma-cellsst,mem2memdma-requestsdma-mastersdma-channelsvdd-supplyvdd_3v3_usbfs-supplyregulator-min-microvoltregulator-max-microvolt#thermal-sensor-cellsphyscompaniontimeout-secbits#access-controller-cellsaccess-controllersnvmem-cellsnvmem-cell-nameslabelreset-namesg-rx-fifo-sizeg-np-tx-fifo-sizeg-tx-fifo-sizedr_modeotg-revusb33d-supplyphy-namesldo1-supplyldo2-supplyldo3-supplyldo4-supplyldo5-supplyldo6-supplypwr_sw1-supplypwr_sw2-supplyregulator-always-onregulator-initial-moderegulator-over-current-protectionregulator-boot-onregulator-active-dischargepagesizereg-namesspi-rx-bus-widtharm,primecell-periphidcap-sd-highspeedcap-mmc-highspeedcap-power-off-cardkeep-power-in-suspendnon-removablest,neg-edgevmmc-supplymmc-pwrseqmmc-ddr-3_3vno-sdno-sdiovqmmc-supplyst,sysconsnps,mixed-burstsnps,pblsnps,axi-configsnps,tsophy-handlephy-modest,ext-phyclksnps,blensnps,rd_osr_lmtsnps,wr_osr_lmtrealtek,clkout-disablereset-assert-usreset-deassert-uscolorfunctionlinux,default-triggervdda1v1-supplyvdda1v8-supply#phy-cellsphy-supplyst,current-boost-microampst,decrease-hs-slew-ratest,tune-hs-dc-levelst,enable-hs-rftime-reductionst,trim-hs-currentst,trim-hs-impedancest,tune-squelch-levelst,enable-hs-rx-gain-eqst,no-hs-ftime-ctrlst,no-lsfs-scvbus-supplyvbus-gpiosself-poweredvdda-supplyvref-supplyst,min-sample-time-nsst,syscfggpio-controller#gpio-cellsst,bank-namengpiosgpio-rangesgpio-line-namespinmuxbias-disabledrive-push-pulldrive-open-drainbias-pull-downbias-pull-upbosch,mram-cfgmmc0mmc1serial0serial1rtc0spi0ethernet0ethernet1serial2serial3no-mapstdout-path