$8h(-0 C,phytec,imx8mp-libra-rdk-fpscphytec,imx8mp-phycore-fpscfsl,imx8mp7PHYTEC i.MX8MP Libra RDK FPSCaliases&=/soc@0/bus@30800000/ethernet@30be0000&G/soc@0/bus@30800000/ethernet@30bf0000"Q/soc@0/bus@30000000/gpio@30200000"W/soc@0/bus@30000000/gpio@30210000"]/soc@0/bus@30000000/gpio@30220000"c/soc@0/bus@30000000/gpio@30230000"i/soc@0/bus@30000000/gpio@30240000!o/soc@0/bus@30800000/i2c@30a20000!t/soc@0/bus@30800000/i2c@30a30000!y/soc@0/bus@30800000/i2c@30a40000!~/soc@0/bus@30800000/i2c@30a50000!/soc@0/bus@30800000/i2c@30ad0000!/soc@0/bus@30800000/i2c@30ae0000!/soc@0/bus@30800000/mmc@30b40000!/soc@0/bus@30800000/mmc@30b50000!/soc@0/bus@30800000/mmc@30b600006/soc@0/bus@30800000/spba-bus@30800000/serial@308600006/soc@0/bus@30800000/spba-bus@30800000/serial@308900006/soc@0/bus@30800000/spba-bus@30800000/serial@30880000$/soc@0/bus@30800000/serial@30a60000!/soc@0/bus@30800000/spi@30bb0000(/soc@0/bus@30800000/i2c@30a20000/rtc@52./soc@0/bus@30000000/snvs@30370000/snvs-rtc-lpcpus idle-statespscicpu-pd-wait,arm,idle-state3! 2Dcpu@0Lcpu,arm,cortex-a53X\cpsciq~@@ speed_grade *Dcpu@1Lcpu,arm,cortex-a53X\cpsciq~@@ *Dcpu@2Lcpu,arm,cortex-a53X\cpsciq~@@ *Dcpu@3Lcpu,arm,cortex-a53X\cpsciq~@@ *Dl2-cache0,cache5Cs@Dopp-table,operating-points-v2ODopp-1200000000ZGa PoIopp-1600000000Z_^a~oIopp-1800000000ZkIaB@o Iclock-osc-32k ,fixed-clockosc_32kD$clock-osc-24m ,fixed-clockn6osc_24mD%clock-ext1 ,fixed-clockk@ clk_ext1D&clock-ext2 ,fixed-clockk@ clk_ext2D'clock-ext3 ,fixed-clockk@ clk_ext3D(clock-ext4 ,fixed-clockk@ clk_ext4D)funnel,arm,coresight-static-funnelin-ports port@0XendpointDport@1Xendpoint Dport@2Xendpoint Dport@3Xendpoint Dout-portsportendpoint Dreserved-memory dsp@92400000X@ disabledDpmu,arm,cortex-a53-pmu psci ,arm,psci-1.0smcthermal-zonescpu-thermal! tripstrip01L=SpassiveDtrip11s= ScriticalDcooling-mapsmap0H0Msoc-thermal! tripstrip01L=SpassiveDtrip11s= ScriticalDcooling-mapsmap0H0Mtimer,arm,armv8-timer0   z\soc@0,fsl,imx8mp-socsimple-bus >soc_unique_idDetm@28440000",arm,coresight-etm4xarm,primecellX(Ds\] wapb_pclkDout-portsportendpointDetm@28540000",arm,coresight-etm4xarm,primecellX(Ts\] wapb_pclkDout-portsportendpointD etm@28640000",arm,coresight-etm4xarm,primecellX(ds\] wapb_pclkDout-portsportendpointD etm@28740000",arm,coresight-etm4xarm,primecellX(ts\] wapb_pclkDout-portsportendpointD funnel@28c03000+,arm,coresight-dynamic-funnelarm,primecellX(0\] wapb_pclkin-ports port@0XendpointD port@1XendpointDport@2XendpointDout-portsportendpointDetf@28c04000 ,arm,coresight-tmcarm,primecellX(@\] wapb_pclkin-portsportendpointDout-portsportendpointDetr@28c06000 ,arm,coresight-tmcarm,primecellX(`\] wapb_pclkin-portsportendpointDbus@30000000,fsl,aips-bussimple-busX0@ Dgpio@30200000,fsl,imx8mp-gpiofsl,imx35-gpioX0 @A\PCIE1_nPERSTDgpio@30210000,fsl,imx8mp-gpiofsl,imx35-gpioX0!BC\#SD2_RESET_BDgpio@30220000,fsl,imx8mp-gpiofsl,imx35-gpioX0"DE\ 8.I2C6_SCLI2C6_SDAI2C5_SCLDKgpio@30230000,fsl,imx8mp-gpiofsl,imx35-gpioX0#FG\R fGPIO6RGMII2_nINTGPIO7GPIO4X_PMIC_IRQ_BGPIO5RGMII2_EVENT_OUTRGMII2_EVENT_INdefaultD>gpio@30240000,fsl,imx8mp-gpiofsl,imx35-gpioX0$HI\rI2C5_SDAGPIO1SPI1_CSSPI2_CSI2C1_SCLI2C1_SDAI2C2_SCLI2C2_SDAI2C3_SCLI2C3_SDAGPIO2LVDS1_BL_ENSPI3_CSGPIO3 defaultD=tmu@30260000,fsl,imx8mp-tmuX0&\!calibD watchdog@30280000,fsl,imx8mp-wdtfsl,imx21-wdtX0( N\okay"defaultDwatchdog@30290000,fsl,imx8mp-wdtfsl,imx21-wdtX0) O\ disabledDwatchdog@302a0000,fsl,imx8mp-wdtfsl,imx21-wdtX0*  \ disabledDtimer@302d0000,fsl,imx8mp-gptfsl,imx6dl-gptX0- 7\wipgperDtimer@302e0000,fsl,imx8mp-gptfsl,imx6dl-gptX0. 6\wipgperDtimer@302f0000,fsl,imx8mp-gptfsl,imx6dl-gptX0/ 5\wipgperDpinctrl@30330000,fsl,imx8mp-iomuxcX03Dcan1grp0$T LTD7can2grp0$T4PTD9eqosgrp$LXT\`dhlp|txD\fecgrph$X\|`dhl@tx|pDZflexspigrp$D@X\`dxDWgpio4grp`$T@HPDgpio5grpH$<|0D hdmigrp`$H@DLDi2c1gpiogrp0$d`D<i2c1grp0$d@`@D;i2c2gpiogrp0$ lhDCi2c2grp0$ l@h@DBi2c3gpiogrp0$tpDFi2c3grp0$t@p@DEi2c5gpiogrp0$84DJi2c5grp0$8@4@DIi2c6gpiogrp0$0,DMi2c6grp0$0@,@DLpcie0grp0$x4@Dpmicirqgrp$@D?pwm1grp$xD,pwm2grp$8D-pwm3grp$4D.pwm4grp$0D/regusdhc2vmmcgrp$8@Dsai5grp$D 8< D_spi1grp`$@XD`H\LD1spi2grp`$PhTpXl\D2spi3grp`$ $((D3uart2grp`$(@$@@@D5uart3grp`$ @@@@D4uart4grp0$8@<@DGusb0grpH$DH<Dusb1grpH$LP@Dusdhc1grp$0,DNusdhc2grp$@<@ $(,04$DOusdhc2-100mhzgrp$@<@ $(,04$DPusdhc2-200mhzgrp$@<@ $(,04$DQusdhc3grp$H0L$P(T,h lpt| $( DTusdhc3-100mhzgrp$H0L$P(T,h lpt| $( DUusdhc3-200mhzgrp$H0L$P(T,h lpt| $( DVwdoggrp$|D"lvds0grp$$Drtcgrp$,DAsyscon@30340000,fsl,imx8mp-iomuxc-gprsysconX04D6efuse@30350000),fsl,imx8mp-ocotpfsl,imx8mm-ocotpsysconX05\ Dunique-id@8XDspeed-grade@10XDmac-address@90XDXmac-address@96XD[calib@264XdD!clock-controller@30360000$,fsl,imx8mp-anatopfsl,imx8mm-anatopX06Dsnvs@30370000#,fsl,sec-v4.0-monsysconsimple-mfdX07D#snvs-rtc-lp,fsl,sec-v4.0-mon-rtc-lp-#44\ wsnvs-rtcDsnvs-powerkey,fsl,sec-v4.0-pwrkey-# \ wsnvs-pwrkey;tIokayDsnvs-lpgpr+,fsl,imx8mp-snvs-lpgprfsl,imx7d-snvs-lpgprDclock-controller@30380000,fsl,imx8mp-ccmX08UV\$%&'()4wosc_32kosc_24mclk_ext1clk_ext2clk_ext3clk_ext4(WB gh(g8,A8@~;/eDreset-controller@30390000,fsl,imx8mp-srcsysconX09 YDqgpc@303a0000,fsl,imx8mp-gpcX0: WDpgc power-domain@0XDkpower-domain@1XDvpower-domain@2XDtpower-domain@3XDupower-domain@4X\ij W2ijgA88 ~;/ׄDpower-domain@5X\6WlHg88~ׄ/D`power-domain@6X\*Dpower-domain@7X\fWefg88~/ׄD*power-domain@8X\D+power-domain@9X \4*Dpower-domain@10X \ Djpower-domain@11+X \Dpower-domain@12+X \ Dpower-domain@13+X \ Dpower-domain@14X\cWdcg@3~ek@Dwpower-domain@15XDxpower-domain@16XDlpower-domain@17X\7 W7g@~eDspower-domain@18X\Dmbus@30400000,fsl,aips-bussimple-busX0@@ Dpwm@30660000,fsl,imx8mp-pwmfsl,imx27-pwmX0f Q\wipgper disabled,defaultDpwm@30670000,fsl,imx8mp-pwmfsl,imx27-pwmX0g R\wipgper disabled-defaultDpwm@30680000,fsl,imx8mp-pwmfsl,imx27-pwmX0h S\wipgper disabled.defaultDpwm@30690000,fsl,imx8mp-pwmfsl,imx27-pwmX0i T\wipgper disabled/defaultDtimer@306a0000,nxp,sysctr-timerX0j /\%wperDtimer@306e0000,fsl,imx8mp-gptfsl,imx6dl-gptX0n 3\wipgperDtimer@306f0000,fsl,imx8mp-gptfsl,imx6dl-gptX0o 3\wipgperDtimer@30700000,fsl,imx8mp-gptfsl,imx6dl-gptX0p 4\wipgperDbus@30800000,fsl,aips-bussimple-busX0@ Dspba-bus@30800000,fsl,spba-bussimple-busX0 spi@30820000 ",fsl,imx8mp-ecspifsl,imx6ul-ecspiX0 \wipgper~ĴWg8 00rxtx disabled1defaultDspi@30830000 ",fsl,imx8mp-ecspifsl,imx6ul-ecspiX0  \wipgper~ĴWg8 00rxtx disabled2defaultDspi@30840000 ",fsl,imx8mp-ecspifsl,imx6ul-ecspiX0 !\wipgper~ĴWg8 00rxtx disabled3defaultDserial@30860000,fsl,imx8mp-uartfsl,imx6q-uartX0 \wipgper 00rxtx disabledDserial@30880000,fsl,imx8mp-uartfsl,imx6q-uartX0 \wipgper 00rxtx disabled4defaultDserial@30890000,fsl,imx8mp-uartfsl,imx6q-uartX0 \wipgper 00rxtx disabled5defaultDcan@308c0000,fsl,imx8mp-flexcanX0 \nwipgperWtg0~bZ 6okay7default8Dcan@308d0000,fsl,imx8mp-flexcanX0 \nwipgperWug0~bZ 6okay9default:Dcrypto@30900000 ,fsl,sec-v4.0 X0 0 [\kn waclkipgDjr@1000,fsl,sec-v4.0-job-ringX i disabledDjr@2000,fsl,sec-v4.0-job-ringX  jDjr@3000,fsl,sec-v4.0-job-ringX0 rDi2c@30a20000,fsl,imx8mp-i2cfsl,imx21-i2c X0 #\okay;< defaultgpio = )=Dpmic@25 ,nxp,pca9450cX%>?defaultDregulatorsBUCK13GY~q PVDD_SOC (BUCK1) 5DBUCK23GYB@q PVDD_ARM (BUCK2) 5~ PDBUCK43GY2Zq2ZVDD_3V3 (BUCK4)DBUCK53GYw@qw@VDD_1V8 (BUCK5)DBUCK63GYqNVCC_DRAM_1V1 (BUCK6)DLDO13GYw@qw@NVCC_SNVS_1V8 (LDO1)DLDO33GYw@qw@VDDA_1V8 (LDO3)DLDO53GY2Zqw@NVCC_SD2 (LDO5)DSeeprom@50 ,atmel,24c32XP @eeprom@51 ,atmel,24c32XQ @rtc@52,microcrystal,rv3028XR=Adefault IDi2c@30a30000,fsl,imx8mp-i2cfsl,imx21-i2c X0 $\okayBC defaultgpio = )=Deeprom@51 ,atmel,24c02XQDi2c@30a40000,fsl,imx8mp-i2cfsl,imx21-i2c X0 %\okayEF defaultgpio = )=Dleds@62 ,nxp,pca9533Xbled-1Sled-2Sled-3Si2c@30a50000,fsl,imx8mp-i2cfsl,imx21-i2c X0 &\ disabledDserial@30a60000,fsl,imx8mp-uartfsl,imx6q-uartX0 \wipgper 00rxtxokayGdefaultDmailbox@30aa0000,fsl,imx8mp-mufsl,imx6sx-muX0 X\$Dmailbox@30e60000,fsl,imx8mp-mufsl,imx6sx-muX0 $\H$ disabledDi2c@30ad0000,fsl,imx8mp-i2cfsl,imx21-i2c X0 L\okayIJ defaultgpio K )=Dgpio@20 ,ti,tca6416X >CSI1_CTRL1CSI1_CTRL2CSI1_CTRL3CSI1_CTRL4CSI2_CTRL1CSI2_CTRL2CSI2_CTRL3CSI2_CTRL4CLK_EN_AVnCAN2_ENnCAN1_ENPCIE1_nWAKEPCIE2_nWAKEPCIE2_nALERT_3V3UART1_BT_RS_SELUART1_RS232_485_SELDDbt-rs-hog#09UART1_BT_RS_SELCDrs232-485-hog#09UART1_RS232_485_SELNDi2c@30ae0000,fsl,imx8mp-i2cfsl,imx21-i2c X0 M\ disabledLM defaultgpio K )KDmmc@30b400002,fsl,imx8mp-usdhcfsl,imx8mm-usdhcfsl,imx7d-usdhcX0 \n_ wipgahbperZo disabledNdefaultDmmc@30b500002,fsl,imx8mp-usdhcfsl,imx8mm-usdhcfsl,imx7d-usdhcX0 \n_ wipgahbperZookayOPQ"defaultstate_100mhzstate_200mhzRSW~ Dmmc@30b600002,fsl,imx8mp-usdhcfsl,imx8mm-usdhcfsl,imx7d-usdhcX0 \n_ wipgahbperZookayW~ׄTUV"defaultstate_100mhzstate_200mhzDspi@30bb0000,nxp,imx8mp-fspiX0fspi_basefspi_mmap k\ wfspi_enfspi~ĴW okayWdefaultDflash@0,jedec,spi-norXĴDDdma-controller@30bd0000 ,fsl,imx8mp-sdmafsl,imx8mq-sdmaX0 \kwipgahbimx/sdma/sdma-imx7d.binD0ethernet@30be0000-,fsl,imx8mp-fecfsl,imx8mq-fecfsl,imx6sx-fecX00vwxy(\"wipgahbptpenet_clk_refenet_out W^ g6:;9~sY@5GX mac-address 6okayYY drgmii-idZdefaultmDmdio ethernet-phy@0,ethernet-phy-ieee802.3-c22X>~DYethernet@30bf0000',nxp,imx8mp-dwmac-eqossnps,dwmac-5.10aX0macirqeth_wake_irq \wstmmacethpclkptp_reftxW^g6:; ~sY@[ mac-address6okay drgmii-id\defaultY]Dmdio,snps,dwmac-mdio ethernet-phy@1,ethernet-phy-ieee802.3-c22X~D]bus@30c00000,fsl,aips-bussimple-busX0@ Dspba-bus@30c00000,fsl,spba-bussimple-busX0 sai@30c10000,fsl,imx8mp-saifsl,imx8mq-saiX0(\HHHHwbusmclk0mclk1mclk2mclk3 ^^rxtx _ disabledDsai@30c20000,fsl,imx8mp-saifsl,imx8mq-saiX0(\HHHHwbusmclk0mclk1mclk2mclk3 ^^rxtx ` disabledDsai@30c30000,fsl,imx8mp-saifsl,imx8mq-saiX0(\HH H H wbusmclk0mclk1mclk2mclk3 ^^rxtx 2 disabledDsai@30c50000,fsl,imx8mp-saifsl,imx8mq-saiX0(\H H HHwbusmclk0mclk1mclk2mclk3 ^^ rxtx Z disabled_defaultDsai@30c60000,fsl,imx8mp-saifsl,imx8mq-saiX0(\HHHHwbusmclk0mclk1mclk2mclk3 ^ ^ rxtx Z disabledDsai@30c80000,fsl,imx8mp-saifsl,imx8mq-saiX0(\HHHHwbusmclk0mclk1mclk2mclk3 ^ ^ rxtx o disabledDeasrc@30c90000",fsl,imx8mp-easrcfsl,imx8mn-easrcX0 z\Hwmem^^^^^^^^@ctx0_rxctx0_txctx1_rxctx1_txctx2_rxctx2_txctx3_rxctx3_tx!imx/easrc/easrc-imx8mn.bin/@= disabledDaudio-controller@30ca0000,fsl,imx8mp-micfilX00mn,-(\HH6&')wipg_clkipg_clk_apppll8kpll11kclkext3^rx disabledDaud2htx@30cb0000,fsl,imx8mp-aud2htxX0 \H!wbus^tx disabledDxcvr@30cc0000,fsl,imx8mp-xcvr X000 0ramregsrxfifotxfifo$ \HH&HH#wipgphyspbapll_ipg ^^rxtxMH disabledDdma-controller@30e00000 ,fsl,imx8mp-sdmafsl,imx8mq-sdmaX0\Hwipgahb "imx/sdma/sdma-imx7d.binDdma-controller@30e10000 ,fsl,imx8mp-sdmafsl,imx8mq-sdmaX0\Hwipgahb gimx/sdma/sdma-imx7d.binD^clock-controller@30e20000,fsl,imx8mp-audio-blk-ctrlX0@\{|}A&wahbsai1sai2sai3sai5sai6sai7axi`W~pDHinterconnect@32700000,fsl,imx8mp-nocfsl,imx8m-nocX2p\gTaDnopp-table,operating-points-v2Daopp-200000000Z opp-800000000Z/opp-1000000000Z;bus@32c00000,fsl,aips-bussimple-busX2@ Disi@32e00000,fsl,imx8mp-isiX2@*\ waxiapbhbb disabledDports port@0XendpointcDeport@1XendpointdDfisp@32e10000,fsl,imx8mp-ispX2 J\ wispaclkhclkbhb disabledDports port@1Xisp@32e20000,fsl,imx8mp-ispX2 K\ wispaclkhclkbhb disabledDports port@1Xdwe@32e30000,nxp,imx8mp-dw100X2 d\ waxiahbbDcsi@32e40000*,fsl,imx8mp-mipi-csi2fsl,imx8mm-mipi-csi2X2 沀 \ wpclkwrapphyaxiWg>b disabledDports port@0Xport@1XendpointeDccsi@32e50000*,fsl,imx8mp-mipi-csi2fsl,imx8mm-mipi-csi2X2 P沀 \ wpclkwrapphyaxiWg>b disabledDports port@0Xport@1XendpointfDddsi@32e60000,fsl,imx8mp-mipi-dsimX2\ wbus_clksclk_mipiWbg8~ n6un6 b disabledDports port@0XendpointgDhport@1XendpointDdisplay-controller@32e80000,fsl,imx8mp-lcdifX2\ wpixaxidisp_axi b disabledDportendpointhDgdisplay-controller@32e90000,fsl,imx8mp-lcdifX2 \ wpixaxidisp_axib disabledDportendpointiDoblk-ctrl@32ec0000!,fsl,imx8mp-media-blk-ctrlsysconX2 (jkkjjljmmlFbusmipi-dsi1mipi-csi1lcdif1isimipi-csi2lcdif2ispdwemipi-dsi2nnnnnnnnn nn!nn"nn#n/lcdif-rdlcdif-wrisi0isi1isi2isp0isp1dwe@\ &wapbaxicam1cam2disp1disp2ispphy0Wab98(gA8((@~e e=Dbbridge@5c,fsl,imx8mp-ldbX\( ldblvds\IwldbWg( disabledDports port@0XendpointoDiport@1XendpointpDport@2XendpointDpcie-phy@32f00000,fsl,imx8mp-pcie-phyX2Mqqpciephyperstrokay\rwrefDblk-ctrl@32f10000 ,fsl,imx8mp-hsio-blk-ctrlsysconX2$\ wusbpciesstusv(bususbusb-phy1usb-phy2pciepcie-phy@nnnnnnnnnoc-pcieusb1usb2pcieDrblk-ctrl@32fc0000 ,fsl,imx8mp-hdmi-blk-ctrlsysconX2(\cwapbaxiref_266mref_24mfdcc(wwwwwwwxww=busirqsteerlcdifpaipvitrnghdmi-txhdmi-tx-phyhdcphrvDyinterrupt-controller@32fc2000%,fsl,imx8mp-irqsteerfsl,imx-irqsteerX2  +  @\cwipgyDzdisplay-bridge@32fc4000,fsl,imx8mp-hdmi-pviX2@z y disabledDports port@0Xendpoint{D~port@1Xendpoint|Ddisplay-controller@32fc6000,fsl,imx8mp-lcdifX2`z\}cwpixaxidisp_axiy disabledDportendpoint~D{hdmi@32fd8000,fsl,imx8mp-hdmi-txX2~z\c}wiahbisfrcecpixWg6y  disabledDports port@0XendpointD|port@1Xphy@32fdff00,fsl,imx8mp-hdmi-phyX2\cwapbrefWgy disabledD}pcie@33800000,fsl,imx8mp-pcieX3@ dbiconfig\ 7wpciepcie_buspcie_auxWx~g9 Lpci -0݁ 7 A msi N a~}|{ o rMqq appsturnoff  pcie-phyokaydefault  Dpcie-ep@33800000,fsl,imx8mp-pcie-ep X333dbiaddr_spacedbi2atu\ 7wpciepcie_buspcie_auxWx~g9 7 dma orMqq appsturnoff  pcie-phy   disabledDgpu@38000000 ,vivante,gcX8  \4fwcoreshaderbusregW34gAA~;;Dgpu@38008000 ,vivante,gcX8 \f wcorebusregW5gA~;Dvideo-codec@38300000,nxp,imx8mm-vpu-g1X80 \Wrg+~#FDvideo-codec@38310000,nxp,imx8mq-vpu-g2X81 \ WsgA~eDblk-ctrl@38330000,fsl,imx8mp-vpu-blk-ctrlsysconX83+busg1g2vc8000e\  wg1g2vc8000eW`g+~#F#F0n%n$n&n$n'n$g1g2vc8000eDnpu@38500000 ,vivante,gcX8P    \  ijwcoreshaderbusregDinterrupt-controller@38800000 ,arm,gic-v3X88   Dmemory-controller@3d400000,snps,ddrc-3.80aX=@@ Dddr-pmu@3d800000%,fsl,imx8mp-ddr-pmufsl,imx8m-ddr-pmuX=@ busb-phy@381f0040,fsl,imx8mp-usb-phyX8@@\wphyWgr disabledDusb@32f10100,fsl,imx8mp-dwc3X28 \ @ whsiosuspend r  @@ disableddefaultDusb@38100000 ,snps,dwc3X8\@wbus_earlyrefsuspend (  usb2-phyusb3-phy  Dusb-phy@382f0040,fsl,imx8mp-usb-phyX8/@@\wphyWgr disabledDusb@32f10108,fsl,imx8mp-dwc3X28/ \ @ whsiosuspend r  @@ disableddefaultDusb@38200000 ,snps,dwc3X8 \@wbus_earlyrefsuspend )  usb2-phyusb3-phy  Ddsp@3b6e8000,fsl,imx8mp-hifi4X;n \HH HHwipgocramcoredebug` #txrxrxdb$ .!imx/dsp/hifi4.binMH runstall disabledDmemory@40000000LmemoryX@regulator-usdhc2,regulator-fixed 5.defaultY2Zq2Z VDDSW_SD2 Ed  VDRregulator-vdd-io,regulator-fixed3GVDD_IOYw@qw@D@backlight0,pwm-backlightdefault i disabledDchosen$ v/soc@0/bus@30800000/serial@30a60000panel-lvds  i disabledDportendpointDpregulator-can1-stby,regulator-fixedYw@qw@ can1-stby D8regulator-can2-stby,regulator-fixedYw@qw@ can2-stby D:regulator-vdd-12v0,regulator-fixed3GYq VDD_12V0Dregulator-vdd-1v8,regulator-fixed3GYw@qw@VDD_1V8DDregulator-vdd-3v3,regulator-fixed3GY2Zq2ZVDD_3V3Dregulator-vdd-5v0,regulator-fixed3GYLK@qLK@VDD_5V0D__symbols__ /cpus/idle-states/cpu-pd-wait /cpus/cpu@0 /cpus/cpu@1 /cpus/cpu@2 /cpus/cpu@3 /cpus/l2-cache0 /opp-table /clock-osc-32k /clock-osc-24m /clock-ext1 /clock-ext2 /clock-ext3 /clock-ext4! /funnel/in-ports/port@0/endpoint! /funnel/in-ports/port@1/endpoint! /funnel/in-ports/port@2/endpoint! 2/funnel/in-ports/port@3/endpoint E/funnel/out-ports/port/endpoint Y/reserved-memory/dsp@92400000' f/thermal-zones/cpu-thermal/trips/trip0' q/thermal-zones/cpu-thermal/trips/trip1' {/thermal-zones/soc-thermal/trips/trip0' /thermal-zones/soc-thermal/trips/trip1 /soc@0 /soc@0/etm@28440000, /soc@0/etm@28440000/out-ports/port/endpoint /soc@0/etm@28540000, /soc@0/etm@28540000/out-ports/port/endpoint /soc@0/etm@28640000, /soc@0/etm@28640000/out-ports/port/endpoint /soc@0/etm@28740000, /soc@0/etm@28740000/out-ports/port/endpoint0 /soc@0/funnel@28c03000/in-ports/port@0/endpoint0 /soc@0/funnel@28c03000/in-ports/port@1/endpoint0 /soc@0/funnel@28c03000/in-ports/port@2/endpoint/ /soc@0/funnel@28c03000/out-ports/port/endpoint+ 5/soc@0/etf@28c04000/in-ports/port/endpoint, A/soc@0/etf@28c04000/out-ports/port/endpoint+ N/soc@0/etr@28c06000/in-ports/port/endpoint Z/soc@0/bus@30000000"W/soc@0/bus@30000000/gpio@30200000"]/soc@0/bus@30000000/gpio@30210000"c/soc@0/bus@30000000/gpio@30220000"i/soc@0/bus@30000000/gpio@30230000" `/soc@0/bus@30000000/gpio@30240000! f/soc@0/bus@30000000/tmu@30260000& j/soc@0/bus@30000000/watchdog@30280000& p/soc@0/bus@30000000/watchdog@30290000& v/soc@0/bus@30000000/watchdog@302a0000# |/soc@0/bus@30000000/timer@302d0000# /soc@0/bus@30000000/timer@302e0000# /soc@0/bus@30000000/timer@302f0000% /soc@0/bus@30000000/pinctrl@30330000- /soc@0/bus@30000000/pinctrl@30330000/can1grp- /soc@0/bus@30000000/pinctrl@30330000/can2grp- /soc@0/bus@30000000/pinctrl@30330000/eqosgrp, /soc@0/bus@30000000/pinctrl@30330000/fecgrp0 /soc@0/bus@30000000/pinctrl@30330000/flexspigrp. /soc@0/bus@30000000/pinctrl@30330000/gpio4grp. /soc@0/bus@30000000/pinctrl@30330000/gpio5grp- /soc@0/bus@30000000/pinctrl@30330000/hdmigrp1 /soc@0/bus@30000000/pinctrl@30330000/i2c1gpiogrp- /soc@0/bus@30000000/pinctrl@30330000/i2c1grp1 %/soc@0/bus@30000000/pinctrl@30330000/i2c2gpiogrp- 7/soc@0/bus@30000000/pinctrl@30330000/i2c2grp1 D/soc@0/bus@30000000/pinctrl@30330000/i2c3gpiogrp- V/soc@0/bus@30000000/pinctrl@30330000/i2c3grp1 c/soc@0/bus@30000000/pinctrl@30330000/i2c5gpiogrp- u/soc@0/bus@30000000/pinctrl@30330000/i2c5grp1 /soc@0/bus@30000000/pinctrl@30330000/i2c6gpiogrp- /soc@0/bus@30000000/pinctrl@30330000/i2c6grp. /soc@0/bus@30000000/pinctrl@30330000/pcie0grp0 /soc@0/bus@30000000/pinctrl@30330000/pmicirqgrp- /soc@0/bus@30000000/pinctrl@30330000/pwm1grp- /soc@0/bus@30000000/pinctrl@30330000/pwm2grp- /soc@0/bus@30000000/pinctrl@30330000/pwm3grp- /soc@0/bus@30000000/pinctrl@30330000/pwm4grp6 /soc@0/bus@30000000/pinctrl@30330000/regusdhc2vmmcgrp-/soc@0/bus@30000000/pinctrl@30330000/sai5grp-/soc@0/bus@30000000/pinctrl@30330000/spi1grp-$/soc@0/bus@30000000/pinctrl@30330000/spi2grp-3/soc@0/bus@30000000/pinctrl@30330000/spi3grp.B/soc@0/bus@30000000/pinctrl@30330000/uart2grp.P/soc@0/bus@30000000/pinctrl@30330000/uart3grp.^/soc@0/bus@30000000/pinctrl@30330000/uart4grp-l/soc@0/bus@30000000/pinctrl@30330000/usb0grp-y/soc@0/bus@30000000/pinctrl@30330000/usb1grp//soc@0/bus@30000000/pinctrl@30330000/usdhc1grp//soc@0/bus@30000000/pinctrl@30330000/usdhc2grp6/soc@0/bus@30000000/pinctrl@30330000/usdhc2-100mhzgrp6/soc@0/bus@30000000/pinctrl@30330000/usdhc2-200mhzgrp//soc@0/bus@30000000/pinctrl@30330000/usdhc3grp6/soc@0/bus@30000000/pinctrl@30330000/usdhc3-100mhzgrp6/soc@0/bus@30000000/pinctrl@30330000/usdhc3-200mhzgrp- /soc@0/bus@30000000/pinctrl@30330000/wdoggrp./soc@0/bus@30000000/pinctrl@30330000/lvds0grp,&/soc@0/bus@30000000/pinctrl@30330000/rtcgrp$2/soc@0/bus@30000000/syscon@30340000#6/soc@0/bus@30000000/efuse@30350000/X/soc@0/bus@32c00000/display-controller@32e80000/port/endpoint0g/soc@0/bus@32c00000/display-controller@32e90000>n/soc@0/bus@32c00000/display-controller@32e90000/port/endpoint&|/soc@0/bus@32c00000/blk-ctrl@32ec00000/soc@0/bus@32c00000/blk-ctrl@32ec0000/bridge@5cF/soc@0/bus@32c00000/blk-ctrl@32ec0000/bridge@5c/ports/port@0/endpointF/soc@0/bus@32c00000/blk-ctrl@32ec0000/bridge@5c/ports/port@1/endpointF/soc@0/bus@32c00000/blk-ctrl@32ec0000/bridge@5c/ports/port@2/endpoint&/soc@0/bus@32c00000/pcie-phy@32f00000&/soc@0/bus@32c00000/blk-ctrl@32f10000&/soc@0/bus@32c00000/blk-ctrl@32fc00002/soc@0/bus@32c00000/interrupt-controller@32fc2000,/soc@0/bus@32c00000/display-bridge@32fc4000B/soc@0/bus@32c00000/display-bridge@32fc4000/ports/port@0/endpointB/soc@0/bus@32c00000/display-bridge@32fc4000/ports/port@1/endpoint0/soc@0/bus@32c00000/display-controller@32fc6000>/soc@0/bus@32c00000/display-controller@32fc6000/port/endpoint" /soc@0/bus@32c00000/hdmi@32fd80008!/soc@0/bus@32c00000/hdmi@32fd8000/ports/port@0/endpoint!2/soc@0/bus@32c00000/phy@32fdff00 /soc@0/pcie@33800000>/soc@0/pcie@33800000C/soc@0/pcie-ep@33800000L/soc@0/pcie-ep@33800000/soc@0/gpu@38000000/soc@0/gpu@38008000//soc@0/video-codec@38300000:/soc@0/video-codec@38310000T/soc@0/blk-ctrl@38330000d/soc@0/npu@38500000%h/soc@0/interrupt-controller@38800000"l/soc@0/memory-controller@3d400000s/soc@0/usb-phy@381f0040}/soc@0/usb@32f10100!/soc@0/usb@32f10100/usb@38100000/soc@0/usb-phy@382f0040/soc@0/usb@32f10108!/soc@0/usb@32f10108/usb@38200000/soc@0/dsp@3b6e8000 /regulator-usdhc2/regulator-vdd-io /backlight0 /panel-lvds/panel-lvds/port/endpoint/regulator-can1-stby/regulator-can2-stby/regulator-vdd-12v0 /regulator-vdd-1v8/regulator-vdd-3v3!/regulator-vdd-5v0 interrupt-parent#address-cells#size-cellscompatiblemodelethernet0ethernet1gpio0gpio1gpio2gpio3gpio4i2c0i2c1i2c2i2c3i2c4i2c5mmc0mmc1mmc2serial0serial1serial2serial3spi0rtc0rtc1entry-methodarm,psci-suspend-paramlocal-timer-stopentry-latency-usexit-latency-usmin-residency-uswakeup-latency-usphandledevice_typeregclocksenable-methodi-cache-sizei-cache-line-sizei-cache-setsd-cache-sized-cache-line-sized-cache-setsnext-level-cachenvmem-cellsnvmem-cell-namesoperating-points-v2#cooling-cellscpu-idle-statescpu-supplycache-unifiedcache-levelopp-sharedopp-hzopp-microvoltopp-supported-hwclock-latency-nsopp-suspend#clock-cellsclock-frequencyclock-output-namesremote-endpointrangesno-mapstatusinterruptspolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresistripcooling-devicearm,no-tick-in-suspendcpuclock-namesgpio-controller#gpio-cellsinterrupt-controller#interrupt-cellsgpio-rangesgpio-line-namespinctrl-0pinctrl-names#thermal-sensor-cellsfsl,ext-reset-outputfsl,pinsregmapoffsetlinux,keycodewakeup-sourceassigned-clocksassigned-clock-parentsassigned-clock-rates#reset-cells#power-domain-cellspower-domains#pwm-cellsdmasdma-namesfsl,dte-modefsl,clk-sourcefsl,stop-modexceiver-supplypinctrl-1scl-gpiossda-gpiosregulator-always-onregulator-boot-onregulator-max-microvoltregulator-min-microvoltregulator-nameregulator-ramp-delaynxp,dvs-run-voltagenxp,dvs-standby-voltagepagesizevcc-supplyread-onlyaux-voltage-chargeabletrickle-resistor-ohms#mbox-cellsgpio-hogline-nameoutput-lowoutput-highfsl,tuning-start-tapfsl,tuning-stepbus-widthpinctrl-2sd-uhs-sdr104vmmc-supplyvqmmc-supplydisable-wpnon-removablereg-namesspi-max-frequencyspi-rx-bus-widthspi-tx-bus-width#dma-cellsfsl,sdma-ram-script-namefsl,num-tx-queuesfsl,num-rx-queuesphy-handlephy-modefsl,magic-packetenet-phy-lane-no-swapti,clk-output-selti,fifo-depthti,min-output-impedanceti,rx-internal-delayti,tx-internal-delayinterrupt-namesintf_mode#sound-dai-cellsfirmware-namefsl,asrc-ratefsl,asrc-formatresets#interconnect-cellsfsl,blk-ctrlsamsung,pll-clock-frequencypower-domain-namesinterconnectsinterconnect-namesreset-names#phy-cellsfsl,clkreq-unsupportedfsl,refclk-pad-modefsl,channelfsl,num-irqsreg-io-widthbus-rangenum-lanesnum-viewportinterrupt-map-maskinterrupt-mapfsl,max-link-speedlinux,pci-domainphysphy-namesreset-gpiovpcie-supplynum-ib-windowsnum-ob-windowsdma-rangessnps,gfladj-refclk-lpm-sel-quirksnps,parkmode-disable-ss-quirkmbox-namesmboxesoff-on-delay-usstartup-delay-usenable-active-highpower-supplystdout-pathbacklightcpu_pd_waitA53_0A53_1A53_2A53_3A53_L2a53_opp_tableosc_32kosc_24mclk_ext1clk_ext2clk_ext3clk_ext4ca_funnel_in_port0ca_funnel_in_port1ca_funnel_in_port2ca_funnel_in_port3ca_funnel_out_port0dsp_reservedcpu_alert0cpu_crit0soc_alert0soc_crit0socetm0etm0_out_portetm1etm1_out_portetm2etm2_out_portetm3etm3_out_porthugo_funnel_in_port0hugo_funnel_in_port1hugo_funnel_in_port2hugo_funnel_out_port0etf_in_portetf_out_portetr_in_portaips1gpio5tmuwdog1wdog2wdog3gpt1gpt2gpt3iomuxcpinctrl_flexcan1pinctrl_flexcan2pinctrl_eqospinctrl_fecpinctrl_flexspipinctrl_gpio4pinctrl_gpio5pinctrl_hdmipinctrl_i2c1_gpiopinctrl_i2c1pinctrl_i2c2_gpiopinctrl_i2c2pinctrl_i2c3_gpiopinctrl_i2c3pinctrl_i2c5_gpiopinctrl_i2c5pinctrl_i2c6_gpiopinctrl_i2c6pinctrl_pcie0pinctrl_pmicpinctrl_pwm1pinctrl_pwm2pinctrl_pwm3pinctrl_pwm4pinctrl_reg_usdhc2_vmmcpinctrl_sai5pinctrl_ecspi1pinctrl_ecspi2pinctrl_ecspi3pinctrl_uart2pinctrl_uart3pinctrl_uart4pinctrl_usb0pinctrl_usb1pinctrl_usdhc1pinctrl_usdhc2pinctrl_usdhc2_100mhzpinctrl_usdhc2_200mhzpinctrl_usdhc3pinctrl_usdhc3_100mhzpinctrl_usdhc3_200mhzpinctrl_wdogpinctrl_lvds0pinctrl_rtcgprocotpimx8mp_uidcpu_speed_gradeeth_mac1eth_mac2tmu_calibanatopsnvssnvs_rtcsnvs_pwrkeysnvs_lpgprclksrcgpcpgc_mipi_phy1pgc_pcie_phypgc_usb1_phypgc_usb2_phypgc_mlmixpgc_audiopgc_gpu2dpgc_gpumixpgc_vpumixpgc_gpu3dpgc_mediamixpgc_vpu_g1pgc_vpu_g2pgc_vpu_vc8000epgc_hdmimixpgc_hdmi_phypgc_mipi_phy2pgc_hsiomixpgc_ispdwpaips2system_countergpt6gpt5gpt4aips3uart1cryptosec_jr0sec_jr1sec_jr2buck1buck2buck4buck5buck6ldo1ldo3ldo5rv3028mu2gpio_expanderuart1_bt_rs_seluart1_rs232_485_selspi_norsdma1ethphy0ethphy1aips5sai1sai2sai3sai6sai7easrcmicfilaud2htxxcvrsdma3sdma2audio_blk_ctrlnocnoc_opp_tableaips4isi_0isi_in_0isi_in_1isp_0isp_1dewarpmipi_csi_0mipi_csi_0_outmipi_csi_1mipi_csi_1_outmipi_dsidsim_from_lcdif1mipi_dsi_outlcdif1_to_dsimlcdif2lcdif2_to_ldbmedia_blk_ctrllvds_bridgeldb_from_lcdif2ldb_lvds_ch0ldb_lvds_ch1hsio_blk_ctrlhdmi_blk_ctrlirqsteer_hdmihdmi_pvipvi_from_lcdif3pvi_to_hdmi_txlcdif3_to_pvihdmi_tx_from_pvihdmi_tx_phypciepcie0_eppcie_epvpumix_blk_ctrlnpugicedacmcusb3_phy0usb3_0usb_dwc3_0usb3_phy1usb3_1usb_dwc3_1dspreg_vdd_iobacklight_lvds0panel0_lvdspanel0_inreg_can1_stbyreg_can2_stbyreg_vdd_12v0reg_vdd_1v8reg_vdd_3v3reg_vdd_5v0