W8(  ,,TQ-Systems i.MX8QXP TQMa8XQPS on MB-SMARC-2A2tq,imx8qxp-tqma8xqps-mb-smarc-2tq,imx8qxp-tqma8xqpsfsl,imx8qxpaliases =/bus@5b000000/ethernet@5b040000 G/bus@5b000000/ethernet@5b050000Q/bus@5d000000/gpio@5d080000W/bus@5d000000/gpio@5d090000]/bus@5d000000/gpio@5d0a0000c/bus@5d000000/gpio@5d0b0000i/bus@5d000000/gpio@5d0c0000o/bus@5d000000/gpio@5d0d0000u/bus@5d000000/gpio@5d0e0000{/bus@5d000000/gpio@5d0f0000/bus@5a000000/i2c@5a800000/bus@5a000000/i2c@5a810000/bus@5a000000/i2c@5a820000/bus@5a000000/i2c@5a830000/bus@5b000000/mmc@5b010000/bus@5b000000/mmc@5b020000/bus@5b000000/mmc@5b030000/bus@5d000000/mailbox@5d1b0000/bus@5d000000/mailbox@5d1c0000/bus@5d000000/mailbox@5d1d0000/bus@5d000000/mailbox@5d1e0000/bus@5d000000/mailbox@5d1f0000/bus@5a000000/serial@5a060000/bus@5a000000/serial@5a070000/bus@5a000000/serial@5a080000/bus@5a000000/serial@5a090000/bus@5a000000/spi@5a000000/bus@5a000000/spi@5a010000/bus@5a000000/spi@5a020000/bus@5a000000/spi@5a030000 /vpu@2c000000/vpu-core@2d080000 /vpu@2c000000/vpu-core@2d090000"/bus@5a000000/i2c@5a800000/rtc@51/system-controller/rtccpus cpu@0 cpu2arm,cortex-a35psci(5@GTa@s cpu@1 cpu2arm,cortex-a35psci(5@GTa@s  cpu@2 cpu2arm,cortex-a35psci(5@GTa@s  cpu@3 cpu2arm,cortex-a35psci(5@GTa@s  l2-cache02cache*7@Iopp-table2operating-points-v2opp-9000000005B@Iopp-1200000000GIinterrupt-controller@51a00000 2arm,gic-v3 QQ + @ reserved-memory Kdecoder-boot@84000000Rencoder-boot@86000000 Rdecoder-rpc@92000000Rdsp@92400000@R Ydisabledlinux,cma2shared-dma-pool`0 i0vm4@88000000R Ydisabledvdev0vring0@900000002shared-dma-poolR Ydisabledvdev0vring1@900080002shared-dma-poolR Ydisabledvdev1vring0@900100002shared-dma-poolR Ydisabledvdev1vring1@900180002shared-dma-poolR Ydisabledrsc-table@900ff000R Ydisabledvdevbuffer@904000002shared-dma-pool@R Ydisabledencoder-rpc@92100000pRpmu2arm,cortex-a35-pmu @psci 2arm,psci-1.0!smcsystem-controller 2fsl,imx-scu tx0rx0gip3$power-controller2fsl,imx8qxp-scu-pdfsl,scu-pdclock-controller2fsl,imx8qxp-clkfsl,scu-clkpinctrl2fsl,imx8qxp-iomuxcbacklight-lvds0grp [!backlight-lvds1grp Y!can1grpq!r!ccan2grpn!m!dethphy0grpy@@zethphy1grph@P@|fec1grp5A4A&@%@'@(@)@*@,@-@.@/@0@1@xfec2grp9@7@?@@@8@:@;@B@A@>@=@<@~flexspi0grpMMMMMMMMMMMMMMsmarcgpiogrpl]!^!_!a!g!d!c!f!e!smarcfangpiogrpN!M!smarcmngtgpiogrp<H!E!G!F!C!lbdpanel0grp \!lbdpanel1grp Z!lpi2c0grp!!Tlpi2c0gpiogrp!!Ulpuart0grp0o p i j Llpuart3grp  Pmipi-lvds0-i2c0grpt!u!mipi-lvds0-i2c0-gpiogrpt!u!pcieagrp$AAAmipi-lvds0-pwmgrp v!mipi-lvds1-pwmgrp z!rtcgrp {!Xusdhc1grp @      @jusdhc1100mhzgrp A ! ! ! !!!!!!Akusdhc1200mhzgrp A ! ! ! !!!!!!Alsdvmmcgrp !spi1grp<SARAUAT!V!Gsai1grp<L@W@X@k@l@&usbotg1grp!!husdhc2gpiogrp!!qusdhc2grpTA! !!!"!#!!pusdhc2100mhzgrpT@ ! " #  rusdhc2200mhzgrpT@ ! " #  socotp2fsl,imx8qxp-scu-ocotp keys"2fsl,imx8qxp-sc-keyfsl,imx-sc-keyt Ydisabledrtc2fsl,imx8qxp-sc-rtcwatchdog"2fsl,imx8qxp-sc-wdtfsl,imx-sc-wdt<thermal-sensor*2fsl,imx8qxp-sc-thermalfsl,imx-sc-thermaltimer2arm,armv8-timer0@   clock-dummy 2fixed-clock clk_dummyclock-xtal32k 2fixed-clock xtal_32KHzclock-xtal24m 2fixed-clockn6 xtal_24MHzthermal-zonescpu0-thermal.<ctripstrip0LsXpassivetrip1LX criticalcooling-mapsmap0c0h pmic0-thermal.<tripstrip0LXpassive trip1LHX criticalcooling-mapsmap0c 0h clock-img-ipg 2fixed-clock  img_ipg_clkbus@58000000 2simple-bus KXXjpegdec@58400000X@ @5 w  2nxp,imx8qxp-jpgdecjpegenc@58450000XE @1w 2nxp,imx8qxp-jpgencclock-controller@585d00002fsl,imx8qxp-lpcgX]0img_jpeg_dec_lpcg_clkimg_jpeg_dec_lpcg_ipg_clk clock-controller@585f00002fsl,imx8qxp-lpcgX_0img_jpeg_enc_lpcg_clkimg_jpeg_enc_lpcg_ipg_clkvpu@2c000000 K,,,Yokay2nxp,imx8qxp-vpumailbox@2d0000002fsl,imx6sx-mu- @Yokaymailbox@2d0200002fsl,imx6sx-mu- @Yokayvpu-core@2d080000-2nxp,imx8q-vpu-decoder tx0tx1rx$Yokayvpu-core@2d090000-2nxp,imx8q-vpu-encoder tx0tx1rx$Yokayclock-cm40-ipg 2fixed-clock) cm40_ipg_clkbus@34000000 2simple-bus K44serial@372200002fsl,imx8qxp-lpuart7"@ ipgbaud wn6 Ydisabledi2c@37230000$2fsl,imx8qxp-lpi2cfsl,imx7ulp-lpi2c7#@ peripg w n6  Ydisabledintmux@374000002fsl,imx-intmux7@`@+ipg! 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i2c2_lpcg_clki2c2_lpcg_ipg_clkb^clock-controller@5ac300002fsl,imx8qxp-lpcgZcR i2c3_lpcg_clki2c3_lpcg_ipg_clkc_clock-controller@5ac800002fsl,imx8qxp-lpcgZeR adc0_lpcg_clkadc0_lpcg_ipg_clke`clock-controller@5ac900002fsl,imx8qxp-lpcgZfR adc1_lpcg_clkadc1_lpcg_ipg_clkfaclock-controller@5acd00002fsl,imx8qxp-lpcgZiRR 5can0_lpcg_pe_clkcan0_lpcg_ipg_clkcan0_lpcg_chi_clkibclock-conn-axi 2fixed-clockCU conn_axi_clkclock-conn-ahb 2fixed-clock ! conn_ahb_clkclock-conn-ipg 2fixed-clock conn_ipg_clkclock-conn-bch 2fixed-clockׄ conn_bch_clkbus@5b000000 2simple-bus K[[usb@5b0d0000-2fsl,imx7ulp-usbfsl,imx6ul-usbfsl,imx27-usb[  @ -e8fgDUiYokaydefault)h}otgusbmisc@5b0d020082fsl,imx7ulp-usbmiscfsl,imx7d-usbmiscfsl,imx6q-usbmisc[ fusbphy@5b100000&2fsl,imx8qxp-usbphyfsl,imx7ulp-usbphy[gYokayemmc@5b010000 @[iii ipgahbperYokay"2fsl,imx8qxp-usdhcfsl,imx7d-usdhc"defaultstate_100mhzstate_200mhz)jklmn !mmc@5b020000 @[ooo ipgahbper)>Yokay"2fsl,imx8qxp-usdhcfsl,imx7d-usdhc"defaultstate_100mhzstate_200mhz)pqrqsq Nt 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enet0_lpcg_timer_clkenet0_lpcg_txc_sampling_clkenet0_lpcg_ahb_clkenet0_lpcg_rgmii_txc_clkenet0_lpcg_ipg_clkenet0_lpcg_ipg_s_clkwclock-controller@5b2400002fsl,imx8qxp-lpcg[$0 enet1_lpcg_timer_clkenet1_lpcg_txc_sampling_clkenet1_lpcg_ahb_clkenet1_lpcg_rgmii_txc_clkenet1_lpcg_ipg_clkenet1_lpcg_ipg_s_clk}clock-controller@5b2700002fsl,imx8qxp-lpcg['"usboh3_ahb_clkusboh3_phy_ipg_clkgclock-controller@5b2800002fsl,imx8qxp-lpcg[(0Musb3_app_clkusb3_lpm_clkusb3_ipg_clkusb3_core_pclkusb3_phy_clkusb3_aclkclock-controller@5b2900002fsl,imx8qxp-lpcg[)   'gpmi_bchgpmi_iogpmi_apbgpmi_bch_apb clock-controller@5b2900042fsl,imx8qxp-lpcg[) apbhdma_hclk dma-controller@5b810000(2fsl,imx8qxp-dma-apbhfsl,imx28-dma-apbh[ 0@3> nand-controller@5b8120002fsl,imx8qxp-gpmi-nand[ [@ qgpmi-nandbch  @{bch 'gpmi_iogpmi_apbgpmi_bchgpmi_bch_apbrx-tx  w  Ydisabledbus@5c000000 2simple-bus K\\ddr-pmu@5c0200002fsl,imx8-ddr-pmu\ @clock-lsio-bus 2fixed-clock lsio_bus_clkbus@5d000000 2simple-bus  K]]pwm@5d0000002fsl,imx27-pwm]ipgper wn6x @^ Ydisabledpwm@5d0100002fsl,imx27-pwm]ipgper wn6x @_ Ydisabledpwm@5d0200002fsl,imx27-pwm]ipgper wn6x @` Ydisabledpwm@5d0300002fsl,imx27-pwm]ipgper wn6x @a Ydisabledgpio@5d080000] @+ 2fsl,imx8qxp-gpiofsl,imx35-gpioP8 EKPRdefault)pLIDSLEEPCHARGING#CHGPRSNT#BATLOW#SMARC_GPIO6SMARC_GPIO5PHY3 RST#SPI0_CS0SPI0_CS1Hgpio@5d090000]  @+ 2fsl,imx8qxp-gpiofsl,imx35-gpio0Y ctdefault)LCD1_BLKT_ENLCD1_VDD_ENLCD0_BLKT_ENLCD0_VDD_ENSMARC_GPIO0SMARC_GPIO1SMARC_GPIO2SMARC_GPIO3SMARC_GPIO8SMARC_GPIO7SMARC_GPIO10SMARC_GPIO9SMARC_GPIO4{gpio@5d0a0000]  @+ 2fsl,imx8qxp-gpiofsl,imx35-gpio0{~(RTC_INT#Ygpio@5d0b0000]  @+ 2fsl,imx8qxp-gpiofsl,imx35-gpio0 )PHY0_RST#Vgpio@5d0c0000]  @+ 2fsl,imx8qxp-gpiofsl,imx35-gpio  %[PCIE_PERST#PCIE_WAKE#USB_OTG1_PWRSDIO_PWR_ENSDIO_WPSDIO_CD#tgpio@5d0d0000]  @+ 2fsl,imx8qxp-gpiofsl,imx35-gpio0(, 3gpio@5d0e0000] @+ 2fsl,imx8qxp-gpiofsl,imx35-gpiogpio@5d0f0000] @+ 2fsl,imx8qxp-gpiofsl,imx35-gpiospi@5d120000 2nxp,imx8qxp-fspi]qfspi_basefspi_mmap @\ fspi_enfspiYokaydefault)flash@02jedec,spi-norpartitions2fixed-partitions mailbox@5d1b0000] @ Ydisabled2fsl,imx8qxp-mufsl,imx6sx-mumailbox@5d1c0000] @-2fsl,imx8-mu-scufsl,imx8qxp-mufsl,imx6sx-mumailbox@5d1d0000] @ Ydisabled-2fsl,imx8-mu-scufsl,imx8qxp-mufsl,imx6sx-mumailbox@5d1e0000] @ Ydisabled-2fsl,imx8-mu-scufsl,imx8qxp-mufsl,imx6sx-mumailbox@5d1f0000] @ Ydisabled-2fsl,imx8-mu-scufsl,imx8qxp-mufsl,imx6sx-mumailbox@5d200000]  @ Ydisabled2fsl,imx8qxp-mufsl,imx6sx-mumailbox@5d210000]! @ Ydisabled2fsl,imx8qxp-mufsl,imx6sx-mumailbox@5d280000]( @2fsl,imx8qxp-mufsl,imx6sx-mu+clock-controller@5d4000002fsl,imx8qxp-lpcg]@4hpwm0_lpcg_ipg_clkpwm0_lpcg_ipg_hf_clkpwm0_lpcg_ipg_s_clkpwm0_lpcg_ipg_slv_clkpwm0_lpcg_ipg_mstr_clkclock-controller@5d4100002fsl,imx8qxp-lpcg]A4hpwm1_lpcg_ipg_clkpwm1_lpcg_ipg_hf_clkpwm1_lpcg_ipg_s_clkpwm1_lpcg_ipg_slv_clkpwm1_lpcg_ipg_mstr_clkclock-controller@5d4200002fsl,imx8qxp-lpcg]B4hpwm2_lpcg_ipg_clkpwm2_lpcg_ipg_hf_clkpwm2_lpcg_ipg_s_clkpwm2_lpcg_ipg_slv_clkpwm2_lpcg_ipg_mstr_clkclock-controller@5d4300002fsl,imx8qxp-lpcg]C4hpwm3_lpcg_ipg_clkpwm3_lpcg_ipg_hf_clkpwm3_lpcg_ipg_s_clkpwm3_lpcg_ipg_slv_clkpwm3_lpcg_ipg_mstr_clkclock-controller@5d4400002fsl,imx8qxp-lpcg]D4hpwm4_lpcg_ipg_clkpwm4_lpcg_ipg_hf_clkpwm4_lpcg_ipg_s_clkpwm4_lpcg_ipg_slv_clkpwm4_lpcg_ipg_mstr_clkclock-controller@5d4500002fsl,imx8qxp-lpcg]E4hpwm5_lpcg_ipg_clkpwm5_lpcg_ipg_hf_clkpwm5_lpcg_ipg_s_clkpwm5_lpcg_ipg_slv_clkpwm5_lpcg_ipg_mstr_clkclock-controller@5d4600002fsl,imx8qxp-lpcg]F4hpwm6_lpcg_ipg_clkpwm6_lpcg_ipg_hf_clkpwm6_lpcg_ipg_s_clkpwm6_lpcg_ipg_slv_clkpwm6_lpcg_ipg_mstr_clkclock-controller@5d4700002fsl,imx8qxp-lpcg]G4hpwm7_lpcg_ipg_clkpwm7_lpcg_ipg_hf_clkpwm7_lpcg_ipg_s_clkpwm7_lpcg_ipg_slv_clkpwm7_lpcg_ipg_mstr_clkclock-hsio-axi 2fixed-clockׄ hsio_axi_clkclock-hsio-per 2fixed-clockU hsio_per_clkclock-hsio-refa2gpio-gate-clock (tclock-hsio-refb2gpio-gate-clock (tclock-xtal100m 2fixed-clock xtal_100MHzbus@5f000000 2simple-bus K__p 5pcie@5f0100002fsl,imx8q-pcie_ qdbiconfig0K@fh{msidma  dbimstrslv@ pciJijklXku Ydisabledpcie-ep@5f0100002fsl,imx8q-pcie-ep_qdbiaddr_spacek @h{dma dbimstrslv Ydisabledclock-controller@5f0600002fsl,imx8qxp-lpcg_  Fhsio_pcieb_mstr_axi_clkhsio_pcieb_slv_axi_clkhsio_pcieb_dbi_axi_clkclock-controller@5f0b00002fsl,imx8qxp-lpcg_ hsio_phyx1_per_clkclock-controller@5f0d00002fsl,imx8qxp-lpcg_ hsio_pcieb_per_clkclock-controller@5f0f00002fsl,imx8qxp-lpcg_hsio_misc_per_clkclock-controller@5f0900002fsl,imx8qxp-lpcg_ Qhsio_phyx1_pclkhsio_phyx1_epcs_tx_clkhsio_phyx1_epcs_rx_clkhsio_phyx1_apb_clkphy@5f1a00002fsl,imx8qxp-hsio ____qregphyctrlmisc(+pclk0apb_pclk0phy0_crrctl0_crrmisc_crr Ydisabledmemory@80000000 memory@clk-xtal25 2fixed-clock}x@Zregulator-3v32regulator-fixed3V32Z2ZWregulator-lvds02regulator-fixeddefault) LCD0_VDD_EN2Z2Z { regulator-lvds12regulator-fixeddefault) LCD1_VDD_EN2Z2Z { regulator-sdvmmc2regulator-fixeddefault) SD1_VMMC2Z2Z t Yokay  @uregulator-vmmc2regulator-fixed MMC0_3V32Z2Zmregulator-vqmmc2regulator-fixed MMC0_1V8w@w@nbacklight-lvds02pwm-backlightdefault) . @ @ Y ({ Ydisabledbacklight-lvds12pwm-backlightdefault) . @ @ Y ({ Ydisabledchosen f/bus@5a000000/serial@5a060000panel-lvds0 r Y Ydisabledportendpointpanel-lvds1 r Y Ydisabledportendpointregulator-1v82regulator-fixed1V8w@w@\regulator-12v02regulator-fixed12V0sound2fsl,imx-audio-tlv320aic32x4,tqm-tlv320aic32 |  interrupt-parent#address-cells#size-cellsmodelcompatibleethernet0ethernet1gpio0gpio1gpio2gpio3gpio4gpio5gpio6gpio7i2c0i2c1i2c2i2c3mmc0mmc1mmc2mu0mu1mu2mu3mu4serial0serial1serial2serial3spi0spi1spi2spi3vpu-core0vpu-core1rtc0rtc1device_typeregenable-methodi-cache-sizei-cache-line-sizei-cache-setsd-cache-sized-cache-line-sized-cache-setsnext-level-cacheclocksoperating-points-v2#cooling-cellsphandlecache-levelcache-unifiedopp-sharedopp-hzopp-microvoltclock-latency-nsopp-suspend#interrupt-cellsinterrupt-controllerinterruptsrangesno-mapstatusreusablealloc-rangeslinux,cma-defaultmbox-namesmboxes#power-domain-cells#clock-cellsfsl,pinslinux,keycodestimeout-sec#thermal-sensor-cellsclock-frequencyclock-output-namespolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresistripcooling-deviceassigned-clocksassigned-clock-ratespower-domainsclock-indices#mbox-cellsmemory-regionclock-namesdmasdma-namesfsl,asrc-ratefsl,asrc-widthfsl,asrc-clk-mappinctrl-namespinctrl-0#dma-cellsdma-channelsdma-channel-maskfirmware-namedaiscs-gpios#pwm-cellspinctrl-1scl-gpiossda-gpiospagesizevcc-supplyquartz-load-femtofaradsread-onlyiov-supplyldoin-supply#io-channel-cellsfsl,clk-sourcefsl,scu-indexxceiver-supplyfsl,usbphyfsl,usbmiscahb-burst-configtx-burst-size-dwordrx-burst-size-dwordsrp-disablehnp-disableadp-disablepower-active-highover-current-active-lowdr_mode#index-cellspinctrl-2vmmc-supplyvqmmc-supplybus-widthnon-removableno-sdno-sdiofsl,tuning-start-tapfsl,tuning-stepcd-gpioswp-gpiosno-1-8-vno-mmcfsl,num-tx-queuesfsl,num-rx-queuesphy-modephy-handlefsl,magic-packetmac-addressti,rx-internal-delayti,tx-internal-delayti,fifo-depthti,dp83867-rxctrl-strap-quirkti,clk-output-selreset-gpiosreset-assert-usreset-deassert-usenet-phy-lane-no-swapreg-namesinterrupt-namesphysphy-namescdns,on-chip-buff-size#phy-cellsgpio-controller#gpio-cellsgpio-rangesgpio-line-namesspi-max-frequencyspi-tx-bus-widthspi-rx-bus-widthenable-gpiosdma-rangesbus-rangeinterrupt-mapinterrupt-map-masknum-lanesnum-viewportfsl,max-link-speednum-ib-windowsnum-ob-windowsregulator-nameregulator-min-microvoltregulator-max-microvoltregulator-always-ongpioenable-active-highoff-on-delay-usbrightness-levelsdefault-brightness-levelpower-supplystdout-pathbacklightssi-controlleraudio-codec