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pJ,-.g0mailbox@4080002qcom,qcs8300-ipccqcom,ipcc{@ g,efuse@784000 2qcom,qcs8300-qfpromqcom,qfprom{x@ dma-controller@900000)2qcom,qcs8300-gpi-dmaqcom,sm6350-gpi-dma{ /  !disabledg9geniqup@9c00002qcom,geni-se-qup{ 00 (m-ahbs-ahb  /!okayi2c@9800002qcom,geni-i2c{@0_(se41>default & HL2234-56Zqup-corequp-configqup-memory78 m99rtxrx !disabledspi@9800002qcom,geni-spi{@0_(se4:;>default & 0L2234-Zqup-corequp-config7|< m99rtxrx !disabledserial@9800002qcom,geni-uart{@0_(se4=>?@>default &0L2234-Zqup-corequp-config7|< !disabledi2c@9840002qcom,geni-i2c{@@0a(se4A>default ' HL2234-56Zqup-corequp-configqup-memory78 m99rtxrx !disabledspi@9840002qcom,geni-spi{@@0a(se4BC>default ' 0L2234-Zqup-corequp-config7|< m99rtxrx !disabledserial@9840002qcom,geni-uart{@@0a(se4DEFG>default '0L2234-Zqup-corequp-config7|< !disabledi2c@9880002qcom,geni-i2c{@0c(se4H>default  HL2234-56Zqup-corequp-configqup-memory78 m99rtxrx !disabledspi@9880002qcom,geni-spi{@0c(se4IJ>default  0L2234-Zqup-corequp-config7|< m99rtxrx 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0L2234.Zqup-corequp-config7|< mnnrtxrx !disabledserial@a940002qcom,geni-uart{@@0{(se4>default f0L2234.Zqup-corequp-config7|< !disabledi2c@a980002qcom,geni-i2c{@0}(se4>default C HL2234.56Zqup-corequp-configqup-memory78 mnnrtxrx !disabledspi@a980002qcom,geni-spi{@0}(se4>default C 0L2234.Zqup-corequp-config7|< mnnrtxrx !disabledserial@a980002qcom,geni-uart{@0}(se4>default C0L2234.Zqup-corequp-config7|< !disabledi2c@a9c0002qcom,geni-i2c{@0(se4>default } HL2234.56Zqup-corequp-configqup-memory78 mnnrtxrx !disabledspi@a9c0002qcom,geni-spi{@0(se4>default } 0L2234.Zqup-corequp-config7|< mnnrtxrx !disabledserial@a9c0002qcom,geni-uart{@0(se4>default }0L2234.Zqup-corequp-config7|< !disableddma-controller@b00000)2qcom,qcs8300-gpi-dmaqcom,sm6350-gpi-dma{0pq /V !disabledggeniqup@bc00002qcom,geni-se-qup{ 00 (m-ahbs-ahb  /C !disabledi2c@b800002qcom,geni-i2c{@0(se4>default > HL2234/56Zqup-corequp-configqup-memory78 mrtxrx !disabledspi@b800002qcom,geni-spi{@0(se4>default > 0L2234/Zqup-corequp-config7|< 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gpio@8800#2qcom,pmm8654au-gpioqcom,spmi-gpio{#; /g;usb2-en-state;gpio7@normalIWgKpinctrl@f1000002qcom,qcs8300-tlmm{0 /#dgqup-i2c0-data-clk-state;gpio17gpio18 @qup0_se0g1qup-i2c1-data-clk-state;gpio19gpio20 @qup0_se1gAqup-i2c2-data-clk-state;gpio33gpio34 @qup0_se2gHqup-i2c3-data-clk-state;gpio25gpio26 @qup0_se3gOqup-i2c4-data-clk-state;gpio29gpio30 @qup0_se4gVqup-i2c5-data-clk-state;gpio21gpio22 @qup0_se5g]qup-i2c6-data-clk-state;gpio80gpio81 @qup0_se6gdqup-i2c8-data-clk-state;gpio37gpio38 @qup1_se0gmqup-i2c9-data-clk-state;gpio39gpio40 @qup1_se1guqup-i2c10-data-clk-state;gpio84gpio85 @qup1_se2g|qup-i2c11-data-clk-state;gpio41gpio42 @qup1_se3gqup-i2c12-data-clk-state;gpio45gpio46 @qup1_se4gqup-i2c13-data-clk-state;gpio49gpio50 @qup1_se5gqup-i2c14-data-clk-state;gpio89gpio90 @qup1_se6gqup-i2c15-data-clk-state;gpio91gpio92 @qup1_se7gqup-i2c16-data-clk-state;gpio10gpio11 @qup2_se0gqup-spi0-data-clk-state;gpio17gpio18gpio19 @qup0_se0g:qup-spi0-cs-state;gpio20 @qup0_se0g;qup-spi0-cs-gpio-state;gpio20@gpioqup-spi1-data-clk-state;gpio19gpio20gpio17 @qup0_se1gBqup-spi1-cs-state;gpio18 @qup0_se1gCqup-spi1-cs-gpio-state;gpio18@gpioqup-spi2-data-clk-state;gpio33gpio34gpio35 @qup0_se2gIqup-spi2-cs-state;gpio36 @qup0_se2gJqup-spi2-cs-gpio-state;gpio36@gpioqup-spi3-data-clk-state;gpio25gpio26gpio27 @qup0_se3gPqup-spi3-cs-state;gpio28 @qup0_se3gQqup-spi3-cs-gpio-state;gpio28@gpioqup-spi4-data-clk-state;gpio29gpio30gpio31 @qup0_se4gWqup-spi4-cs-state;gpio32 @qup0_se4gXqup-spi4-cs-gpio-state;gpio32@gpioqup-spi5-data-clk-state;gpio21gpio22gpio23 @qup0_se5g^qup-spi5-cs-state;gpio24 @qup0_se5g_qup-spi5-cs-gpio-state;gpio24@gpioqup-spi6-data-clk-state;gpio80gpio81gpio82 @qup0_se6gequp-spi6-cs-state;gpio83 @qup0_se6gfqup-spi6-cs-gpio-state;gpio83@gpioqup-spi8-data-clk-state;gpio37gpio38gpio39 @qup1_se0goqup-spi8-cs-state;gpio40 @qup1_se0gpqup-spi8-cs-gpio-state;gpio40@gpioqup-spi9-data-clk-state;gpio39gpio40gpio37 @qup1_se1gvqup-spi9-cs-state;gpio38 @qup1_se1gwqup-spi9-cs-gpio-state;gpio38@gpioqup-spi10-data-clk-state;gpio84gpio85gpio86 @qup1_se2g}qup-spi10-cs-state;gpio87 @qup1_se2g~qup-spi10-cs-gpio-state;gpio87@gpioqup-spi12-data-clk-state;gpio45gpio46gpio47 @qup1_se4gqup-spi12-cs-state;gpio48 @qup1_se4gqup-spi12-cs-gpio-state;gpio48@gpioqup-spi13-data-clk-state;gpio49gpio50gpio51 @qup1_se5gqup-spi13-cs-state;gpio52 @qup1_se5gqup-spi13-cs-gpio-state;gpio52@gpioqup-spi14-data-clk-state;gpio89gpio90gpio91 @qup1_se6gqup-spi14-cs-state;gpio92 @qup1_se6gqup-spi14-cs-gpio-state;gpio92@gpioqup-spi15-data-clk-state;gpio91gpio92gpio89 @qup1_se7gqup-spi15-cs-state;gpio90 @qup1_se7gqup-spi15-cs-gpio-state;gpio90@gpioqup-spi16-data-clk-state;gpio10gpio11gpio12 @qup2_se0gqup-spi16-cs-state;gpio13 @qup2_se0gqup-spi16-cs-gpio-state;gpio13@gpioqup-uart0-cts-state;gpio17 @qup0_se0g=qup-uart0-rts-state;gpio18 @qup0_se0g>qup-uart0-tx-state;gpio19 @qup0_se0g?qup-uart0-rx-state;gpio20 @qup0_se0g@qup-uart1-cts-state;gpio19 @qup0_se1gDqup-uart1-rts-state;gpio20 @qup0_se1gEqup-uart1-tx-state;gpio17 @qup0_se1gFqup-uart1-rx-state;gpio18 @qup0_se1gGqup-uart2-cts-state;gpio33 @qup0_se2gKqup-uart2-rts-state;gpio34 @qup0_se2gLqup-uart2-tx-state;gpio35 @qup0_se2gMqup-uart2-rx-state;gpio36 @qup0_se2gNqup-uart3-cts-state;gpio25 @qup0_se3gRqup-uart3-rts-state;gpio26 @qup0_se3gSqup-uart3-tx-state;gpio27 @qup0_se3gTqup-uart3-rx-state;gpio28 @qup0_se3gUqup-uart4-cts-state;gpio29 @qup0_se4gYqup-uart4-rts-state;gpio30 @qup0_se4gZqup-uart4-tx-state;gpio31 @qup0_se4g[qup-uart4-rx-state;gpio32 @qup0_se4g\qup-uart5-cts-state;gpio21 @qup0_se5g`qup-uart5-rts-state;gpio22 @qup0_se5gaqup-uart5-tx-state;gpio23 @qup0_se5gbqup-uart5-rx-state;gpio23 @qup0_se5gcqup-uart6-cts-state;gpio80 @qup0_se6ggqup-uart6-rts-state;gpio81 @qup0_se6ghqup-uart6-tx-state;gpio82 @qup0_se6giqup-uart6-rx-state;gpio83 @qup0_se6gjqup-uart7-tx-state;gpio43 @qup0_se7gkqup-uart7-rx-state;gpio44 @qup0_se7glqup-uart8-cts-state;gpio37 @qup1_se0gqqup-uart8-rts-state;gpio38 @qup1_se0grqup-uart8-tx-state;gpio39 @qup1_se0gsqup-uart8-rx-state;gpio40 @qup1_se0gtqup-uart9-cts-state;gpio39 @qup1_se1gxqup-uart9-rts-state;gpio40 @qup1_se1gyqup-uart9-tx-state;gpio37 @qup1_se1gzqup-uart9-rx-state;gpio38 @qup1_se1g{qup-uart10-cts-state;gpio84 @qup1_se2gqup-uart10-rts-state;gpio84 @qup1_se2gqup-uart10-tx-state;gpio85 @qup1_se2gqup-uart10-rx-state;gpio87 @qup1_se2gqup-uart11-tx-state;gpio41 @qup1_se3gqup-uart11-rx-state;gpio42 @qup1_se3gqup-uart12-cts-state;gpio45 @qup1_se4gqup-uart12-rts-state;gpio46 @qup1_se4gqup-uart12-tx-state;gpio47 @qup1_se4gqup-uart12-rx-state;gpio48 @qup1_se4gqup-uart13-cts-state;gpio49 @qup1_se5gqup-uart13-rts-state;gpio50 @qup1_se5gqup-uart13-tx-state;gpio51 @qup1_se5gqup-uart13-rx-state;gpio52 @qup1_se5gqup-uart14-cts-state;gpio89 @qup1_se6gqup-uart14-rts-state;gpio90 @qup1_se6gqup-uart14-tx-state;gpio91 @qup1_se6gqup-uart14-rx-state;gpio92 @qup1_se6gqup-uart15-cts-state;gpio91 @qup1_se7gqup-uart15-rts-state;gpio92 @qup1_se7gqup-uart15-tx-state;gpio89 @qup1_se7gqup-uart15-rx-state;gpio90 @qup1_se7gqup-uart16-cts-state;gpio10 @qup2_se0gqup-uart16-rts-state;gpio11 @qup2_se0gqup-uart16-tx-state;gpio12 @qup2_se0gqup-uart16-rx-state;gpio13 @qup2_se0gethernet0-default-stategDethernet0-mdc-pins;gpio5 @emac0_mdcrethernet0-mdio-pins;gpio6 @emac0_mdiorsram@146d8000$2qcom,qcs8300-imemsysconsimple-mfd{mm pil-reloc@94c2qcom,pil-reloc-info{ Liommu@1500000002qcom,qcs8300-smmu-500qcom,smmu-500arm,mmu-500{wxbcdefghijklmnopqrstuv;<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYg/iommu@1520000002qcom,qcs8300-smmu-500qcom,smmu-500arm,mmu-500{ uvwx4676HIJKLMNOPQ"#$%&'()*+,-.DEFGVWXOinterrupt-controller@17a00000 2arm,gic-v3 {  gwatchdog@17c10000$2qcom,apss-wdt-qcs8300qcom,kpss-wdt{. timer@17c200002arm,armv7-timer-mem{  frame@17c21000{ frame@17c23000{0   !disabledframe@17c25000{P   !disabledframe@17c27000{p   !disabledframe@17c29000{   !disabledframe@17c2b000{°   !disabledframe@17c2d000{  !disabledrsc@182000002qcom,rpmh-rsc0{ !"drv-0drv-1drv-2$' apps_rsc  bcm-voter2qcom,bcm-votergclock-controller2qcom,sa8775p-rpmh-clkJ<(xog-power-controller2qcom,qcs8300-rpmhpd|=g7opp-table2operating-points-v2g=opp-0opp-10opp-2@g8opp-3opp-4g opp-5gopp-6@opp-7Popp-8opp-9regulators-02qcom,pmm8654au-rpmh-regulatorsasmps4  vreg_s4aw@1w@Ismps9  vreg_s9a@1@Ildo3  vreg_l3aO1OI`yldo4  vreg_l4a m1 I`ygldo5  vreg_l5aO1OI`ygldo6  vreg_l6a m1 I`yldo7  vreg_l7a m1 I`yg1ldo8  vreg_l8a&5@1-*I`ygldo9  vreg_l9a-Q1.I`yg3regulators-12qcom,pmm8654au-rpmh-regulatorscsmps5  vreg_s5c؀1؀Ildo1  vreg_l1c1 I`yldo2  vreg_l2c 1 @I`yldo4  vreg_l4cO1OI`ygldo6  vreg_l6cw@1w@I`yldo7  vreg_l7cw@1w@I`yg2ldo8  vreg_l8cw@1w@I`yldo9  vreg_l9cw@1w@I`ycpufreq@18591000,2qcom,qcs8300-cpufreq-epssqcom,cpufreq-epss0{YY0Y@'freq-domain0freq-domain1freq-domain2$ V$dcvsh-irq-0dcvsh-irq-1dcvsh-irq-2-0 (xoalternategremoteproc@20c00000/2qcom,qcs8300-gpdsp-pasqcom,sa8775p-gpdsp0-pas{ @3>>>>#wdogfatalreadyhandoverstop-ack-(xo77 cxmxcL?4 @Astop!okayqcom/qcs8300/gpdsp0.mbnglink-edge3, G,gpdspgethernet@23040000(2qcom,qcs8300-ethqosqcom,sa8775p-ethqos {##`stmmacethrgmii macirqsfty 00!00(stmmacethpclkptp_refphyaux0Bserdes /  @P!okay 2500base-xC4D>defaultEF mdio2snps,dwmac-mdio phy@82ethernet-phy-id31c3.1c33{ oethernet-phy 3  * *pgCrx-queues-config < RgEqueue0 c v  queue1 c v queue2  v queue3  v tx-queues-config gFqueue0 cqueue1 cqueue2     #queue3     #interconnect@260c00002qcom,qcs8300-nspa-noc{& `gHremoteproc@26300000-2qcom,qcs8300-cdsp-pasqcom,sa8775p-cdsp0-pas{&0@3BGGGG#wdogfatalreadyhandoverstop-ack-(xo77 7 cxmxcnspLH6IJstop!okayqcom/qcs8300/cdsp0.mbnglink-edge3, G,cdspgfastrpc 2qcom,fastrpcfastrpcglink-apps-dspcdsp compute-cb@12qcom,fastrpc-compute-cb{/@/acompute-cb@22qcom,fastrpc-compute-cb{/@/bcompute-cb@32qcom,fastrpc-compute-cb{/@/ccompute-cb@42qcom,fastrpc-compute-cb{/@/dtimer2arm,armv8-timer0   aliases$ 3/soc@0/geniqup@9c0000/serial@99c000chosen ;serial0:115200n8regulator-usb2-vbus2regulator-fixed  USB2_VBUS G;4K>default L _ interrupt-parent#address-cells#size-cellsmodelcompatiblechassis-type#clock-cellsclock-frequencyphandledevice_typeregenable-methodnext-level-cachepower-domainspower-domain-namescapacity-dmips-mhzdynamic-power-coefficientqcom,freq-domaincache-levelcache-unifiedcpuentry-methodidle-state-namearm,psci-suspend-paramentry-latency-usexit-latency-usmin-residency-uslocal-timer-stopremote-endpointqcom,dload-mode#interconnect-cellsqcom,bcm-votersopp-hzrequired-oppsinterrupts#power-domain-cellsdomain-idle-statesrangesno-maphwlocksinterrupts-extendedmboxesqcom,smemqcom,local-pidqcom,remote-pidqcom,entry-nameinterrupt-controller#interrupt-cells#qcom,smem-state-cells#reset-cellsclocks#mbox-cells#dma-cellsiommusdma-channelsdma-channel-maskdma-coherentstatusclock-namespinctrl-0pinctrl-namesinterconnectsinterconnect-namesdmasdma-namesoperating-points-v2physphy-nameslanes-per-directionresetsreset-namesfreq-table-hzqcom,icereset-gpiosvcc-supplyvcc-max-microampvccq-supplyvccq-max-microamp#phy-cellsvdda-phy-supplyvdda-pll-supplyqcom,eeqcom,controlled-remotelynum-channelsqcom,num-ees#hwlock-cellsinterrupt-namesmemory-regionqcom,qmpqcom,smem-statesqcom,smem-state-namesfirmware-namelabelqcom,glink-channelsqcom,vmidsreg-namesqcom,cmb-element-bitsqcom,cmb-msrs-numqcom,dsb-element-bitsqcom,dsb-msrs-numarm,coresight-loses-context-with-cpuqcom,skip-power-upvdda18-supplyvdda33-supplyclock-output-names#iommu-cells#global-interruptsopp-peak-kBpsassigned-clocksassigned-clock-rateswakeup-sourcesnps,dis_enblslpm_quirksnps,dis-u1-entry-quirksnps,dis-u2-entry-quirksnps,dis_u2_susphy_quirksnps,dis_u3_susphy_quirkdr_modeqcom,select-utmi-as-pipe-clkmaximum-speedqcom,pdc-rangesqcom,channelallow-set-timegpio-controllergpio-ranges#gpio-cellspinsfunctionoutput-enablepower-sourcewakeup-parentdrive-strengthbias-pull-up#redistributor-regionsredistributor-strideframe-numberqcom,tcs-offsetqcom,drv-idqcom,tcs-configopp-levelqcom,pmic-idregulator-nameregulator-min-microvoltregulator-max-microvoltregulator-initial-moderegulator-allow-set-loadregulator-allowed-modes#freq-domain-cellssnps,tsosnps,pblrx-fifo-depthtx-fifo-depthphy-modephy-handlesnps,mtl-rx-configsnps,mtl-tx-configsnps,ps-speedreset-assert-usreset-deassert-ussnps,rx-queues-to-usesnps,rx-sched-spsnps,dcb-algorithmsnps,map-to-dma-channelsnps,route-upsnps,prioritysnps,route-ptpsnps,avb-algorithmsnps,route-avcpsnps,tx-queues-to-usesnps,send_slopesnps,idle_slopesnps,high_creditsnps,low_creditserial0stdout-pathgpioenable-active-highregulator-always-on