8( PX :,Qualcomm Snapdragon AR2 Gen1 Smart Viewer Development Kit2qcom,qar2130pqcom,sar2130p =embeddedchosenJserial0:115200n8clocksxo-board 2fixed-clockVc$ssleep-clk 2fixed-clockVcscpus cpu@0{cpu2arm,cortex-a55pscipscis l2-cache2cachesl3-cache2cachescpu@100{cpu2arm,cortex-a55pscipscis l2-cache2cachescpu@200{cpu2arm,cortex-a55psci pscisl2-cache2cachescpu@300{cpu2arm,cortex-a55psci  pscisl2-cache2caches cpu-mapcluster0core0 core1 core2 core3 idle-statespscicpu-sleep-0-02arm,idle-statesilver-power-collapse-@D%Uevscpu-sleep-0-12arm,idle-statesilver-rail-power-collapse-@DUevsdomain-idle-statescluster-sleep-02domain-idle-state-ADD U escluster-sleep-12domain-idle-state-A#DD Ue!scluster-sleep-22domain-idle-state-ADD6Ue&sfirmwarescm2qcom,scm-sar2130pqcom,scm0 interconnect-02qcom,sar2130p-clk-virts,interconnect-12qcom,sar2130p-mc-virtsmemory@80000000{memorypmu2arm,armv8-pmuv3 psci 2arm,psci-1.0smcpower-domain-cpu0spower-domain-cpu1spower-domain-cpu2s power-domain-cpu3s power-domain-cpu-cluster0 sreserved-memory hyp@80000000`xbl-dt-log@80600000`xbl-ramdump@80640000daop-image@80800000aop-cmd-db@80860000 2qcom,cmd-dbaop-config@80880000tme-crash-dump@808a0000tme-log@808e0000@uefi-log@808e4000@secdata-apss@808ff000smem@80900000 2qcom,smem  cpucp-fw@80b00000helios-ram-dump@80c00000camera@84e00000video@86f00000Padsp@87600000`shcdsp@89400000@ipa-fw@8a3000000ipa-gsi@8a3a00001gpu-micro-code@8a31a0001 socvp@8a400000@pxbl-sc@a6e00000global-sync@a6f00000tz-stat@e8800000tags@e8900000Pqtee@e8e00000Ptrusted-apps@e93000000smp2p-adsp 2qcom,smp2p /6Emaster-kernelUmaster-kernelesjslave-kernel Uslave-kernel|sgsmp2p-cdsp 2qcom,smp2p^ /6Emaster-kernelUmaster-kerneleslave-kernel Uslave-kernel|soc@0 2simple-bus clock-controller@1000002qcom,sar2130p-gccBVs!mmc@7c4000&2qcom,sar2130p-sdhciqcom,sdhci-msm-v5 |@|P hccqhci  `hc_irqpwr_irq!`!aifacecorexo0"#sdhc-ddrcpu-sdhc$%&'"defaultsleep0:HUbqokay()opp-table2operating-points-v2s%opp-100000000*  @@opp-384000000`+&%B@dma-controller@900000*2qcom,sar2130p-gpi-dmaqcom,sm6350-gpi-dma ~  vokays.geniqup@9c00002qcom,geni-se-qup  m-ahbs-ahb!\!]  c,, qup-core okayi2c@9800002qcom,geni-i2c@se!B-"default Y H,," qup-corequp-configqup-memory ..txrx disabledspi@9800002qcom,geni-spi@se!B Y/0"defaultH,," qup-corequp-configqup-memory ..txrx  disabledi2c@9840002qcom,geni-i2c@@se!D1"default Z H,," qup-corequp-configqup-memory ..txrx disabledspi@9840002qcom,geni-spi@@se!D Z23"defaultH,," qup-corequp-configqup-memory ..txrx  disabledi2c@9880002qcom,geni-i2c@se!F4"default [ H,," qup-corequp-configqup-memory ..txrx disabledspi@9880002qcom,geni-spi@se!F [56"defaultH,," qup-corequp-configqup-memory ..txrx  disabledi2c@98c0002qcom,geni-i2c@se!H7"default \ H,," qup-corequp-configqup-memory ..txrx disabledspi@98c0002qcom,geni-spi@se!H \89"defaultH,," qup-corequp-configqup-memory ..txrx  disabledi2c@9900002qcom,geni-i2c@se!J:"default ] H,," qup-corequp-configqup-memory ..txrxokaycspi@9900002qcom,geni-spi@se!J ];<"defaultH,," qup-corequp-configqup-memory ..txrx  disabledi2c@9940002qcom,geni-i2c@@se!L="default ^ H,," qup-corequp-configqup-memory ..txrx disabledspi@9940002qcom,geni-spi@@se!L ^>?"defaultH,," qup-corequp-configqup-memory ..txrx  disableddma-controller@a00000*2qcom,sar2130p-gpi-dmaqcom,sm6350-gpi-dma%&'()* ~  okaysAgeniqup@ac00002qcom,geni-se-qup` m-ahbs-ahb!^!_  ,, qup-core okayi2c@a800002qcom,geni-i2c@se!P@"default a H,," qup-corequp-configqup-memory AAtxrx disabledspi@a800002qcom,geni-spi@se!P aBC"defaultH,," qup-corequp-configqup-memory AAtxrx  disabledi2c@a840002qcom,geni-i2c@@se!RD"default b H,," qup-corequp-configqup-memory AAtxrx disabledspi@a840002qcom,geni-spi@@se!R bEF"defaultH,," qup-corequp-configqup-memory AAtxrx  disabledserial@a840002qcom,geni-uart@@se!RG"default b0,," qup-corequp-configokaybluetooth2qcom,wcn7850-bt"H3IAJPK_LpMN0i2c@a880002qcom,geni-i2c@se!TO"default c H,," qup-corequp-configqup-memory AAtxrxokaycredriver@4f 2nxp,ptn3222O PcQRsrspi@a880002qcom,geni-spi@se!T cST"defaultH,," qup-corequp-configqup-memory AAtxrx  disabledi2c@a8c0002qcom,geni-i2c@se!VU"default d H,," qup-corequp-configqup-memory AAtxrx disabledspi@a8c0002qcom,geni-spi@se!V dVW"defaultH,," qup-corequp-configqup-memory AAtxrx  disabledi2c@a900002qcom,geni-i2c@se!XX"default e H,," qup-corequp-configqup-memory AAtxrxokaycspi@a900002qcom,geni-spi@se!X eYZ"defaultH,," qup-corequp-configqup-memory AAtxrx  disabledi2c@a940002qcom,geni-i2c@@se!Z["default f H,," qup-corequp-configqup-memory AAtxrx disabledspi@a940002qcom,geni-spi@@se!Z f\]"defaultH,," qup-corequp-configqup-memory AAtxrx  disabledserial@a940002qcom,geni-debug-uart@@se!Z^"default f0,,"#qup-corequp-configokayinterconnect@15000002qcom,sar2130p-config-nocPs#interconnect@16800002qcom,sar2130p-system-noch!sinterconnect@16c00002qcom,sar2130p-pcie-anocl!! s_interconnect@17400002qcom,sar2130p-mmss-noctsypcie@1c00000{pci$2qcom,sar2130p-pcieqcom,pcie-sm8550`0`` ``parfdbielbiatuconfigmhi 8` `0`0`(msi0msi1msi2msi3msi4msi5msi6msi78!!!!"!'!(!!=auxcfgbus_masterbus_slaveslave_q2addrss_sf_tbunoc_aggr0_"#,pcie-memcpu-pcie "  ,!3pci!?Dpciephyokay NP7 ZP9`"defaultpcie@0{pci wifi@0 2pci17cb,11073IAJPK"H_LpMNeawbphy@1c06000"2qcom,sar2130p-qmp-gen3x2-pcie-phy` (!!!c!#!%auxcfg_ahbrefrchngpipe,!3phy!#!Vpcie0_pipe_clkokaydespcie@1c08000{pci$2qcom,sar2130p-pcieqcom,pcie-sm8550`0@@ @@parfdbielbiatuconfigmhi 8@ @0@0`34589:vw(msi0msi1msi2msi3msi4msi5msi6msi7H!)!+!,!1!2!!! !:Wauxcfgbus_masterbus_slaveslave_q2addrss_sf_tbunoc_aggrcnoc_sf_axiqmip_pcie_ahb!)$0_"#-pcie-memcpu-pcie "  ,!! 3pcilink_down!?Dpciephy disabledpcie@0{pci pcie-ep@1c080002qcom,sar2130p-pcie-epp0@@ @@ @ &parfdbielbiatuaddr_spacemmiodmaH!)!+!,!1!2!!! !:\auxcfgbus_masterbus_slaveslave_q2addrss_sf_tbuaggre_noc_axicnoc_sf_axiqmip_pcie_ahb$2globaldoorbelldma0_"#-pcie-memcpu-pcie  ,!3core!?Dpciephy disabledphy@1c0e000"2qcom,sar2130p-qmp-gen3x2-pcie-phy (!)!+c!-!/auxcfg_ahbrefrchngpipe,! 3phy!-!Vpcie1_pipe_clk disabledshwlock@1f400002qcom,tcsr-mutexsclock-controller@1fc00002qcom,sar2130p-tcsrsysconVscremoteproc@30000002qcom,sar2130p-adsp-pas<fgggg#wdogfatalreadyhandoverstop-ackxo$$lcxlmxhijstopokay-qcom/sar2130p/adsp.mbnglink-edge /;lpassEgpr 2qcom,gpr Aadsp_appsUa service@1 2qcom,q6apmnavs/audiomsm/adsp/audio_pddais2qcom,q6apm-dais  bedais2qcom,q6apm-lpass-daisnservice@2 2qcom,q6prmavs/audiomsm/adsp/audio_pdclock-controller2qcom,q6prm-lpass-clocksVfastrpc 2qcom,fastrpcAfastrpcglink-apps-dsp;adsp compute-cb@32qcom,fastrpc-compute-cb  compute-cb@42qcom,fastrpc-compute-cb  compute-cb@52qcom,fastrpc-compute-cb  compute-cb@62qcom,fastrpc-compute-cb  gpu@3d000002qcom,adreno-621.0qcom,adreno0 #kgsl_3d0_reg_memorycx_memcx_dbgc , klmn speed_binokayszap-shadero-qcom/sar2130p/a620_zap.mbnopp-table2operating-points-v2slopp-8430000002?(opp-780000000.}opp-644000000&bopp-570000000!opp-450000000topp-320000000@opp-2350000008gmu@3d6a000&2qcom,adreno-gmu-621.0qcom,adreno-gmu0֠P )gmursccgmu_pdc01hfigmu0ppp!!p ahbgmucxoaximemnochubppcxgx kiqsmopp-table2operating-points-v2sqopp-220000000 @opp-550000000 Uclock-controller@3d900002qcom,sar2130p-gpucc!!Vspiommu@3da0000B2qcom,sar2130p-smmu-500qcom,adreno-smmuqcom,smmu-500arm,mmu-500l p !!phlosbusifaceahbpskphy@88e300082qcom,sar2130p-snps-eusb2-phyqcom,sm8550-snps-eusb2-phy0Tcref,!okayde?rsvphy@88e80002qcom,sar2130p-qmp-usb3-dp-phy0 !k!m!nauxrefcom_auxusb3_pipe!,!! 3phycommonV'okayessports port@0endpointport@1endpoint:tswport@2endpoint:ususb@a6f88002qcom,sar2130p-dwc3qcom,dwc3 o 0! !e!!j!gc&cfg_noccoreifacesleepmock_utmixo!g!e$ D^]fff<pwr_evenths_phy_irqdp_hs_phy_irqdm_hs_phy_irqss_phy_irq!+,!0"#"usb-ddrapps-usbokayusb@a600000 2snps,dwc3 ` [   ?vDusb2-phyusb3-phyJ_s ports port@0endpointport@1endpoint:wstdisplay-subsystem@ae000002qcom,sar2130p-mdss mdss S| x!!x=,xx0y"#mdp0-memcpu-cfg    disabledszdisplay-controller@ae010002qcom,sar2130p-dpu   mdpvbifz0!!xx@x=xI!busnrt_busifacelutcorevsync$xI${ports port@0endpoint:|sport@1endpoint:}sport@2endpoint:~sopp-table2operating-points-v2s{opp-200000000 *opp-325000000_@opp-514000000displayport-controller@ae90000 2qcom,sar2130p-dpqcom,sm8350-dpP     z (xx xxx;core_ifacecore_auxctrl_linkctrl_link_ifacestream_pixelxx+?Ddpn$ disabledports port@0endpoint:s~port@1endpoint:suopp-table2operating-points-v2sopp-162000000 opp-270000000߀*opp-540000000 /opp-8100000000G+dsi@ae94000*2qcom,sar2130p-dsi-ctrlqcom,mdss-dsi-ctrl @ dsi_ctrlz0xxxBx8x!$bytebyte_intfpixelcoreifacebus$xxC+?Ddsi  disabledports port@0endpoint:s|port@1endpointopp-table2operating-points-v2sopp-187500000 -*opp-300000000opp-358000000V+phy@ae950002qcom,sar2130p-dsi-phy-5nm0 P R Udsi_phydsi_phy_lanedsi_pllx ifacerefV disabledsdsi@ae96000*2qcom,sar2130p-dsi-ctrlqcom,mdss-dsi-ctrl ` dsi_ctrlz0xx xDx:x!$bytebyte_intfpixelcoreifacebus$x xE+?Ddsi  disabledports port@0endpoint:s}port@1endpointphy@ae970002qcom,sar2130p-dsi-phy-5nm0 p r udsi_phydsi_phy_lanedsi_pllx ifacerefV disabledsclock-controller@af000002qcom,sar2130p-dispcc d!$Vsxinterrupt-controller@b2200002qcom,sar2130p-pdcqcom,pdc "@d0B^^a}?~ |sfpower-management@c300000%2qcom,sar2130p-aoss-qmpqcom,aoss-qmp 0 /Vsithermal-sensor@c263000"2qcom,sar2130p-tsensqcom,tsens-v2 &0 " Ruplowcritical`ssram@c3f00002qcom,rpmh-stats ?arbiter@c40000082qcom,sar2130p-spmi-pmic-arbqcom,x1e80100-spmi-pmic-arb0 @0 P@ Dcorechnlsobsrvrv~ spmi@c42d000 B@ L cnfgintr periph_irq f| pmic@02qcom,pm8150qcom,spmi-pmic pon@8002qcom,pm8998-ponpwrkey2qcom,pm8941-pwrkey= tokayresin2qcom,pm8941-resin= okayrtemp-alarm@24002qcom,spmi-temp-alarm$$thermal`sadc@31002qcom,spmi-adc51 1schannel@0;ref_gndchannel@1 ;vref_1p25channel@6 ;die_tempchannel@4cL ;xo_thermchannel@4dM ;skin_thermchannel@4eN ;wifi_thermadc-tm@35002qcom,spmi-adc-tm555` okaysxo-therm@0L skin-therm@1M wifi-therm@2N rtc@60002qcom,pm8941-rtc`a rtcalarmagpio@c000 2qcom,pm8150-gpioqcom,spmi-gpio ( 8  D|spmic@12qcom,pm8150qcom,spmi-pmic mailbox@ed180002qcom,sar2130p-ipccqcom,ipccр | Pspinctrl@f1000002qcom,sar2130p-tlmm0  ( D| 8P \fsPqup-i2c0-data-clk-state jgpio0gpio1 oqup0 xs-qup-i2c1-data-clk-state jgpio2gpio3 oqup1 xs1qup-i2c2-data-clk-state jgpio22gpio23 oqup2 xs4qup-i2c3-data-clk-state jgpio16gpio17 oqup3 xs7qup-i2c4-data-clk-state jgpio20gpio21 oqup4 xs:qup-i2c5-data-clk-state jgpio95gpio96 oqup5 xs=qup-i2c6-data-clk-state jgpio91gpio92 oqup6 xs@qup-i2c7-data-clk-state jgpio8gpio9 oqup7 xsDqup-i2c8-data-clk-state jgpio8gpio9 oqup8 xsOqup-i2c9-data-clk-state jgpio109gpio110 oqup9 xsUqup-i2c10-data-clk-state jgpio4gpio5 oqup10 xsXqup-i2c11-data-clk-state jgpio28gpio30 oqup11 xs[qup-spi0-cs0-state jgpio3 oqup0 x s0qup-spi0-cs1-state jgpio93 oqup0 x qup-spi0-data-clk-state jgpio0gpio1gpio2 oqup0 x s/qup-spi1-cs-state jgpio62 oqup1 x s3qup-spi1-data-clk-state jgpio2gpio3gpio61 oqup1 x s2qup-spi2-cs-state jgpio13 oqup2 x s6qup-spi2-data-clk-state jgpio22gpio23gpio12 oqup2 x s5qup-spi3-cs0-state jgpio19 oqup3 x s9qup-spi3-cs1-state jgpio41 oqup3 x qup-spi3-data-clk-state jgpio16gpio17gpio18 oqup3 x s8qup-spi4-cs0-state jgpio23 oqup4 x s<qup-spi4-cs1-state jgpio94 oqup4 x qup-spi4-data-clk-state jgpio20gpio21gpio22 oqup4 x s;qup-spi5-cs-state jgpio98 oqup5 x s?qup-spi5-data-clk-state jgpio95gpio96gpio97 oqup5 x s>qup-spi6-cs-state jgpio63 oqup6 x sCqup-spi6-data-clk-state jgpio91gpio92gpio64 oqup6 x sBqup-spi7-cs-state jgpio27 oqup7 x sFqup-spi7-data-clk-state jgpio24gpio25gpio26 oqup7 x sEqup-spi8-cs-state jgpio11 oqup8 x sTqup-spi8-data-clk-state jgpio8gpio9gpio10 oqup8 x sSqup-spi9-cs-state jgpio35 oqup9 x sWqup-spi9-data-clk-state jgpio109gpio110gpio34 oqup9 x sVqup-spi10-cs-state jgpio7 oqup10 x sZqup-spi10-data-clk-state jgpio4gpio5gpio6 oqup10 x sYqup-spi11-cs-state jgpio15 oqup11 x s]qup-spi11-data-clk-state jgpio28gpio30gpio14 oqup11 x s\qup-uart7-default-statesGcts-pins jgpio24 oqup7 x rts-pins jgpio25 oqup7 x rx-pins jgpio27 oqup7 x tx-pins jgpio26 oqup7 xqup-uart11-default-state jgpio14gpio15 oqup11 x s^sdc1-default-states&clk-pins jsdc1_clk x cmd-pins jsdc1_cmd x data-pins jsdc1_data x rclk-pins jsdc1_rclk sdc1-sleep-states'clk-pins jsdc1_clk x cmd-pins jsdc1_cmd xdata-pins jsdc1_data xrclk-pins jsdc1_rclk bt-enable-state jgpio46 ogpio x spcie0-default-states`perst-pins jgpio55 ogpio x clkreq-pins jgpio56 opcie0_clkreqn xwake-pins jgpio57 ogpio xpcie1-default-stateperst-pins jgpio58 ogpio x clkreq-pins jgpio59 opcie1_clkreqn xwake-pins jgpio60 ogpio xwlan-enable-state jgpio45 ogpio x siommu@1500000012qcom,sar2130p-smmu-500qcom,smmu-500arm,mmu-500Aabcdefghijklmnopqrstuv;<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYs interrupt-controller@17200000 2arm,gic-v3|    &   smsi-controller@172400002arm,gic-v3-its$  rsc@17a00000 ;apps_rsc2qcom,rpmh-rsc0drv-0drv-1drv-2$   bcm-voter2qcom,bcm-votersclock-controller2qcom,sar2130p-rpmh-clkVxospower-controller2qcom,sar2130p-rpmhpds$opp-table2operating-points-v2sopp1opp20opp38sopp4@s*opp5sopp6sopp7s+opp8sopp9regulators-02qcom,pm8150-rpmh-regulators a " 0 > L Z h v       smps6 vreg_s4a_0p95 ~ .P Fssmps5 vreg_s5a_1p88 R .  Fsldo1 vreg_l1a_0p91   .  Fssldo2 vreg_l2a_3p1 .@ .6 FsQldo3 vreg_l3a_1p2 O . Fseldo5 vreg_l5a_1p13 6@ .P Fldo6 vreg_l6a_0p6  ' .  Fldo7 vreg_l7a_1p8 w@ .0 Fs)ldo8 vreg_l8a_0p88  m .~ Fsdldo10 vreg_l10a_2p95 - @ .6 Fs(ldo12 vreg_l12a_1p8 w@ . Fldo14 vreg_l14a_1p8 w@ . Fldo15 vreg_l15a_1p8 w@ .w@ FsRldo17 vreg_l17a_3p26 0 .6 Fldo18 vreg_l18a_1p2 O . Fcpufreq@17d91000-2qcom,sar2130p-cpufreq-epssqcom,cpufreq-epss freq-domain0! xoalternate  dcvsh-irq-0 ]Vsinterconnect@191000002qcom,sar2130p-gem-noc s"cache-controller@192000002qcom,sar2130p-llcc` 0llcc0_basellcc1_basellcc_broadcast_basellcc_broadcast_and_basellcc_scratchpad_broadcast_basellcc_scratchpad_broadcast_and_base  qfprom@221c8000!2qcom,sar2130p-qfpromqcom,qfprom"  pgpu-speed-bin@119 zsninterconnect@320c00002qcom,sar2130p-nsp-noc2 interconnect@3c400002qcom,sar2130p-lpass-ag-noctimer2arm,armv8-timer0   thermal-zonesaoss0-thermal tripstrip-point0 8 Ehotaoss0-critical H  Ecriticalcpu0-thermal tripstrip-point0  'Epassivestrip-point1 8 Epassivescpu0-critical H  Ecriticalcooling-mapsmap0 0 map1 0 cpu1-thermal tripstrip-point0  'Epassivestrip-point1 8 Epassivescpu1-critical H  Ecriticalcooling-mapsmap0 0 map1 0 cpu2-thermal tripstrip-point0  'Epassivestrip-point1 8 Epassivescpu2-critical H  Ecriticalcooling-mapsmap0 0 map1 0 cpu3-thermal tripstrip-point0  'Epassivesrip-point1 8 Epassivescpu3-critical H  Ecriticalcooling-mapsmap0 0 map1 0 gpuss0-thermal  cooling-mapsmap0  tripstrip-point0 L Epassivestrip-point1 _ Ehottrip-point2 8  Ecriticalgpuss1-thermal  cooling-mapsmap0  tripstrip-point0 L Epassivestrip-point1 _ Ehottrip-point2 8  Ecriticalnspss0-thermal tripstrip-point0 s Ehottrip-point1 8 Ehotnspss1-critical H  Ecriticalnspss1-thermal tripstrip-point0 s Ehottrip-point1 8 Ehotnspss2-critical H  Ecriticalnspss2-thermal  tripstrip-point0 s Ehottrip-point1 8 Ehotnspss2-critical H  Ecriticalvideo-thermal  tripstrip-point0 8 Ehotvideo-critical H  Ecriticalddr-thermal  tripstrip-point0 8 Ehotddr-critical H  Ecriticalcamera0-thermal  tripstrip-point0 8 Ehotcamera0-critical H  Ecriticalcamera1-thermal  tripstrip-point0 8 Ehotcamera1-critical H  Ecriticalmdmss-thermal tripstrip-point0 8 Ehotmdmss-critical H  Ecriticalpm8150-thermal d tripstrip0 s Epassivetrip1 8 Ehottrip2 6h  Ecriticalsar2130p-thermal tripsactive-config0   Ecriticalwifi-thermal tripsactive-config0  Epassivexo-thermal tripsactive-config0 P Epassivealiases$ /soc@0/geniqup@ac0000/serial@a94000$ /soc@0/geniqup@ac0000/serial@a84000! /soc@0/geniqup@ac0000/i2c@a88000! /soc@0/geniqup@ac0000/i2c@a90000 /soc@0/mmc@7c4000! /soc@0/geniqup@9c0000/spi@980000regulator-vph-pwr2regulator-fixed vph_pwr 8u  .8u  sregulator-ext-1p32regulator-fixed vph_ext_1p3   .   sregulator-s10a-0p892regulator-fixed vph_s10a_0p89   .   swcn7850-pmu2qcom,wcn7850-pmu"default P- %P. 5R3 Bpregulatorsldo0 vreg_pmu_rfa_cmnsHldo1 vreg_pmu_aon_0p59sIldo2 vreg_pmu_wlcx_0p8sJldo3 vreg_pmu_wlmx_0p85sKldo4 vreg_pmu_btcmx_0p85ldo5 vreg_pmu_rfa_0p8sLldo6 vreg_pmu_rfa_1p2sMldo7 vreg_pmu_rfa_1p8sNldo8 vreg_pmu_pcie_0p9saldo9 vreg_pmu_pcie_1p8sb interrupt-parent#address-cells#size-cellsmodelcompatiblechassis-typestdout-path#clock-cellsclock-frequencyphandledevice_typeregclocksenable-methodnext-level-cacheqcom,freq-domainpower-domainspower-domain-names#cooling-cellscache-levelcache-unifiedcpuentry-methodidle-state-namearm,psci-suspend-paramentry-latency-usexit-latency-usmin-residency-uslocal-timer-stopqcom,dload-modeinterconnects#interconnect-cellsqcom,bcm-votersinterrupts#power-domain-cellsdomain-idle-statesrangesno-maphwlocksqcom,smeminterrupts-extendedmboxesqcom,local-pidqcom,remote-pidqcom,entry-name#qcom,smem-state-cellsinterrupt-controller#interrupt-cellsdma-ranges#reset-cellsreg-namesiommusinterrupt-namesclock-namesinterconnect-namesoperating-points-v2pinctrl-0pinctrl-1pinctrl-namesbus-widthnon-removablesupports-cqemmc-ddr-1_8vmmc-hs200-1_8vmmc-hs400-1_8vmmc-hs400-enhanced-strobestatusvmmc-supplyvqmmc-supplyopp-hzrequired-oppsopp-peak-kBpsopp-avg-kBps#dma-cellsdma-channelsdma-channel-maskdmasdma-namesvddrfacmn-supplyvddaon-supplyvddwlcx-supplyvddwlmx-supplyvddrfa0p8-supplyvddrfa1p2-supplyvddrfa1p8-supplymax-speedreset-gpiosvdd3v3-supplyvdd1v8-supply#phy-cellsbus-rangedma-coherentlinux,pci-domainnum-lanesinterrupt-map-maskinterrupt-mapiommu-mapresetsreset-namesphysphy-namesperst-gpioswake-gpiosvddpcie0p9-supplyvddpcie1p8-supplyassigned-clocksassigned-clock-ratesclock-output-namesvdda-phy-supplyvdda-pll-supply#hwlock-cellsmemory-regionqcom,qmpqcom,smem-statesqcom,smem-state-namesfirmware-namelabelqcom,glink-channelsqcom,domainqcom,intents#sound-dai-cellsqcom,protection-domainqcom,non-secure-domainqcom,gmunvmem-cellsnvmem-cell-namesopp-levelopp-supported-hw#iommu-cells#global-interruptsvdd-supplyvdda12-supplyorientation-switchremote-endpointsnps,has-lpm-erratumsnps,hird-thresholdsnps,is-utmi-l1-suspendsnps,dis-u1-entry-quirksnps,dis-u2-entry-quirksnps,dis_u2_susphy_quirksnps,dis_u3_susphy_quirksnps,parkmode-disable-ss-quirktx-fifo-resizeusb-role-switchassigned-clock-parentsqcom,pdc-ranges#qcom,sensors#thermal-sensor-cellsqcom,eeqcom,channeldebouncebias-pull-uplinux,codeio-channelsio-channel-names#io-channel-cellsqcom,pre-scalingqcom,ratiometricqcom,hw-settle-timeqcom,hw-settle-time-usgpio-controllergpio-ranges#gpio-cells#mbox-cellswakeup-parentpinsfunctiondrive-strengthbias-disablebias-pull-down#redistributor-regionsredistributor-stridemsi-controller#msi-cellsqcom,tcs-offsetqcom,drv-idqcom,tcs-configqcom,pmic-idvdd-s1-supplyvdd-s2-supplyvdd-s3-supplyvdd-s4-supplyvdd-s5-supplyvdd-s6-supplyvdd-s7-supplyvdd-s8-supplyvdd-s9-supplyvdd-s10-supplyvdd-l1-l8-l11-supplyvdd-l3-l4-l5-l18-supplyvdd-l6-l9-supplyvdd-l7-l12-l14-l15-supplyregulator-nameregulator-min-microvoltregulator-max-microvoltregulator-initial-mode#freq-domain-cellsread-onlybitsthermal-sensorstemperaturehysteresistripcooling-devicepolling-delay-passiveserial0serial1i2c0i2c1mmc1spi0regulator-always-onvin-supplywlan-enable-gpiosbt-enable-gpiosvddio-supplyvdddig-supply