&h8( ,Microsoft Surface Pro 9 5G2microsoft,arcataqcom,sc8280xpclocksxo-board-clk 2fixed-clock=JIZsleep-clk 2fixed-clock=JZ.cpus cpu@0bcpu2arm,cortex-a78cnrypsci%psci Zl2-cache2cache(4Zl3-cache2cache(4Zcpu@100bcpu2arm,cortex-a78cnrypsci% psci Zl2-cache2cache(4Zcpu@200bcpu2arm,cortex-a78cnrypsci%  psci Zl2-cache2cache(4Z cpu@300bcpu2arm,cortex-a78cnrypsci%  psci Zl2-cache2cache(4Z cpu@400bcpu2arm,cortex-x1cnrypsciNpsci Zl2-cache2cache(4Zcpu@500bcpu2arm,cortex-x1cnrypsciNpsci Zl2-cache2cache(4Zcpu@600bcpu2arm,cortex-x1cnrypsciNpsci Zl2-cache2cache(4Zcpu@700bcpu2arm,cortex-x1cnrypsciNpsci Zl2-cache2cache(4Zcpu-mapcluster0core0Bcore1Bcore2Bcore3Bcore4Bcore5Bcore6Bcore7Bidle-statesFpscicpu-sleep-0-02arm,idle-stateSlittle-rail-power-collapsec@zc^Z&cpu-sleep-1-02arm,idle-stateSbig-rail-power-collapsec@zZ'domain-idle-statescluster-sleep-02domain-idle-statecADz 'Z(firmwarescm2qcom,scm-sc8280xpqcom,scm  !0Zinterconnect-aggre1-noc2qcom,sc8280xp-aggre1-noc"Z:interconnect-aggre2-noc2qcom,sc8280xp-aggre2-noc"Zinterconnect-clk-virt2qcom,sc8280xp-clk-virt"Z7interconnect-config-noc2qcom,sc8280xp-config-noc"Z9interconnect-dc-noc2qcom,sc8280xp-dc-noc"Zinterconnect-gem-noc2qcom,sc8280xp-gem-noc"Z8interconnect-lpass-ag-noc2qcom,sc8280xp-lpass-ag-noc"Zinterconnect-mc-virt2qcom,sc8280xp-mc-virt"Z interconnect-mmss-noc2qcom,sc8280xp-mmss-noc"Zinterconnect-nspa-noc2qcom,sc8280xp-nspa-noc"Zinterconnect-nspb-noc2qcom,sc8280xp-nspb-noc"Zinterconnect-system-noc2qcom,sc8280xp-system-noc"Zmemory@80000000bmemorynopp-table-cpu02operating-points-v2Zopp-300000000|opp-403200000Xopp-4992000000`opp-595200000#z@opp-691200000)2H opp-8064000000wopp-9024000005Ɉopp-1017600000Hopp-1171200000E;opp-1286400000Ljopp-1401600000Sopp-1516800000ZhȀopp-1632000000aFXopp-1747200000h$(9opp-1862400000o9opp-1977600000u9opp-2073600000{9opp-2169600000Qx9opp-2284800000/H9opp-2400000000 9opp-24960000009opp-2592000000~9opp-268800000079opp-2803200000p9opp-2899200000H9opp-2995200000 9opp-table-qup100mhz2operating-points-v2Z;opp-75000000xh#opp-100000000$pmu2arm,armv8-pmuv3 psci 2arm,psci-1.0smcpower-domain-cpu0*%>&Zpower-domain-cpu1*%>&Z power-domain-cpu2*%>&Z power-domain-cpu3*%>&Z power-domain-cpu4*%>'Zpower-domain-cpu5*%>'Zpower-domain-cpu6*%>'Zpower-domain-cpu7*%>'Zpower-domain-cpu-cluster0*>(Z%reserved-memory Qreserved-region@80000000nXcmd-db-region@80860000 2qcom,cmd-dbnXZreserved-region@80880000nXsmem-region@80900000 2qcom,smemn X_)Zreserved-region@80b00000nXreserved-region@83b00000npXreserved-region@85b00000nXadsp-region@86c00000nXZYslpi-region@88c00000nPXZUcdsp0-region@8a100000nXZcdsp1-region@8c600000n`XZreserved-region@aeb00000n`Xgpu-mem@8bf00000n XZklinux,cma2shared-dma-poolglusmp2p-adsp 2qcom,smp2p* *master-kernelmaster-kernelZZslave-kernel slave-kernelZXsmp2p-nsp0 2qcom,smp2p^* *master-kernelmaster-kernelZslave-kernel slave-kernelZsmp2p-nsp1 2qcom,smp2pih* * master-kernelmaster-kernelZslave-kernel slave-kernelZsmp2p-slpi 2qcom,smp2p* *master-kernelmaster-kernelZWslave-kernel slave-kernelZTsoc@0 2simple-bus QZethernet@200002qcom,sc8280xp-ethqos n`#stmmacethrgmii r+3+8+4+6-stmmacethpclkptp_refrgmii9macirqeth_lpi I,+ PY bp ~disabledZclock-controller@1000002qcom,gcc-sc8280xpn=*r-./0123456Z+mailbox@4080002qcom,sc8280xp-ipccqcom,ipccn@ Z*efuse@784000!2qcom,sc8280xp-qfpromqcom,qfpromnx@0 Zgpu-speed-bin@18bnZgeniqup@8c00002qcom,geni-se-qupn r++ -m-ahbs-ahb I, Q~okayZi2c@8800002qcom,geni-i2cn@ r+-se u6H 7789.: qup-corequp-configqup-memory ~disabledZspi@8800002qcom,geni-spin@ r+-se u6H 7789.: qup-corequp-configqup-memory ~disabledZi2c@8840002qcom,geni-i2cn@@ r+-se G6H 7789.: qup-corequp-configqup-memory ~disabledZspi@8840002qcom,geni-spin@@ r+-se G6H 7789.: qup-corequp-configqup-memory ~disabledZserial@8840002qcom,geni-uartn@@r+-se G;60 7789.qup-corequp-config ~disabledZi2c@8880002qcom,geni-i2cn@ r+-se H6H 7789.: qup-corequp-configqup-memory ~disabledZspi@8880002qcom,geni-spin@ r+-se H6H 7789.: qup-corequp-configqup-memory ~disabledZserial@8880002qcom,geni-uartn@r+-se H;60 7789.qup-corequp-config<default~okayZembedded-controller2microsoft,surface-sam =U= >defaulti2c@88c0002qcom,geni-i2cn@ r+-se I6H 7789.: qup-corequp-configqup-memory ~disabledZspi@88c0002qcom,geni-spin@ r+-se I6H 7789.: qup-corequp-configqup-memory ~disabledZi2c@8900002qcom,geni-i2cn@ r+-se J6H 7789.: qup-corequp-configqup-memory ~disabledZspi@8900002qcom,geni-spin@ r+-se J6H 7789.: qup-corequp-configqup-memory ~disabledZi2c@8940002qcom,geni-i2cn@@-ser+ K 6H 7789.: qup-corequp-configqup-memory ~disabledZspi@8940002qcom,geni-spin@@ r+-se K6H 7789.: qup-corequp-configqup-memory ~disabledZi2c@8980002qcom,geni-i2cn@ -ser+ A6H 7789.: qup-corequp-configqup-memory ~disabledZ spi@8980002qcom,geni-spin@ r+-se A6H 7789.: qup-corequp-configqup-memory ~disabledZ i2c@89c0002qcom,geni-i2cn@ -ser+ B6H 7789.: qup-corequp-configqup-memory ~disabledZ spi@89c0002qcom,geni-spin@ r+-se B6H 7789.: qup-corequp-configqup-memory ~disabledZ geniqup@9c00002qcom,geni-se-qupn`r++ -m-ahbs-ahb I,c Q~okayZ i2c@9800002qcom,geni-i2cn@ -ser+ Y6H 7789,: qup-corequp-configqup-memory ~disabledZspi@9800002qcom,geni-spin@ r+-se Y6H 7789,: qup-corequp-configqup-memory ~disabledZi2c@9840002qcom,geni-i2cn@@ -ser+ Z6H 7789,: qup-corequp-configqup-memory ~disabledZspi@9840002qcom,geni-spin@@ r+-se Z6H 7789,: qup-corequp-configqup-memory ~disabledZi2c@9880002qcom,geni-i2cn@ -ser+ [6H 7789,: qup-corequp-configqup-memory ~disabledZspi@9880002qcom,geni-spin@ r+-se [6H 7789,: qup-corequp-configqup-memory ~disabledZserial@9880002qcom,geni-uartn@r+-se [;60 7789,qup-corequp-config~okay?defaultZbluetooth2qcom,wcn6855-bt@AA AB-C>0 H= U=Ddefaulti2c@98c0002qcom,geni-i2cn@ -ser+ \6H 7789,: qup-corequp-configqup-memory ~disabledZspi@98c0002qcom,geni-spin@ r+-se \6H 7789,: qup-corequp-configqup-memory ~disabledZi2c@9900002qcom,geni-i2cn@-ser+ ] 6H 7789,: qup-corequp-configqup-memory ~disabledZspi@9900002qcom,geni-spin@ r+-se ]6H 7789,: qup-corequp-configqup-memory ~disabledZi2c@9940002qcom,geni-i2cn@@ -ser+ ^6H 7789,: qup-corequp-configqup-memory ~disabledZspi@9940002qcom,geni-spin@@ r+-se ^6H 7789,: qup-corequp-configqup-memory ~disabledZi2c@9980002qcom,geni-i2cn@ -ser+ _6H 7789,: qup-corequp-configqup-memory ~disabledZspi@9980002qcom,geni-spin@ r+-se _6H 7789,: qup-corequp-configqup-memory ~disabledZi2c@99c0002qcom,geni-i2cn@ -ser+ `6H 7789,: qup-corequp-configqup-memory ~disabledZspi@99c0002qcom,geni-spin@ r+-se `6H 7789,: qup-corequp-configqup-memory ~disabledZgeniqup@ac00002qcom,geni-se-qupn`r++ -m-ahbs-ahb I, Q~okayZi2c@a800002qcom,geni-i2cn@ r+-se a6H 7789-: qup-corequp-configqup-memory ~disabledZ spi@a800002qcom,geni-spin@ r+-se a6H 7789-: qup-corequp-configqup-memory ~disabledZ!i2c@a840002qcom,geni-i2cn@@ r+-se b6H 7789-: qup-corequp-configqup-memory ~disabledZ"spi@a840002qcom,geni-spin@@ r+-se b6H 7789-: qup-corequp-configqup-memory ~disabledZ#i2c@a880002qcom,geni-i2cn@ r+-se c6H 7789-: qup-corequp-configqup-memory ~disabledZ$spi@a880002qcom,geni-spin@ r+-se c6H 7789-: qup-corequp-configqup-memory ~disabledZ%i2c@a8c0002qcom,geni-i2cn@ r+-se d6H 7789-: qup-corequp-configqup-memory ~disabledZ&spi@a8c0002qcom,geni-spin@ r+-se d6H 7789-: qup-corequp-configqup-memory ~disabledZ'i2c@a900002qcom,geni-i2cn@ r+-se e6H 7789-: qup-corequp-configqup-memory ~disabledZ(spi@a900002qcom,geni-spin@ r+-se e6H 7789-: qup-corequp-configqup-memory ~disabledZ)i2c@a940002qcom,geni-i2cn@@ r+-se f6H 7789-: qup-corequp-configqup-memory ~disabledZ*spi@a940002qcom,geni-spin@@ r+-se f6H 7789-: qup-corequp-configqup-memory ~disabledZ+i2c@a980002qcom,geni-i2cn@ r+-se C6H 7789-: qup-corequp-configqup-memory ~disabledZ,spi@a980002qcom,geni-spin@ r+-se C6H 7789-: qup-corequp-configqup-memory ~disabledZ-i2c@a9c0002qcom,geni-i2cn@ r+-se D6H 7789-: qup-corequp-configqup-memory ~disabledZ.spi@a9c0002qcom,geni-spin@ r+-se D6H 7789-: qup-corequp-configqup-memory ~disabledZ/rng@10d3000 2qcom,prng-een 0r--coreZ0pcie@1c00000xbpci2qcom,pcie-sc8280xp`n000 000#parfdbielbiatuconfigmhi 8Q0 0000blyE09msi0msi1msi2msi3Hr++++++&+ + +$Y-auxcfgbus_masterbus_slaveslave_q2addrss_sf_tbunoc_aggr_4noc_aggr_south_sfcnoc_qx+$0  89Qpcie-memcpu-pcie+ pci+F5pciephy~okay = =*GHdefaultZ1pcie@0bpcinb QZ2wifi@0 2pci17cb,1103n ;MS_SP9_5Gphy@1c06000"2qcom,sc8280xp-qmp-gen3x1-pcie-phyn` 0r++++W++$-auxcfg_ahbrefrchngpipepipediv2+W++#phy=Tpcie_4_pipe_clkg~okayrIJZ5pcie@1c08000xbpci2qcom,pcie-sc8280xp`n022 22#parfdbielbiatuconfigmhi 8Q2 2020blyE 09msi0msi1msi2msi3@r++++++&+ + Q-auxcfgbus_masterbus_slaveslave_q2addrss_sf_tbunoc_aggr_4noc_aggr_south_sf+$0  89Ppcie-memcpu-pcie+pci+F4pciephy ~disabledZ3pcie@0bpcinb QZ4phy@1c0e000"2qcom,sc8280xp-qmp-gen3x2-pcie-phyn 0r++++V++$-auxcfg_ahbrefrchngpipepipediv2+V++phy=Tpcie_3b_pipe_clkg ~disabledZ4pcie@1c10000xbpci2qcom,pcie-sc8280xp`n044 440#parfdbielbiatuconfigmhi 8Q4 4040blyE 089:v9msi0msi1msi2msi3 @r++++++&+ + Q-auxcfgbus_masterbus_slaveslave_q2addrss_sf_tbunoc_aggr_4noc_aggr_south_sf+$0  89Opcie-memcpu-pcie+pci+F3pciephy~okay = =*KLdefaultZ5pcie@0bpcinb QZ6phy@1c14000"2qcom,sc8280xp-qmp-gen3x4-pcie-phy n@ ` 0r++++U++$-auxcfg_ahbrefrchngpipepipediv2+U++phy !D=Tpcie_3a_pipe_clkg~okayrIJZ3pcie@1c18000xbpci2qcom,pcie-sc8280xp`n088 88#parfdbielbiatuconfigmhi 8Q8 8080blyE 023459msi0msi1msi2msi3w@r+t+v+w+}+~+&+ + Q-auxcfgbus_masterbus_slaveslave_q2addrss_sf_tbunoc_aggr_4noc_aggr_south_sf+t$0  89Npcie-memcpu-pcie+pci+F2pciephy ~disabledZ7pcie@0bpcinb QZ8phy@1c1e000"2qcom,sc8280xp-qmp-gen3x2-pcie-phyn 0r+t+v+h+T+y+|$-auxcfg_ahbrefrchngpipepipediv2+T++phy=Tpcie_2b_pipe_clkg ~disabledZ2pcie@1c20000xbpci2qcom,pcie-sc8280xp`n0<< <<0#parfdbielbiatuconfigmhi 8Q< <0<0blyE 0V   9msi0msi1msi2msi3@r+i+k+l+r+s+&+ + Q-auxcfgbus_masterbus_slaveslave_q2addrss_sf_tbunoc_aggr_4noc_aggr_south_sf+i$0  89Mpcie-memcpu-pcie+ pci+F1pciephy~okay = =*MNdefaultZ9pcie@0bpcinb QZ:phy@1c24000"2qcom,sc8280xp-qmp-gen3x4-pcie-phy n@ ` 0r+i+k+h+S+n+q$-auxcfg_ahbrefrchngpipepipediv2+S++phy !D=Tpcie_2a_pipe_clkg~okayrIJZ1ufshc@1d84000-2qcom,sc8280xp-ufshcqcom,ufshcjedec,ufs-2.0n@0  Oufsphy+1rst+F I,l@r+ + + +++++n-core_clkbus_aggr_clkiface_clkcore_clk_uniproref_clktx_lane0_sync_clkrx_lane0_sync_clkrx_lane1_sync_clk@xhxh ~disabledZPphy@1d870002qcom,sc8280xp-qmp-ufs-phynpr-++-refref_auxqref+Pufsphyg ~disabledZOufshc@1da4000-2qcom,sc8280xp-ufshcqcom,ufshcjedec,ufs-2.0n@0 }Qufsphy+0rst+ I,l@r++ ++ ++++n-core_clkbus_aggr_clkiface_clkcore_clk_uniproref_clktx_lane0_sync_clkrx_lane0_sync_clkrx_lane1_sync_clk@xhxh ~disabledZRphy@1da70002qcom,sc8280xp-qmp-ufs-phynpr-++-refref_auxqref+Rufsphyg ~disabledZQhwlock@1f400002qcom,tcsr-mutexnZ)syscon@1fc00002qcom,sc8280xp-tcsrsysconnZ!remoteproc@2400000,2qcom,sc8280xp-slpi-pasqcom,sm8350-slpi-pasn@<S TTTT#9wdogfatalreadyhandoverstop-ackr--xo66lcxlmxUVWstop ~disabledZ;glink-edge* *slpifastrpc 2qcom,fastrpcfastrpcglink-apps-dspsdsp. compute-cb@12qcom,fastrpc-compute-cbn I,!compute-cb@22qcom,fastrpc-compute-cbn I,"compute-cb@32qcom,fastrpc-compute-cbn I,#remoteproc@30000002qcom,sc8280xp-adsp-pasnLXXXXX09wdogfatalreadyhandoverstop-ackshutdown-ackr--xo66lcxlmxYVZstop~okay3Eqcom/sc8280xp/MICROSOFT/SurfacePro9/qcadsp8280.mbnZ<glink-edge* *lpassZ=gpr 2qcom,gpr adsp_appsS_ service@1 2qcom,q6apmnl}avs/audiomsm/adsp/audio_pdZdais2qcom,q6apm-dais I, Z>bedais2qcom,q6apm-lpass-daislZservice@2 2qcom,q6prmn}avs/audiomsm/adsp/audio_pdZ?clock-controller2qcom,q6prm-lpass-clocks=Z[rxmacro@32000002qcom,sc8280xp-lpass-rx-macron 4r[@[A[f[g\-mclknplmacrodcodecfsgen[@[A$$Tmclk=ldefault]~okayZ^soundwire@32100002qcom,soundwire-v1.6.0n!  r^-iface_swr_audio_cgcrRX  ,G_l ~okayZcodec@0,42sdw20217010d00n|Ztxmacro@32200002qcom,sc8280xp-lpass-tx-macron"default`4r[9[:[f[g\-mclknplmacrodcodecfsgen[9[:$$Tmclk=l~okayZccodec@32400002qcom,sc8280xp-lpass-wsa-macron$4r[B[C[f[g\-mclknplmacrodcodecfsgen[B[C$$=Tmclkldefaulta~okayZbsoundwire@3250000n% 2qcom,soundwire-v1.6.0 rb-iface_swr_audio_cgcrWSA??   ,_Gl ~okayZclock-controller@32a90002qcom,sc8280xp-lpassaudioccn*=Z_soundwire@33300002qcom,soundwire-v1.6.0n3  9corewakeuprc-ifacedswr_audio_cgcrTXl ,_G~okayZcodec@0,32sdw20217010d00nZcodec@33700002qcom,sc8280xp-lpass-va-macron70r[9[f[g[:-mclkmacrodcodecnpl [9$=Tfsgenl~okayefdefault@I>Z\pinctrl@33c0000 2qcom,sc8280xp-lpass-lpi-pinctrl n<Ugr[f[g -coreaudio~okayZgtx-swr-default-stateZ`clk-pinsgpio0 swr_tx_clkdata-pins gpio1gpio2 swr_tx_data(rx-swr-default-stateZ]clk-pinsgpio3 swr_rx_clkdata-pins gpio4gpio5 swr_rx_data(dmic01-default-stateZeclk-pinsgpio6 dmic1_clk6data-pinsgpio7 dmic1_dataBdmic01-sleep-stateZ@clk-pinsgpio6 dmic1_clkOdata-pinsgpio7 dmic1_dataZBdmic23-default-stateZfclk-pinsgpio8 dmic2_clk6data-pinsgpio9 dmic2_dataBdmic23-sleep-stateZAclk-pinsgpio8 dmic2_clkOdata-pinsgpio9 dmic2_dataZBwsa-swr-default-stateZaclk-pinsgpio10 wsa_swr_clkdata-pinsgpio11 wsa_swr_data(wsa2-swr-default-stateZBclk-pinsgpio15 wsa2_swr_clkdata-pinsgpio16wsa2_swr_data(clock-controller@33e00002qcom,sc8280xp-lpassccn> =Zdgpu@3d000002qcom,adreno-690.0qcom,adreno0n##kgsl_3d0_reg_memorycx_memcx_dbgc ,Ih h iij 8 gfx-mem~okayZopp-table2operating-points-v2Ziopp-270000000߀r@opp-410000000pr8opp-500000000er8opp-547000000 r8opp-606000000$Ӏr)opp-640000000&%r@)opp-655000000' r)opp-690000000) r)zap-shader ~disabled6k6Eqcom/sc8280xp/MICROSOFT/SurfacePro9/qcdxkmsuc8280.mbngmu@3d6a000&2qcom,adreno-gmu-690.0qcom,adreno-gmu0n֠@ )#gmursccgmu_pdc019hfigmu8rll+%+Mlll%-gmucxoaximemnocahbhubsmmu_votellcxgx Ih mZjopp-table2operating-points-v2Zmopp-200000000 r0opp-500000000erclock-controller@3d900002qcom,sc8280xp-gpuccnr-+J+K8-bi_tcxogcc_gpu_gpll0_clk_srcgcc_gpu_gpll0_div_clk_src6=*Zliommu@3da0000B2qcom,sc8280xp-smmu-500qcom,adreno-smmuqcom,smmu-500arm,mmu-500n|8r+M+Nlllll-gcc_gpu_memnoc_gfx_clkgcc_gpu_snoc_dvm_gfx_clkgpu_cc_ahb_clkgpu_cc_hlos1_vote_gpu_smmu_clkgpu_cc_cx_gmu_clkgpu_cc_hub_cx_int_clkgpu_cc_hub_aon_clkllZhmmc@8804000&2qcom,sc8280xp-sdhciqcom,sdhci-msm-v5n@9hc_irqpwr_irqr++--ifacecorexo+.0  89/sdhc-ddrcpu-sdhc I,6nl ~disabledZCopp-table2operating-points-v2Znopp-100000000#w@opp-202000000 FoRej @phy@88e500022qcom,sc8280xp-usb-hs-phyqcom,usb-snps-hs-5nm-phynPr--ref+,g~okaypqrZphy@88e700022qcom,sc8280xp-usb-hs-phyqcom,usb-snps-hs-5nm-phynpr+-ref+(g ~disabledZphy@88e800022qcom,sc8280xp-usb-hs-phyqcom,usb-snps-hs-5nm-phynr+-ref+)g ~disabledZphy@88e900022qcom,sc8280xp-usb-hs-phyqcom,usb-snps-hs-5nm-phynr+-ref+*g ~disabledZphy@88ea00022qcom,sc8280xp-usb-hs-phyqcom,usb-snps-hs-5nm-phynr+-ref++g ~disabledZphy@88eb0002qcom,sc8280xp-qmp-usb43dp-phyn@ r+=+`+?+@-auxrefcom_auxusb3_pipe+ +9+F phycommon=g~okayrpJZ/ports port@0nendpointsZport@1nendpointtZport@2nendpointuZphy@88ef0002qcom,sc8280xp-qmp-usb3-uni-phyn  r+6+4+8+9-auxrefcom_auxpipe+;+? phyphy_phy+ =Tusb2_phy0_pipe_clkg ~disabledZphy@88f10002qcom,sc8280xp-qmp-usb3-uni-phyn  r+6+5+8+;-auxrefcom_auxpipe+<+@ phyphy_phy+ =Tusb2_phy1_pipe_clkg ~disabledZphy@890200022qcom,sc8280xp-usb-hs-phyqcom,usb-snps-hs-5nm-phyn gr--ref+-~okayvqwZphy@89030002qcom,sc8280xp-qmp-usb43dp-phyn0@ r+B+^+D+E-auxrefcom_auxusb3_pipe+ +:+B phycommon=g~okayrvxZ0ports port@0nendpointyZport@1nendpointzZport@2nendpoint{Zphy@8909a002qcom,sc8280xp-dp-phy@nr|| -auxcfg_ahb6 =g ~disabledZphy@890ca002qcom,sc8280xp-dp-phy@nr|| -auxcfg_ahb6 =g ~disabledZpmu@909100002qcom,sc8280xp-llcc-bwmonqcom,sc7280-llcc-bwmonn  Q  }opp-table2operating-points-v2Z}opp-0 opp-1>opp-2popp-3'opp-4,hopp-5;0Xopp-6N(opp-7Zopp-8ci8opp-9yopp-10|%@opp-11Aopp-12pmu@90b6400*2qcom,sc8280xp-cpu-bwmonqcom,sdm845-bwmonn d E 88~opp-table2operating-points-v2Z~opp-0"opp-1Eopp-2l}popp-3opp-4opp-59`opp-6ёsystem-cache-controller@92000002qcom,sc8280xp-llccn  ( 0 8 @ H P X `l#llcc0_basellcc1_basellcc2_basellcc3_basellcc4_basellcc5_basellcc6_basellcc7_basellcc_broadcast_base Fusb@a4f8800 2qcom,sc8280xp-dwc3-mpqcom,dwc3n O QHr++ + +%+"++++R-cfg_noccoreifacesleepmock_utminoc_aggrnoc_aggr_northnoc_aggr_southnoc_sys+"+ $ YX\[SS~SSSSSSSS9pwr_event_1pwr_event_2pwr_event_3pwr_event_4hs_phy_1hs_phy_2hs_phy_3hs_phy_4dp_hs_phy_1dm_hs_phy_1dp_hs_phy_2dm_hs_phy_2dp_hs_phy_3dm_hs_phy_3dp_hs_phy_4dm_hs_phy_4ss_phy_1ss_phy_2+ F+40 : 89;usb-ddrapps-usb ~disabledZDusb@a400000 2snps,dwc3n @  I,*usb2-0usb3-0usb2-1usb3-1usb2-2usb2-3 host  ZEusb@a6f88002qcom,sc8280xp-dwc3qcom,dwc3n o QHr+ +&++++(++++R-cfg_noccoreifacesleepmock_utminoc_aggrnoc_aggr_northnoc_aggr_southnoc_sys+(+&$ D$%SSS<9pwr_evenths_phy_irqdp_hs_phy_irqdm_hs_phy_irqss_phy_irq+ F+50 : 899usb-ddrapps-usb~okayZFusb@a600000 2snps,dwc3n ` # I,  /usb2-phyusb3-phy   hostZGports port@0nendpointZport@1nendpointZtusb@a8f88002qcom,sc8280xp-dwc3qcom,dwc3n  QHr+!+,++1+.++++R-cfg_noccoreifacesleepmock_utminoc_aggrnoc_aggr_northnoc_aggr_southnoc_sys+.+,$ D+S S S<9pwr_evenths_phy_irqdp_hs_phy_irqdm_hs_phy_irqss_phy_irq+ F+60 : 89:usb-ddrapps-usb~okayZHusb@a800000 2snps,dwc3n  * I,` 0usb2-phyusb3-phy   hostZIports port@0nendpointZport@1nendpointZzcci@ac4a000#2qcom,sc8280xp-cciqcom,msm8996-ccin Ġ  r"%-camnoc_axislow_ahb_srccpas_ahbcci 8defaultsleep  ~disabledZJi2c-bus@0nJB@ ZKi2c-bus@1nJB@ ZLcci@ac4b000#2qcom,sc8280xp-cciqcom,msm8996-ccin İ  r"%-camnoc_axislow_ahb_srccpas_ahbcci 8defaultsleep  ~disabledZMi2c-bus@0nJB@ ZNi2c-bus@1nJB@ ZOcci@ac4c000#2qcom,sc8280xp-cciqcom,msm8996-ccin   r"%-camnoc_axislow_ahb_srccpas_ahbcci 8defaultsleep  ~disabledZPi2c-bus@0nJB@ ZQi2c-bus@1nJB@ ZRcci@ac4d000#2qcom,sc8280xp-cciqcom,msm8996-ccin   r"%-camnoc_axislow_ahb_srccpas_ahbcci 8defaultsleep  ~disabledZSi2c-bus@0nJB@ ZTi2c-bus@1nJB@ ZUcamss@ac5a0002qcom,sc8280xp-camss@n Š P p @ 0 `@ ˠ @  @@ ̀ ̰@  @ ` ͐@  @ @#csiphy2csiphy3csiphy0csiphy1vfe0csid0vfe1csid1vfe2csid2vfe_lite0csid0_litevfe_lite1csid1_litevfe_lite2csid2_litevfe_lite3csid3_litevfe3csid3gh9csid1_litevfe_lite1csiphy3csid0vfe0csid1vfe1csid0_litevfe_lite0csiphy0csiphy1csiphy2csid2vfe2csid3_litecsid2_litevfe_lite3vfe_lite2csid3vfe3(ife0ife1ife2ife3top@r",$-&.(/*5689<=?@CDFGJKMNQSTVXY[]^`bc++-camnoc_axicpas_ahbcsiphy0csiphy0_timercsiphy1csiphy1_timercsiphy2csiphy2_timercsiphy3csiphy3_timervfe0_axivfe0vfe0_cphy_rxvfe0_csidvfe1_axivfe1vfe1_cphy_rxvfe1_csidvfe2_axivfe2vfe2_cphy_rxvfe2_csidvfe3_axivfe3vfe3_cphy_rxvfe3_csidvfe_lite0vfe_lite0_cphy_rxvfe_lite0_csidvfe_lite1vfe_lite1_cphy_rxvfe_lite1_csidvfe_lite2vfe_lite2_cphy_rxvfe_lite2_csidvfe_lite3vfe_lite3_cphy_rxvfe_lite3_csidgcc_axi_hfgcc_axi_sfI, , , @, `, , , , ,$,$ ,$@,$`,$,$,$,$` 89   0cam_ahbcam_hf_mnoccam_sf_mnoccam_sf_icp_mnoc ~disabledZVports port@0n port@1n port@2n port@3n clock-controller@ad000002qcom,sc8280xp-camccn r+--.6#=*Zdisplay-subsystem@ae000002qcom,sc8280xp-mdssn #mdssr+-<-ifaceahbcore S0   mdp0-memmdp1-mem I, Q~okayZdisplay-controller@ae010002qcom,sc8280xp-dpu n  0 #mdpvbif0r+.+/?<K!-busnrt_busifacelutcorevsync6K$ZWports port@0nendpointZport@4nendpointZport@5nendpointZport@6nendpointZopp-table2operating-points-v2Zopp-200000000 #opp-300000000$opp-375000000Z oopp-500000000eFopp-600000000#Fdisplayport-controller@ae900002qcom,sc8280xp-dpPn      (r;-core_ifacecore_auxctrl_linkctrl_link_ifacestream_pixel B///dpl6~okayZXports port@0nendpointZport@1nendpoint YZuopp-table2operating-points-v2Zopp-160000000 h#opp-270000000߀$opp-540000000 /oopp-8100000000GFdisplayport-controller@ae980002qcom,sc8280xp-dpPn      (r ;-core_ifacecore_auxctrl_linkctrl_link_ifacestream_pixel! B000dpl6~okayZYports port@0nendpointZport@1nendpoint YZ{opp-table2operating-points-v2Zopp-160000000 h#opp-270000000߀$opp-540000000 /oopp-8100000000GFdisplayport-controller@ae9a0002qcom,sc8280xp-dpPn     (r%'*+;-core_ifacecore_auxctrl_linkctrl_link_ifacestream_pixeldp6(, Bl ~disabledZZports port@0nendpointZport@1nopp-table2operating-points-v2Zopp-160000000 h#opp-270000000߀$opp-540000000 /oopp-8100000000GFdisplayport-controller@aea00002qcom,sc8280xp-dpPn     (r/145;-core_ifacecore_auxctrl_linkctrl_link_ifacestream_pixeldp626 Bl ~disabledZ[ports port@0nendpointZport@1nopp-table2operating-points-v2Zopp-160000000 h#opp-270000000߀$opp-540000000 /oopp-8100000000GFphy@aec2a002qcom,sc8280xp-dp-phy@n * " & r% -auxcfg_ahb6 =g ~disabledZphy@aec5a002qcom,sc8280xp-dp-phy@n Z R V Pr/ -auxcfg_ahb6 =g ~disabledZclock-controller@af000002qcom,sc8280xp-dispcc0n dr+--.//006=*~okayZinterrupt-controller@b2200002qcom,sc8280xp-pdcqcom,pdc n "` d((672;8>v@BEVF6|a~!YCz ytY\n/rZSthermal-sensor@c251000"2qcom,sc8280xp-tsensqcom,tsens-v2 n % "@ t SzS|9uplowcritical Zthermal-sensor@c252000"2qcom,sc8280xp-tsensqcom,tsens-v2 n %  "P tS{S}9uplowcritical Z\thermal-sensor@c263000"2qcom,sc8280xp-tsensqcom,tsens-v2 n &0 "  tSS9uplowcritical Zrestart@c264000 2qcom,psholdn &@ ~reservedthermal-sensor@c265000"2qcom,sc8280xp-tsensqcom,tsens-v2 n &P "0 tSS9uplowcritical Zpower-management@c300000%2qcom,sc8280xp-aoss-qmpqcom,aoss-qmpn 0* *=ZVsram@c3f00002qcom,rpmh-statsn ?Vspmi@c4400002qcom,spmi-pmic-arbPn D ``p @`#corechnlsobsrvrintrcnfg 9periph_irq S   Zpmic@02qcom,pmk8350qcom,spmi-pmicn Z]pon@13002qcom,pmk8350-ponn #hlospbsZ^pwrkey2qcom,pmk8350-pwrkey t~okayZ_resin2qcom,pmk8350-resin~okayZ`adc@31002qcom,spmi-adc7n11  Zchannel@3n pmk8350_die_tempchannel@44nD  pmk8350_xo_thermchannel@103n pmc8280_1_die_tempchannel@303n pmc8280_2_die_tempchannel@403n pmr735a_die_tempadc-tm@34002qcom,spmi-adc-tm5-gen2n44   ~disabledZrtc@61002qcom,pmk8350-rtcnab #rtcalarmb~okay  offsetZanvram@85002qcom,spmi-sdamn  Q~okayZbrtc-offset@bcnZpmic@12qcom,pm8350qcom,spmi-pmicn Zctemp-alarm@a002qcom,spmi-temp-alarmn    )thermal Zgpio@8800 2qcom,pm8350-gpioqcom,spmi-gpion Zpmic@22qcom,pm8350cqcom,spmi-pmicn Zdtemp-alarm@a002qcom,spmi-temp-alarmn   Zgpio@8800!2qcom,pm8350c-gpioqcom,spmi-gpion Zpwm2qcom,pm8350c-pwm  : ~disabledZepmic@32qcom,pm8350qcom,spmi-pmicn Zftemp-alarm@a002qcom,spmi-temp-alarmn    )thermal Zgpio@8800 2qcom,pm8350-gpioqcom,spmi-gpion Zwwan-sw-en-stategpio1normalZpmic@42qcom,pmr735aqcom,spmi-pmicn Zgtemp-alarm@a002qcom,spmi-temp-alarmn    )thermal Zgpio@8800!2qcom,pmr735a-gpioqcom,spmi-gpionZhastings-reg-en-stategpio1normalZpinctrl@f1000002qcom,sc8280xp-tlmmn0 = ESZ=cci0-default-stateZcci0-i2c0-default-pinsgpio113gpio114cci_i2c SZhcci0-i2c1-default-pinsgpio115gpio116cci_i2c SZicci0-sleep-stateZcci0-i2c0-sleep-pinsgpio113gpio114cci_i2cZZjcci0-i2c1-sleep-pinsgpio115gpio116cci_i2cZZkcci1-default-stateZcci1-i2c0-default-pinsgpio10gpio11cci_i2c SZlcci1-i2c1-default-pinsgpio123gpio124cci_i2c SZmcci1-sleep-stateZcci1-i2c0-sleep-pinsgpio10gpio11cci_i2cZZncci1-i2c1-sleep-pinsgpio123gpio124cci_i2cZZocci2-default-stateZcci2-i2c0-default-pinsgpio117gpio118cci_i2c SZpcci2-i2c1-default-pinsgpio12gpio13cci_i2c SZqcci2-sleep-stateZcci2-i2c0-sleep-pinsgpio117gpio118cci_i2cZZrcci2-i2c1-sleep-pinsgpio12gpio13cci_i2cZZscci3-default-stateZcci3-i2c0-default-pinsgpio145gpio146cci_i2c SZtcci3-i2c1-default-pinsgpio164gpio165cci_i2c SZucci3-sleep-stateZcci3-i2c0-sleep-pinsgpio145gpio146cci_i2cZZvcci3-i2c1-sleep-pinsgpio164gpio165cci_i2cZZwqup-uart18-default-stateZ<cts-pinsgpio66qup18rts-pinsgpio67qup18tx-pinsgpio68qup18rx-pinsgpio69qup18bt-default-stateZDhstp-bt-en-pinsgpio133gpiohstp-sw-ctrl-pinsgpio132gpioZnvme-reg-en-stategpio135gpioZpcie2a-default-stateZNclkreq-n-pinsgpio142pcie2a_clkreq Sperst-n-pinsgpio143gpiowake-n-pinsgpio145gpio Spcie3a-default-stateZLclkreq-n-pinsgpio150pcie3a_clkreq Sperst-n-pinsgpio151gpiowake-n-pinsgpio148gpio Spcie4-default-stateZHclkreq-n-pinsgpio140 pcie4_clkreq Sperst-n-pinsgpio141gpiowake-n-pinsgpio139gpio Sssam-state-stategpio85gpioZ>uart2-default-stateZ?cts-pinsgpio121qup2(rts-pinsgpio122qup2rx-pinsgpio124qup2 Stx-pinsgpio123qup2usb0-sbu-stateZoe-n-pinsgpio101gpio6sel-pinsgpio164gpiousb1-sbu-stateZoe-n-pinsgpio48gpio6sel-pinsgpio47gpiowcd-default-stateZreset-pinsgpio106gpioiommu@14f80000 2arm,smmu-v3n|$9eventqgerrorcmdq-syncl~okayvedZxiommu@15000000#2qcom,sc8280xp-smmu-500arm,mmu-500n|@Aghijklmnopqrstuv;<=>?@ABCDEFGHIJKLMNOPQRSTUVWXY~}|{zlZ,interrupt-controller@17a00000 2arm,gic-v3 n   ` w QZmsi-controller@17a400002arm,gic-v3-itsn  ZEwatchdog@17c10000%2qcom,apss-wdt-sc8280xpqcom,kpss-wdtnr. timer@17c200002arm,armv7-timer-memn Q frame@17c21000 n frame@17c23000   n0 ~disabledframe@17c25000   nP ~disabledframe@17c27000   n` ~disabledframe@17c29000   n ~disabledframe@17c2b000   n° ~disabledframe@17c2d000  n ~disabledrsc@182000002qcom,rpmh-rsc0n !"#drv-0drv-1drv-2$    apps_rsc%Zybcm-voter2qcom,bcm-voterZ"clock-controller2qcom,sc8280xp-rpmh-clk=-xorZ-power-controller2qcom,sc8280xp-rpmhpd*Z6opp-table2operating-points-v2Zopp1rZzopp2r0Z{opp3r@Z#opp4rZ$opp5rZoopp6rZFopp7r@Z|opp8rPZ}opp9rZ~opp10rZregulators-02qcom,pm8350-rpmh-regulators b A  B A 4Asmps10 Bvreg_s10b Qw@ iw@  Z@smps11 Bvreg_s11b Qh ih  ZBsmps12 Bvreg_s12b Q i  ZAldo3 Bvreg_l3b QO iO  Zxldo4 Bvreg_l4b Q  i  Zvldo6 Bvreg_l6b Q m i m   Zregulators-12qcom,pm8350c-rpmh-regulators c  C C   Bsmps1 Bvreg_s1c Q i  ZCldo1 Bvreg_l1c Qw@ iw@ Zqldo12 Bvreg_l12c Qw@ iw@ Zldo13 Bvreg_l13c Q. i. Zwbob Bvreg_bob Q- i+:+<-stmmacethpclkptp_refrgmii9macirqeth_lpi I,@+ PY bp ~disabledZsound2qcom,sc8280xp-sndcard$,SC8280XP-MICROSOFT-SURFACE-PRO-9-5G BSpkrLeft INWSA_SPK1 OUTSpkrRight INWSA_SPK2 OUTIN1_HPHLHPHL_OUTIN2_HPHRHPHR_OUTAMIC2MIC BIAS2VA DMIC0MIC BIAS1VA DMIC1MIC BIAS1VA DMIC2MIC BIAS3VA DMIC0VA MIC BIAS1VA DMIC1VA MIC BIAS1VA DMIC2VA MIC BIAS3TX SWR_ADC1ADC2_OUTPUTZwcd-playback-dai-link PWCD Playbackcpu Zqcodec Z^platform Zwcd-capture-dai-link PWCD Capturecpu Zxcodec Zcplatform Zwsa-dai-link PWSA Playbackcpu Zicodec Zbplatform Zva-dai-link PVA Capturecpu Znplatform Zcodec Z\thermal-zonescpu0-thermal d ztripscpu-crit   icriticalcpu1-thermal d ztripscpu-crit   icriticalcpu2-thermal d ztripscpu-crit   icriticalcpu3-thermal d ztripscpu-crit   icriticalcpu4-thermal d ztripscpu-crit   icriticalcpu5-thermal d ztripscpu-crit   icriticalcpu6-thermal d ztripscpu-crit   icriticalcpu7-thermal d ztripscpu-crit   icriticalcluster0-thermal d z tripscpu-crit   icriticalgpu-thermal d zcooling-mapsmap0  tripstrip-point0 L ipassiveZtrip-point1   icriticalmem-thermal d ztripstrip-point0 _ ihotpm8280-1-thermal dd zZtripstrip0 s ipassivetrip1 8  icriticalpmc8280c-thermal dd zZtripstrip0 s ipassivetrip1 8  icriticalpm8280-2-thermal dd zZtripstrip0 s ipassivetrip1 8  icriticalpmr735a-thermal dd zZtripstrip0 s ipassivetrip1 8  icriticalskin-temp-thermal d ztripstrip-point0  ipassiveZtrip-point1  ipassiveZskin-temp-crit (  icriticalcooling-mapsmap0 0 map1 0 timer2arm,armv8-timer0   aliases$ /soc@0/geniqup@8c0000/serial@888000$ /soc@0/geniqup@9c0000/serial@988000audio-codec2qcom,wcd9380-codecdefault =j @ @ @  w@ +w@ Cw@ [w@ s$I       P  lZpmic-glink)2qcom,sc8280xp-pmic-glinkqcom,pmic-glink connector@02usb-c-connectorndualdualports port@0nendpointZport@1nendpointZsport@2nendpointZconnector@12usb-c-connectorndualdualports port@0nendpointZport@1nendpointZyport@2nendpointZregulator-nvme2regulator-fixed BVCC3_SSD Q2Z i2Z ="default ZMregulator-vph-pwr2regulator-fixed BVPH_VCC3R9 Q;` i;` Zregulator-wlan2regulator-fixed BVCC_WLAN_3R9 Q;` i;` "default ZGregulator-wwan2regulator-fixed BVCC3B_WAN Q2Z i2Z "default ZKusb0-sbu-mux2pericom,pi3usb102gpio-sbu-mux H=e 5=defaultBportendpointZusb1-sbu-mux2pericom,pi3usb102gpio-sbu-mux H=0 5=/defaultBportendpointZ__symbols__N/clocks/xo-board-clk[/clocks/sleep-clk e/cpus/cpu@0j/cpus/cpu@0/l2-cacheo/cpus/cpu@0/l2-cache/l3-cachet/cpus/cpu@100y/cpus/cpu@100/l2-cache/cpus/cpu@200/cpus/cpu@200/l2-cache/cpus/cpu@300/cpus/cpu@300/l2-cache/cpus/cpu@400/cpus/cpu@400/l2-cache/cpus/cpu@500/cpus/cpu@500/l2-cache/cpus/cpu@600/cpus/cpu@600/l2-cache/cpus/cpu@700/cpus/cpu@700/l2-cache /cpus/idle-states/cpu-sleep-0-0 /cpus/idle-states/cpu-sleep-1-0)/cpus/domain-idle-states/cluster-sleep-0/firmware/scm/interconnect-aggre1-noc /interconnect-aggre2-noc/interconnect-clk-virt/interconnect-config-noc)/interconnect-dc-noc0/interconnect-gem-noc8/interconnect-lpass-ag-nocB/interconnect-mc-virtJ/interconnect-mmss-nocS/interconnect-nspa-noc\/interconnect-nspb-noce/interconnect-system-nocp/opp-table-cpu0/opp-table-cpu4/opp-table-qup100mhz/psci/power-domain-cpu0/psci/power-domain-cpu1/psci/power-domain-cpu2/psci/power-domain-cpu3/psci/power-domain-cpu4/psci/power-domain-cpu5/psci/power-domain-cpu6/psci/power-domain-cpu7 /psci/power-domain-cpu-cluster0(/reserved-memory/cmd-db-region@80860000&/reserved-memory/smem-region@80900000&/reserved-memory/adsp-region@86c00000& /reserved-memory/slpi-region@88c00000'/reserved-memory/cdsp0-region@8a100000'%/reserved-memory/cdsp1-region@8c600000"2/reserved-memory/gpu-mem@8bf00000:/smp2p-adsp/master-kernelI/smp2p-adsp/slave-kernelW/smp2p-nsp0/master-kernelf/smp2p-nsp0/slave-kernelt/smp2p-nsp1/master-kernel/smp2p-nsp1/slave-kernel/smp2p-slpi/master-kernel/smp2p-slpi/slave-kernel/soc@0/soc@0/ethernet@20000/soc@0/clock-controller@100000/soc@0/mailbox@408000/soc@0/efuse@784000&/soc@0/efuse@784000/gpu-speed-bin@18b/soc@0/geniqup@8c0000!/soc@0/geniqup@8c0000/i2c@880000!/soc@0/geniqup@8c0000/spi@880000!/soc@0/geniqup@8c0000/i2c@884000!/soc@0/geniqup@8c0000/spi@884000$/soc@0/geniqup@8c0000/serial@884000!/soc@0/geniqup@8c0000/i2c@888000!/soc@0/geniqup@8c0000/spi@888000$ /soc@0/geniqup@8c0000/serial@888000!/soc@0/geniqup@8c0000/i2c@88c000!/soc@0/geniqup@8c0000/spi@88c000!/soc@0/geniqup@8c0000/i2c@890000!#/soc@0/geniqup@8c0000/spi@890000!)/soc@0/geniqup@8c0000/i2c@894000!//soc@0/geniqup@8c0000/spi@894000!5/soc@0/geniqup@8c0000/i2c@898000!;/soc@0/geniqup@8c0000/spi@898000!A/soc@0/geniqup@8c0000/i2c@89c000!G/soc@0/geniqup@8c0000/spi@89c000M/soc@0/geniqup@9c0000!R/soc@0/geniqup@9c0000/i2c@980000!W/soc@0/geniqup@9c0000/spi@980000!\/soc@0/geniqup@9c0000/i2c@984000!a/soc@0/geniqup@9c0000/spi@984000!f/soc@0/geniqup@9c0000/i2c@988000!k/soc@0/geniqup@9c0000/spi@988000$p/soc@0/geniqup@9c0000/serial@988000!v/soc@0/geniqup@9c0000/i2c@98c000!{/soc@0/geniqup@9c0000/spi@98c000!/soc@0/geniqup@9c0000/i2c@990000!/soc@0/geniqup@9c0000/spi@990000!/soc@0/geniqup@9c0000/i2c@994000!/soc@0/geniqup@9c0000/spi@994000!/soc@0/geniqup@9c0000/i2c@998000!/soc@0/geniqup@9c0000/spi@998000!/soc@0/geniqup@9c0000/i2c@99c000!/soc@0/geniqup@9c0000/spi@99c000/soc@0/geniqup@ac0000!/soc@0/geniqup@ac0000/i2c@a80000!/soc@0/geniqup@ac0000/spi@a80000!/soc@0/geniqup@ac0000/i2c@a84000!/soc@0/geniqup@ac0000/spi@a84000!/soc@0/geniqup@ac0000/i2c@a88000!/soc@0/geniqup@ac0000/spi@a88000!/soc@0/geniqup@ac0000/i2c@a8c000!/soc@0/geniqup@ac0000/spi@a8c000!/soc@0/geniqup@ac0000/i2c@a90000!/soc@0/geniqup@ac0000/spi@a90000!/soc@0/geniqup@ac0000/i2c@a94000!/soc@0/geniqup@ac0000/spi@a94000!/soc@0/geniqup@ac0000/i2c@a98000!/soc@0/geniqup@ac0000/spi@a98000!/soc@0/geniqup@ac0000/i2c@a9c000!/soc@0/geniqup@ac0000/spi@a9c000 /soc@0/rng@10d3000 /soc@0/pcie@1c00000/soc@0/pcie@1c00000/pcie@0/soc@0/phy@1c06000)/soc@0/pcie@1c080000/soc@0/pcie@1c08000/pcie@0=/soc@0/phy@1c0e000H/soc@0/pcie@1c10000O/soc@0/pcie@1c10000/pcie@0\/soc@0/phy@1c14000g/soc@0/pcie@1c18000n/soc@0/pcie@1c18000/pcie@0{/soc@0/phy@1c1e000/soc@0/pcie@1c20000/soc@0/pcie@1c20000/pcie@0/soc@0/phy@1c24000/soc@0/ufshc@1d84000/soc@0/phy@1d87000/soc@0/ufshc@1da4000/soc@0/phy@1da7000/soc@0/hwlock@1f40000/soc@0/syscon@1fc0000/soc@0/remoteproc@2400000/soc@0/remoteproc@3000000%/soc@0/remoteproc@3000000/glink-edge3/soc@0/remoteproc@3000000/glink-edge/gpr/service@18!/soc@0/remoteproc@3000000/glink-edge/gpr/service@1/dais:*/soc@0/remoteproc@3000000/glink-edge/gpr/service@1/bedais35/soc@0/remoteproc@3000000/glink-edge/gpr/service@2D;/soc@0/remoteproc@3000000/glink-edge/gpr/service@2/clock-controllerC/soc@0/rxmacro@3200000K/soc@0/soundwire@3210000#P/soc@0/soundwire@3210000/codec@0,4W/soc@0/txmacro@3220000_/soc@0/codec@3240000h/soc@0/soundwire@3250000 m/soc@0/clock-controller@32a9000{/soc@0/soundwire@3330000#/soc@0/soundwire@3330000/codec@0,3/soc@0/codec@3370000/soc@0/pinctrl@33c0000,/soc@0/pinctrl@33c0000/tx-swr-default-state,/soc@0/pinctrl@33c0000/rx-swr-default-state,/soc@0/pinctrl@33c0000/dmic01-default-state*/soc@0/pinctrl@33c0000/dmic01-sleep-state,/soc@0/pinctrl@33c0000/dmic23-default-state*/soc@0/pinctrl@33c0000/dmic23-sleep-state-/soc@0/pinctrl@33c0000/wsa-swr-default-state./soc@0/pinctrl@33c0000/wsa2-swr-default-state /soc@0/clock-controller@33e0000/soc@0/gpu@3d00000/soc@0/gpu@3d00000/opp-tablen/soc@0/gmu@3d6a000+/soc@0/gmu@3d6a000/opp-table 9/soc@0/clock-controller@3d90000?/soc@0/iommu@3da0000H/soc@0/mmc@8804000M/soc@0/mmc@8804000/opp-table\/soc@0/phy@88e5000h/soc@0/phy@88e7000u/soc@0/phy@88e8000/soc@0/phy@88e9000/soc@0/phy@88ea000/soc@0/phy@88eb000)/soc@0/phy@88eb000/ports/port@0/endpoint)/soc@0/phy@88eb000/ports/port@1/endpoint)/soc@0/phy@88eb000/ports/port@2/endpoint/soc@0/phy@88ef000/soc@0/phy@88f1000/soc@0/phy@8902000 /soc@0/phy@8903000)/soc@0/phy@8903000/ports/port@0/endpoint)*/soc@0/phy@8903000/ports/port@1/endpoint)A/soc@0/phy@8903000/ports/port@2/endpointT/soc@0/phy@8909a00b/soc@0/phy@890ca00p/soc@0/pmu@9091000/opp-table/soc@0/pmu@90b6400/opp-table/soc@0/usb@a4f8800/soc@0/usb@a4f8800/usb@a400000/soc@0/usb@a6f8800/soc@0/usb@a6f8800/usb@a6000005/soc@0/usb@a6f8800/usb@a600000/ports/port@0/endpoint5/soc@0/usb@a6f8800/usb@a600000/ports/port@1/endpoint/soc@0/usb@a8f8800/soc@0/usb@a8f8800/usb@a8000005/soc@0/usb@a8f8800/usb@a800000/ports/port@0/endpoint5/soc@0/usb@a8f8800/usb@a800000/ports/port@1/endpoint/soc@0/cci@ac4a000 /soc@0/cci@ac4a000/i2c-bus@0/soc@0/cci@ac4a000/i2c-bus@1/soc@0/cci@ac4b000"/soc@0/cci@ac4b000/i2c-bus@0,/soc@0/cci@ac4b000/i2c-bus@16/soc@0/cci@ac4c000;/soc@0/cci@ac4c000/i2c-bus@0E/soc@0/cci@ac4c000/i2c-bus@1O/soc@0/cci@ac4d000T/soc@0/cci@ac4d000/i2c-bus@0^/soc@0/cci@ac4d000/i2c-bus@1h/soc@0/camss@ac5a000 n/soc@0/clock-controller@ad00000!t/soc@0/display-subsystem@ae00000<z/soc@0/display-subsystem@ae00000/display-controller@ae01000R/soc@0/display-subsystem@ae00000/display-controller@ae01000/ports/port@0/endpointR/soc@0/display-subsystem@ae00000/display-controller@ae01000/ports/port@4/endpointR/soc@0/display-subsystem@ae00000/display-controller@ae01000/ports/port@5/endpointR/soc@0/display-subsystem@ae00000/display-controller@ae01000/ports/port@6/endpointF/soc@0/display-subsystem@ae00000/display-controller@ae01000/opp-table@/soc@0/display-subsystem@ae00000/displayport-controller@ae90000V/soc@0/display-subsystem@ae00000/displayport-controller@ae90000/ports/port@0/endpointV/soc@0/display-subsystem@ae00000/displayport-controller@ae90000/ports/port@1/endpointJ/soc@0/display-subsystem@ae00000/displayport-controller@ae90000/opp-table@/soc@0/display-subsystem@ae00000/displayport-controller@ae98000V/soc@0/display-subsystem@ae00000/displayport-controller@ae98000/ports/port@0/endpointV(/soc@0/display-subsystem@ae00000/displayport-controller@ae98000/ports/port@1/endpointJ6/soc@0/display-subsystem@ae00000/displayport-controller@ae98000/opp-table@J/soc@0/display-subsystem@ae00000/displayport-controller@ae9a000VT/soc@0/display-subsystem@ae00000/displayport-controller@ae9a000/ports/port@0/endpointJa/soc@0/display-subsystem@ae00000/displayport-controller@ae9a000/opp-table@u/soc@0/display-subsystem@ae00000/displayport-controller@aea0000V/soc@0/display-subsystem@ae00000/displayport-controller@aea0000/ports/port@0/endpointJ/soc@0/display-subsystem@ae00000/displayport-controller@aea0000/opp-table/soc@0/phy@aec2a00/soc@0/phy@aec5a00 /soc@0/clock-controller@af00000$/soc@0/interrupt-controller@b220000/soc@0/thermal-sensor@c251000/soc@0/thermal-sensor@c252000/soc@0/thermal-sensor@c263000/soc@0/thermal-sensor@c265000 /soc@0/power-management@c300000/soc@0/spmi@c440000/soc@0/spmi@c440000/pmic@0$/soc@0/spmi@c440000/pmic@0/pon@1300+ /soc@0/spmi@c440000/pmic@0/pon@1300/pwrkey*/soc@0/spmi@c440000/pmic@0/pon@1300/resin$//soc@0/spmi@c440000/pmic@0/adc@3100'/soc@0/pinctrl@f100000/cci2-sleep-state/cci2-i2c0-sleep-pins=N/soc@0/pinctrl@f100000/cci2-sleep-state/cci2-i2c1-sleep-pins*^/soc@0/pinctrl@f100000/cci3-default-stateAk/soc@0/pinctrl@f100000/cci3-default-state/cci3-i2c0-default-pinsA}/soc@0/pinctrl@f100000/cci3-default-state/cci3-i2c1-default-pins(/soc@0/pinctrl@f100000/cci3-sleep-state=/soc@0/pinctrl@f100000/cci3-sleep-state/cci3-i2c0-sleep-pins=/soc@0/pinctrl@f100000/cci3-sleep-state/cci3-i2c1-sleep-pins0/soc@0/pinctrl@f100000/qup-uart18-default-state(/soc@0/pinctrl@f100000/bt-default-state)/soc@0/pinctrl@f100000/nvme-reg-en-state,/soc@0/pinctrl@f100000/pcie2a-default-state,/soc@0/pinctrl@f100000/pcie3a-default-state+/soc@0/pinctrl@f100000/pcie4-default-state(/soc@0/pinctrl@f100000/ssam-state-state+/soc@0/pinctrl@f100000/uart2-default-state&)/soc@0/pinctrl@f100000/usb0-sbu-state&:/soc@0/pinctrl@f100000/usb1-sbu-state)K/soc@0/pinctrl@f100000/wcd-default-stateW/soc@0/iommu@14f80000a/soc@0/iommu@15000000%k/soc@0/interrupt-controller@17a00000=/soc@0/interrupt-controller@17a00000/msi-controller@17a40000p/soc@0/rsc@18200000y/soc@0/rsc@18200000/bcm-voter%/soc@0/rsc@18200000/clock-controller%/soc@0/rsc@18200000/power-controller//soc@0/rsc@18200000/power-controller/opp-table4/soc@0/rsc@18200000/power-controller/opp-table/opp14/soc@0/rsc@18200000/power-controller/opp-table/opp24/soc@0/rsc@18200000/power-controller/opp-table/opp34/soc@0/rsc@18200000/power-controller/opp-table/opp44/soc@0/rsc@18200000/power-controller/opp-table/opp54/soc@0/rsc@18200000/power-controller/opp-table/opp64 /soc@0/rsc@18200000/power-controller/opp-table/opp74/soc@0/rsc@18200000/power-controller/opp-table/opp840/soc@0/rsc@18200000/power-controller/opp-table/opp95A/soc@0/rsc@18200000/power-controller/opp-table/opp10(U/soc@0/rsc@18200000/regulators-0/smps10(_/soc@0/rsc@18200000/regulators-0/smps11(i/soc@0/rsc@18200000/regulators-0/smps12&s/soc@0/rsc@18200000/regulators-0/ldo3&|/soc@0/rsc@18200000/regulators-0/ldo4&/soc@0/rsc@18200000/regulators-0/ldo6'/soc@0/rsc@18200000/regulators-1/smps1&/soc@0/rsc@18200000/regulators-1/ldo1'/soc@0/rsc@18200000/regulators-1/ldo12'/soc@0/rsc@18200000/regulators-1/ldo13%/soc@0/rsc@18200000/regulators-1/bob&/soc@0/rsc@18200000/regulators-2/ldo3&/soc@0/rsc@18200000/regulators-2/ldo4&/soc@0/rsc@18200000/regulators-2/ldo6&/soc@0/rsc@18200000/regulators-2/ldo7&/soc@0/rsc@18200000/regulators-2/ldo9/soc@0/interconnect@18590000/soc@0/cpufreq@18591000/soc@0/remoteproc@1b300000 /soc@0/remoteproc@21300000"/soc@0/display-subsystem@22000000>#/soc@0/display-subsystem@22000000/display-controller@22001000T-/soc@0/display-subsystem@22000000/display-controller@22001000/ports/port@0/endpointT=/soc@0/display-subsystem@22000000/display-controller@22001000/ports/port@4/endpointTM/soc@0/display-subsystem@22000000/display-controller@22001000/ports/port@5/endpointT]/soc@0/display-subsystem@22000000/display-controller@22001000/ports/port@6/endpointHm/soc@0/display-subsystem@22000000/display-controller@22001000/opp-tableB/soc@0/display-subsystem@22000000/displayport-controller@22090000X/soc@0/display-subsystem@22000000/displayport-controller@22090000/ports/port@0/endpointL/soc@0/display-subsystem@22000000/displayport-controller@22090000/opp-tableB/soc@0/display-subsystem@22000000/displayport-controller@22098000X/soc@0/display-subsystem@22000000/displayport-controller@22098000/ports/port@0/endpointL/soc@0/display-subsystem@22000000/displayport-controller@22098000/opp-tableB/soc@0/display-subsystem@22000000/displayport-controller@2209a000X/soc@0/display-subsystem@22000000/displayport-controller@2209a000/ports/port@0/endpointL/soc@0/display-subsystem@22000000/displayport-controller@2209a000/opp-tableB/soc@0/display-subsystem@22000000/displayport-controller@220a0000X /soc@0/display-subsystem@22000000/displayport-controller@220a0000/ports/port@0/endpointL/soc@0/display-subsystem@22000000/displayport-controller@220a0000/opp-table-/soc@0/phy@220c2a00;/soc@0/phy@220c5a00!I/soc@0/clock-controller@22100000Q/soc@0/ethernet@23000000[/sound-a/thermal-zones/gpu-thermal/trips/trip-point0 l/thermal-zones/pm8280-1-thermal }/thermal-zones/pmc8280c-thermal /thermal-zones/pm8280-2-thermal/thermal-zones/pmr735a-thermal3/thermal-zones/skin-temp-thermal/trips/trip-point03/thermal-zones/skin-temp-thermal/trips/trip-point1 /audio-codec./pmic-glink/connector@0/ports/port@0/endpoint./pmic-glink/connector@0/ports/port@1/endpoint./pmic-glink/connector@0/ports/port@2/endpoint./pmic-glink/connector@1/ports/port@0/endpoint.&/pmic-glink/connector@1/ports/port@1/endpoint.9/pmic-glink/connector@1/ports/port@2/endpointM/regulator-nvmeW/regulator-vph-pwrd/regulator-wlann/regulator-wwanx/usb0-sbu-mux/port/endpoint/usb1-sbu-mux/port/endpoint interrupt-parent#address-cells#size-cellsmodelcompatible#clock-cellsclock-frequencyphandledevice_typeregclocksenable-methodcapacity-dmips-mhzdynamic-power-coefficientnext-level-cachepower-domainspower-domain-namesqcom,freq-domainoperating-points-v2interconnects#cooling-cellscache-levelcache-unifiedcpuentry-methodidle-state-namearm,psci-suspend-paramentry-latency-usexit-latency-usmin-residency-uslocal-timer-stopqcom,dload-mode#interconnect-cellsqcom,bcm-votersopp-sharedopp-hzopp-peak-kBpsrequired-oppsinterrupts#power-domain-cellsdomain-idle-statesrangesno-maphwlockssizereusablelinux,cma-defaultqcom,smeminterrupts-extendedmboxesqcom,local-pidqcom,remote-pidqcom,entry-name#qcom,smem-state-cellsinterrupt-controller#interrupt-cellsdma-rangesreg-namesclock-namesinterrupt-namesiommussnps,tsosnps,pblrx-fifo-depthtx-fifo-depthstatus#reset-cells#mbox-cellsbitsinterconnect-namespinctrl-0pinctrl-namescurrent-speedvddio-supplyvddbtcxmx-supplyvddrfacmn-supplyvddrfa0p8-supplyvddrfa1p2-supplyvddrfa1p7-supplymax-speedenable-gpiosswctrl-gpiosbus-rangedma-coherentlinux,pci-domainnum-lanesmsi-mapinterrupt-map-maskinterrupt-mapassigned-clocksassigned-clock-ratesresetsreset-namesphysphy-namesmax-link-speedperst-gpioswake-gpiosvddpe-3v3-supplyqcom,calibration-variantclock-output-names#phy-cellsvdda-phy-supplyvdda-pll-supplyqcom,4ln-config-sellanes-per-directionfreq-table-hz#hwlock-cellsmemory-regionqcom,qmpqcom,smem-statesqcom,smem-state-nameslabelqcom,glink-channelsqcom,non-secure-domainfirmware-nameqcom,domainqcom,intents#sound-dai-cellsqcom,protection-domainqcom,din-portsqcom,dout-portsqcom,ports-sinterval-lowqcom,ports-offset1qcom,ports-offset2qcom,ports-hstartqcom,ports-hstopqcom,ports-word-lengthqcom,ports-block-pack-modeqcom,ports-lane-controlqcom,ports-block-group-countqcom,rx-port-mappingqcom,tx-port-mappingvdd-micb-supplyqcom,dmic-sample-rategpio-controller#gpio-cellsgpio-rangespinsfunctiondrive-strengthslew-ratebias-disablebias-bus-holdoutput-highinput-enableoutput-lowbias-pull-downqcom,gmuopp-level#iommu-cells#global-interruptsbus-widthopp-avg-kBpsvdda18-supplyvdda33-supplyorientation-switchremote-endpointwakeup-sourcedr_modesnps,dis-u1-entry-quirksnps,dis-u2-entry-quirkpinctrl-1assigned-clock-parentsdata-lanesqcom,pdc-ranges#qcom,sensors#thermal-sensor-cellsqcom,eeqcom,channellinux,code#io-channel-cellsqcom,pre-scalingqcom,hw-settle-timeqcom,ratiometricnvmem-cellsnvmem-cell-namesio-channelsio-channel-names#pwm-cellswakeup-parentbias-pull-up#redistributor-regionsredistributor-stridemsi-controller#msi-cellsframe-numberqcom,tcs-offsetqcom,drv-idqcom,tcs-configqcom,pmic-idvdd-l1-l4-supplyvdd-l2-l7-supplyvdd-l3-l5-supplyvdd-l6-l9-l10-supplyvdd-l8-supplyregulator-nameregulator-min-microvoltregulator-max-microvoltregulator-initial-moderegulator-always-onregulator-boot-onvdd-bob-supplyvdd-l1-l12-supplyvdd-l2-l8-supplyvdd-l3-l4-l5-l7-l13-supplyvdd-l6-l9-l11-supplyvdd-l10-supply#freq-domain-cellsaudio-routinglink-namesound-daipolling-delay-passivethermal-sensorstemperaturehysteresistripcooling-deviceserial0serial1reset-gpiosvdd-buck-supplyvdd-rxtx-supplyvdd-io-supplyvdd-mic-bias-supplyqcom,micbias1-microvoltqcom,micbias2-microvoltqcom,micbias3-microvoltqcom,micbias4-microvoltqcom,mbhc-buttons-vthreshold-microvoltqcom,mbhc-headset-vthreshold-microvoltqcom,mbhc-headphone-vthreshold-microvoltqcom,rx-deviceqcom,tx-devicepower-roledata-rolegpioenable-active-highselect-gpiosmode-switchxo_board_clksleep_clkcpu0l2_0l3_0cpu1l2_100cpu2l2_200cpu3l2_300cpu4l2_400cpu5l2_500cpu6l2_600cpu7l2_700little_cpu_sleep_0big_cpu_sleep_0cluster_sleep_0scmaggre1_nocaggre2_nocclk_virtconfig_nocdc_nocgem_noclpass_nocmc_virtmmss_nocnspa_nocnspb_nocsystem_noccpu0_opp_tablecpu4_opp_tablequp_opp_table_100mhzcpu_pd0cpu_pd1cpu_pd2cpu_pd3cpu_pd4cpu_pd5cpu_pd6cpu_pd7cluster_pdcmd_dbsmem_mempil_adsp_mempil_slpi_mempil_nsp0_mempil_nsp1_memgpu_memsmp2p_adsp_outsmp2p_adsp_insmp2p_nsp0_outsmp2p_nsp0_insmp2p_nsp1_outsmp2p_nsp1_insmp2p_slpi_outsmp2p_slpi_insocethernet0gccipccqfpromgpu_speed_binqup2i2c16spi16i2c17spi17uart17i2c18spi18uart18i2c19spi19i2c20spi20i2c21spi21i2c22spi22i2c23spi23qup0i2c0spi0i2c1spi1i2c2spi2uart2i2c3spi3i2c4spi4i2c5spi5i2c6spi6i2c7spi7qup1i2c8spi8i2c9spi9i2c10spi10i2c11spi11i2c12spi12i2c13spi13i2c14spi14i2c15spi15rngpcie4pcie4_port0pcie4_phypcie3bpcie3b_port0pcie3b_phypcie3apcie3a_port0pcie3a_phypcie2bpcie2b_port0pcie2b_phypcie2apcie2a_port0pcie2a_phyufs_mem_hcufs_mem_phyufs_card_hcufs_card_phytcsr_mutextcsrremoteproc_slpiremoteproc_adspremoteproc_adsp_glinkq6apmq6apmdaiq6apmbedaiq6prmq6prmccrxmacroswr1wcd_rxtxmacrowsamacroswr0lpass_audioccswr2wcd_txvamacrolpass_tlmmtx_swr_defaultrx_swr_defaultdmic01_defaultdmic01_sleepdmic23_defaultdmic23_sleepwsa_swr_defaultwsa2_swr_defaultlpassccgpugpu_opp_tablegmu_opp_tablegpuccgpu_smmusdc2sdc2_opp_tableusb_0_hsphyusb_2_hsphy0usb_2_hsphy1usb_2_hsphy2usb_2_hsphy3usb_0_qmpphyusb_0_qmpphy_outusb_0_qmpphy_usb_ss_inusb_0_qmpphy_dp_inusb_2_qmpphy0usb_2_qmpphy1usb_1_hsphyusb_1_qmpphyusb_1_qmpphy_outusb_1_qmpphy_usb_ss_inusb_1_qmpphy_dp_inmdss1_dp0_phymdss1_dp1_phyllcc_bwmon_opp_tablecpu_bwmon_opp_tableusb_2usb_2_dwc3usb_0usb_0_dwc3usb_0_dwc3_hsusb_0_dwc3_ssusb_1usb_1_dwc3usb_1_dwc3_hsusb_1_dwc3_sscci0cci0_i2c0cci0_i2c1cci1cci1_i2c0cci1_i2c1cci2cci2_i2c0cci2_i2c1cci3cci3_i2c0cci3_i2c1camsscamccmdss0mdss0_mdpmdss0_intf0_outmdss0_intf4_outmdss0_intf5_outmdss0_intf6_outmdss0_mdp_opp_tablemdss0_dp0mdss0_dp0_inmdss0_dp0_outmdss0_dp0_opp_tablemdss0_dp1mdss0_dp1_inmdss0_dp1_outmdss0_dp1_opp_tablemdss0_dp2mdss0_dp2_inmdss0_dp2_opp_tablemdss0_dp3mdss0_dp3_inmdss0_dp3_opp_tablemdss0_dp2_phymdss0_dp3_phydispcc0pdctsens2tsens3tsens0tsens1aoss_qmpspmi_buspmk8280pmk8280_ponpmk8280_pon_pwrkeypmk8280_pon_resinpmk8280_vadcpmk8280_adc_tmpmk8280_rtcpmk8280_sdam_6rtc_offsetpmc8280_1pm8280_1_temp_alarmpmc8280_1_gpiospmc8280cpmc8280c_temp_alarmpmc8280c_gpiospmc8280c_lpgpmc8280_2pm8280_2_temp_alarmpmc8280_2_gpioswwan_sw_enpmr735apmr735a_temp_alarmpmr735a_gpioshastings_reg_encci0_defaultcci0_i2c0_defaultcci0_i2c1_defaultcci0_sleepcci0_i2c0_sleepcci0_i2c1_sleepcci1_defaultcci1_i2c0_defaultcci1_i2c1_defaultcci1_sleepcci1_i2c0_sleepcci1_i2c1_sleepcci2_defaultcci2_i2c0_defaultcci2_i2c1_defaultcci2_sleepcci2_i2c0_sleepcci2_i2c1_sleepcci3_defaultcci3_i2c0_defaultcci3_i2c1_defaultcci3_sleepcci3_i2c0_sleepcci3_i2c1_sleepqup_uart18_defaultbt_defaultnvme_reg_enpcie2a_defaultpcie3a_defaultpcie4_defaultssam_stateuart2_defaultusb0_sbu_defaultusb1_sbu_defaultwcd_defaultpcie_smmuapps_smmuintcapps_rscapps_bcm_voterrpmhccrpmhpdrpmhpd_opp_tablerpmhpd_opp_retrpmhpd_opp_min_svsrpmhpd_opp_low_svsrpmhpd_opp_svsrpmhpd_opp_svs_l1rpmhpd_opp_nomrpmhpd_opp_nom_l1rpmhpd_opp_nom_l2rpmhpd_opp_turborpmhpd_opp_turbo_l1vreg_s10bvreg_s11bvreg_s12bvreg_l3bvreg_l4bvreg_l6bvreg_s1cvreg_l1cvreg_l12cvreg_l13cvreg_bobvreg_l3dvreg_l4dvreg_l6dvreg_l7dvreg_l9depss_l3cpufreq_hwremoteproc_nsp0remoteproc_nsp1mdss1mdss1_mdpmdss1_intf0_outmdss1_intf4_outmdss1_intf5_outmdss1_intf6_outmdss1_mdp_opp_tablemdss1_dp0mdss1_dp0_inmdss1_dp0_opp_tablemdss1_dp1mdss1_dp1_inmdss1_dp1_opp_tablemdss1_dp2mdss1_dp2_inmdss1_dp2_opp_tablemdss1_dp3mdss1_dp3_inmdss1_dp3_opp_tablemdss1_dp2_phymdss1_dp3_phydispcc1ethernet1soundgpu_alert0pm8280_1_thermalpmc8280c_thermalpm8280_2_thermalpmr735a_thermalskin_temp_alert0skin_temp_alert1wcd938xpmic_glink_con0_hspmic_glink_con0_sspmic_glink_con0_sbupmic_glink_con1_hspmic_glink_con1_sspmic_glink_con1_sbuvreg_nvmevreg_vph_pwrvreg_wlanvreg_wwanusb0_sbu_muxusb1_sbu_muxiommu-map