p 8j(;j/renesas,s4skrenesas,r8a779f4renesas,r8a779f0 &R-Car S4 Starter Kit boardopp-table-0operating-points-v2,7 opp-500000000?eF mT opp-800000000?/F mT opp-1000000000?;F mT opp-1200000000?GF mT eopp-table-1operating-points-v2,7opp-500000000?eF mT opp-800000000?/F mT opp-1000000000?;F mT opp-1200000000?GF mT ecpus cpu-mapcluster0core0qcore1qcluster1core0qcore1qcluster2core0qcore1qcluster3core0qcore1qcpu@0arm,cortex-a55uycpu  psci   7cpu@100arm,cortex-a55uycpu  psci   7cpu@10000arm,cortex-a55uycpu psci   7cpu@10100arm,cortex-a55uycpu psci   7cpu@20000arm,cortex-a55uycpu psci  7cpu@20100arm,cortex-a55uycpu psci  7cpu@30000arm,cortex-a55uycpu psci  7cpu@30100arm,cortex-a55uycpu psci  7cache-controller-0cache 7 cache-controller-1cache 7cache-controller-2cache 7cache-controller-3cache 7idle-statespscicpu-sleep-0arm,idle-state,=M7 extal fixed-clock^k1-{7extalr fixed-clock^k{7pcie0-clkref fixed-clock^k7pcie1-clkref fixed-clock^k7 pmu_a55arm,cortex-a55-pmupsciarm,psci-1.0arm,psci-0.2smcscif fixed-clock^kn67soc simple-bus{ watchdog@e6020000+renesas,r8a779f0-wdtrenesas,rcar-gen4-wdtu    @ okay<pinctrl@e6050000renesas,pfc-r8a779f0@ullll{default7hscif0hscif0_datahscif0_ctrlhscif07hscif1hscif1_datahscif1_ctrlhscif17i2c2i2c2i2c27i2c4i2c4i2c47i2c5i2c5i2c57scif_clk scif_clk scif_clk7sdmmc_data4mmc_ctrlmmc 7*tsn0tsn0_mdio_btsn0_link_btsn0  7#tsn1tsn1_mdio_btsn1_link_btsn1  7$gpio@e6050180-renesas,gpio-r8a779f0renesas,rcar-gen4-gpiouT 6  @ +7CXgpio@e6050980-renesas,gpio-r8a779f0renesas,rcar-gen4-gpiou T 7  @ +7 CX7,gpio@e6051180-renesas,gpio-r8a779f0renesas,rcar-gen4-gpiouT 8  @ +7@CXgpio@e6051980-renesas,gpio-r8a779f0renesas,rcar-gen4-gpiouT 9  @ +7`CX7'fuse@e6078800renesas,r8a779f0-efuseu  @ nvmem-layout fixed-layout calib@144uD7"timer@e60f0000-renesas,r8a779f0-cmt0renesas,rcar-gen4-cmt0u ifck @  disabledtimer@e6130000-renesas,r8a779f0-cmt1renesas,rcar-gen4-cmt1u` ifck @  disabledtimer@e6140000-renesas,r8a779f0-cmt1renesas,rcar-gen4-cmt1u` ifck @  disabledtimer@e6148000-renesas,r8a779f0-cmt1renesas,rcar-gen4-cmt1u` ifck @  disabledclock-controller@e6150000renesas,r8a779f0-cpg-mssru@ iextalextalr^u{7 reset-controller@e6160000renesas,r8a779f0-rstu@{system-controller@e6180000renesas,r8a779f0-syscu@u7 thermal@e6198000renesas,r8a779f0-thermal0u  @ 7.interrupt-controller@e61c0000&renesas,intc-ex-r8a779f0renesas,irqcXCuH  @timer@e61e0000!renesas,tmu-r8a779f0renesas,tmuu0$tuni0tuni1tuni2 ifck @  disabledtimer@e6fc0000!renesas,tmu-r8a779f0renesas,tmuu00tuni0tuni1tuni2ticpi2 ifck @  disabledtimer@e6fd0000!renesas,tmu-r8a779f0renesas,tmuu00tuni0tuni1tuni2ticpi2 ifck @  disabledtimer@e6fe0000!renesas,tmu-r8a779f0renesas,tmuu00tuni0tuni1tuni2ticpi2 ifck @  disabledtimer@ffc00000!renesas,tmu-r8a779f0renesas,tmuu00tuni0tuni1tuni2ticpi2 ifck @  disabledphy@e6444000renesas,r8a779f0-ether-serdesuD@(  @ okay7%i2c@e6500000+renesas,i2c-r8a779f0renesas,rcar-gen4-i2cuP@   @   txrxtxrxn  disabledi2c@e6508000+renesas,i2c-r8a779f0renesas,rcar-gen4-i2cuP@   @   txrxtxrxn  disabledi2c@e6510000+renesas,i2c-r8a779f0renesas,rcar-gen4-i2cuQ@   @   txrxtxrxn okaydefaultki2c@e66d0000+renesas,i2c-r8a779f0renesas,rcar-gen4-i2cum@    @    txrxtxrxn  disabledi2c@e66d8000+renesas,i2c-r8a779f0renesas,rcar-gen4-i2cum@    @    txrxtxrxn okaydefaultki2c@e66e0000+renesas,i2c-r8a779f0renesas,rcar-gen4-i2cun@    @    txrxtxrxn okaydefaultkeeprom@50st,24c16atmel,24c16uPserial@e6540000=renesas,hscif-r8a779f0renesas,rcar-gen4-hscifrenesas,hscifuT`   )ifckbrg_intscif_clk 1010 txrxtxrx @ okaydefault{serial@e6550000=renesas,hscif-r8a779f0renesas,rcar-gen4-hscifrenesas,hscifuU`   )ifckbrg_intscif_clk 3232 txrxtxrx @ okaydefaultserial@e6560000=renesas,hscif-r8a779f0renesas,rcar-gen4-hscifrenesas,hscifuV`   )ifckbrg_intscif_clk 5454 txrxtxrx @  disabledserial@e66a0000=renesas,hscif-r8a779f0renesas,rcar-gen4-hscifrenesas,hscifuj`   )ifckbrg_intscif_clk 7676 txrxtxrx @  disabledpcie@e65d0000-renesas,r8a779f0-pcierenesas,rcar-gen4-pciepu]] ]0 ]P]b]p@  dbidbi2atudmaappphyconfig0msidmasft_ceapp p icoreref @ ppwr. 8ypci8@00BBXM`n disabledpcie@e65d8000-renesas,r8a779f0-pcierenesas,rcar-gen4-pciepu]]] ]]]@  dbidbi2atudmaappphyconfig0msidmasft_ceapp q  icoreref @ qpwr. 8ypci8@BBXM`n disabledpcie-ep@e65d00003renesas,r8a779f0-pcie-eprenesas,rcar-gen4-pcie-eppu] ] ]0 ]P]b]p@$ dbidbi2atudmaappphyaddr_space$dmasft_ceapp p icoreref @ ppwr. disabledpcie-ep@e65d80003renesas,r8a779f0-pcie-eprenesas,rcar-gen4-pcie-eppu] ]] ]]]@$ dbidbi2atudmaappphyaddr_space$dmasft_ceapp q  icoreref @ qpwr. disabledufs@e6860000renesas,r8a779f0-ufsu  ! ifckref_clk II @ okay" calibrationethernet@e6880000renesas,r8a779f0-ether-switch u basesecure_base4      !"#$%&'()*+,-.0122mfwd_errorrace_errorcoma_errorgwca0_errorgwca1_erroretha0_erroretha1_erroretha2_errorgptp0_statusgptp1_statusmfwd_statusrace_statuscoma_statusgwca0_statusgwca1_statusetha0_statusetha1_statusetha2_statusrmac0_statusrmac1_statusrmac2_statusgwca0_rxtx0gwca0_rxtx1gwca0_rxtx2gwca0_rxtx3gwca0_rxtx4gwca0_rxtx5gwca0_rxtx6gwca0_rxtx7gwca1_rxtx0gwca1_rxtx1gwca1_rxtx2gwca1_rxtx3gwca1_rxtx4gwca1_rxtx5gwca1_rxtx6gwca1_rxtx7gwca0_rxts0gwca0_rxts1gwca1_rxts0gwca1_rxts1rmac0_mdiormac1_mdiormac2_mdiormac0_phyrmac1_phyrmac2_phy  @ okay#$defaultethernet-ports port@0u%okay&sgmiimdio ethernet-phy@1uethernet-phy-ieee802.3-c45 ' 7&port@1u%okay(sgmiimdio ethernet-phy@2uethernet-phy-ieee802.3-c45 ' 7(port@2u% disabledserial@e6e60000:renesas,scif-r8a779f0renesas,rcar-gen4-scifrenesas,scifu@   )ifckbrg_intscif_clk QPQP txrxtxrx @  disabledserial@e6e68000:renesas,scif-r8a779f0renesas,rcar-gen4-scifrenesas,scifu@   )ifckbrg_intscif_clk SRSR txrxtxrx @  disabledserial@e6c50000:renesas,scif-r8a779f0renesas,rcar-gen4-scifrenesas,scifu@   )ifckbrg_intscif_clk WVWV txrxtxrx @  disabledserial@e6c40000:renesas,scif-r8a779f0renesas,rcar-gen4-scifrenesas,scifu@   )ifckbrg_intscif_clk YXYX txrxtxrx @  disabledspi@e6e90000/renesas,msiof-r8a779f0renesas,rcar-gen4-msiofud  j A@A@ txrxtxrx @ j  disabledspi@e6ea0000/renesas,msiof-r8a779f0renesas,rcar-gen4-msiofud  k CBCB txrxtxrx @ k  disabledspi@e6c00000/renesas,msiof-r8a779f0renesas,rcar-gen4-msiofud  l EDED txrxtxrx @ l  disabledspi@e6c10000/renesas,msiof-r8a779f0renesas,rcar-gen4-msiofud  m GFGF txrxtxrx @ m  disableddma-controller@e7350000-renesas,dmac-r8a779f0renesas,rcar-gen4-dmac u50efghijklmnopqrstuLerrorch0ch1ch2ch3ch4ch5ch6ch7ch8ch9ch10ch11ch12ch13ch14ch15 ifck @ )))))))))) ) ) ) ) ))7dma-controller@e7351000-renesas,dmac-r8a779f0renesas,rcar-gen4-dmac u51wxyz{|}~Lerrorch0ch1ch2ch3ch4ch5ch6ch7ch8ch9ch10ch11ch12ch13ch14ch15 ifck @ ))))))))))))))))7mmc@ee140000-renesas,sdhi-r8a779f0renesas,rcar-gen4-sdhiu    # icoreclkh @  ) okay*default+ ,iommu@ee4800004renesas,ipmmu-r8a779f0renesas,rcar-gen4-ipmmu-vmsauH"- @5iommu@ee4c00004renesas,ipmmu-r8a779f0renesas,rcar-gen4-ipmmu-vmsauL"- @5iommu@eed000004renesas,ipmmu-r8a779f0renesas,rcar-gen4-ipmmu-vmsau"- @57)iommu@eed400004renesas,ipmmu-r8a779f0renesas,rcar-gen4-ipmmu-vmsau"- @5iommu@eefc00004renesas,ipmmu-r8a779f0renesas,rcar-gen4-ipmmu-vmsau @57-interrupt-controller@f1000000 arm,gic-v3X C u  7chipid@fff00044 renesas,prruD{thermal-zonessensor1-thermalBXf.tripssensor1-critv criticalsensor2-thermalBXf.tripssensor2-critv criticalsensor3-thermalBXf.tripssensor3-critv criticaltimerarm,armv8-timerP    %sec-physphysvirthyp-physhyp-virtufs30-clk fixed-clock^kI7!aliases/soc/i2c@e6500000/soc/i2c@e6508000/soc/i2c@e6510000/soc/i2c@e66d0000/soc/i2c@e66d8000/soc/i2c@e66e0000/soc/serial@e6540000/soc/serial@e6550000-/soc/ethernet@e6880000/ethernet-ports/port@0-/soc/ethernet@e6880000/ethernet-ports/port@1chosen'ignore_loglevel rw root=/dev/nfs ip=onserial0:921600n8memory@48000000ymemoryuHXmemory@480000000ymemoryuregulator-vcc-sdhiregulator-fixed SDHI Vcc2Z 2Z #,(7+ compatible#address-cells#size-cellsmodelopp-sharedphandleopp-hzopp-microvoltclock-latency-nsopp-suspendcpuregdevice_typepower-domainsnext-level-cacheenable-methodcpu-idle-statesclocksoperating-points-v2cache-unifiedcache-levelentry-methodarm,psci-suspend-paramlocal-timer-stopentry-latency-usexit-latency-usmin-residency-us#clock-cellsclock-frequencybootph-allinterrupts-extendedinterrupt-parentrangesinterruptsresetsstatustimeout-secpinctrl-0pinctrl-namesgroupsfunctionpower-sourcedrive-strengthgpio-controller#gpio-cellsgpio-rangesinterrupt-controller#interrupt-cellsclock-names#power-domain-cells#reset-cells#thermal-sensor-cellsinterrupt-names#phy-cellsdmasdma-namesi2c-scl-internal-delay-nspagesizeuart-has-rtsctsreg-namesreset-namesmax-link-speednum-lanesbus-rangedma-rangesinterrupt-map-maskinterrupt-mapsnps,enable-cdm-checkmax-functionsfreq-table-hznvmem-cellsnvmem-cell-namesphysphy-handlephy-mode#dma-cellsdma-channelsiommusmax-frequencyvmmc-supplycd-gpiosbus-widthrenesas,ipmmu-main#iommu-cellspolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresisi2c0i2c1i2c2i2c3i2c4i2c5serial0serial1ethernet0ethernet1bootargsstdout-pathregulator-nameregulator-min-microvoltregulator-max-microvoltgpioenable-active-high