P8 (0*sinovoip,rk3308-bpi-p2prorockchip,rk3308 + 7Banana Pi P2 Pro (RK3308) Boardaliases=/pinctrl/gpio@ff220000C/pinctrl/gpio@ff230000I/pinctrl/gpio@ff240000O/pinctrl/gpio@ff250000U/pinctrl/gpio@ff260000[/i2c@ff040000`/i2c@ff050000e/i2c@ff060000j/i2c@ff070000o/serial@ff0a0000w/serial@ff0b0000/serial@ff0c0000/serial@ff0d0000/serial@ff0e0000/spi@ff120000/spi@ff130000/spi@ff140000/ethernet@ff4e0000/mmc@ff490000/mmc@ff480000/mmc@ff4a0000cpus+cpu@0cpuarm,cortex-a35psciZ !1BMcpu@1cpuarm,cortex-a35psci !1Mcpu@2cpuarm,cortex-a35psci !1M cpu@3cpuarm,cortex-a35psci !1M idle-statesUpscicpu-sleeparm,idle-statebsxMl2-cachecacheMopp-table-0operating-points-v2Mopp-408000000Q ~~r`@opp-600000000#F ~~r`@opp-8160000000, r`@opp-1008000000< **r`@arm-pmuarm,cortex-a35-pmu0STUV external-mac-clock fixed-clock1 Amac_clkinTM[psci arm,psci-1.0smctimerarm,armv8-timer0   xin24m fixed-clockT1n6Axin24mMagrf@ff000000&rockchip,rk3308-grfsysconsimple-mfdM;io-domains"rockchip,rk3308-io-voltage-domainaokayh v     reboot-modesyscon-reboot-modeRBRBRBRBRB syscon@ff008000.rockchip,rk3308-usb2phy-grfsysconsimple-mfd@+usb2phy@100rockchip,rk3308-usb2phy H.phyclk Ausb480m_phyTaokayM otg-port$CDE:otg-bvalidotg-idlinestateJaokayMBhost-port J :linestateJaokayMCsyscon@ff00b000-rockchip,rk3308-detect-grfsysconsimple-mfd+syscon@ff00c000+rockchip,rk3308-core-grfsysconsimple-mfd+i2c@ff040000(rockchip,rk3308-i2crockchip,rk3399-i2c .i2cpclk  Udefaultc+ adisabledi2c@ff050000(rockchip,rk3308-i2crockchip,rk3399-i2c .i2cpclk  Udefaultc+ adisabledi2c@ff060000(rockchip,rk3308-i2crockchip,rk3399-i2c .i2cpclk  Udefaultc+ adisabledi2c@ff070000(rockchip,rk3308-i2crockchip,rk3399-i2c .i2cpclk Udefaultc+ adisabledwatchdog@ff080000 rockchip,rk3308-wdtsnps,dw-wdt  aokayserial@ff0a0000&rockchip,rk3308-uartsnps,dw-apb-uart  .baudclkapb_pclkmwUdefault c adisabledserial@ff0b0000&rockchip,rk3308-uartsnps,dw-apb-uart  .baudclkapb_pclkmwUdefault c adisabledserial@ff0c0000&rockchip,rk3308-uartsnps,dw-apb-uart  .baudclkapb_pclkmwUdefaultcaokayserial@ff0d0000&rockchip,rk3308-uartsnps,dw-apb-uart  .baudclkapb_pclkmwUdefaultc adisabledserial@ff0e0000&rockchip,rk3308-uartsnps,dw-apb-uart .baudclkapb_pclkmwUdefault caokaybluetoothbrcm,bcm4345c5.lpo   :host-wakeup    `Udefault c   spi@ff120000(rockchip,rk3308-spirockchip,rk3066-spi +.spiclkapb_pclk!!txrxUdefaultc"#$% adisabledspi@ff130000(rockchip,rk3308-spirockchip,rk3066-spi +.spiclkapb_pclk!!txrxUdefaultc&'() adisabledspi@ff140000(rockchip,rk3308-spirockchip,rk3066-spi +.spiclkapb_pclk**txrxUdefaultc+,-. adisabledpwm@ff160000(rockchip,rk3308-pwmrockchip,rk3328-pwmy .pwmpclkUdefaultc/ adisabledpwm@ff160010(rockchip,rk3308-pwmrockchip,rk3328-pwmy .pwmpclkUdefaultc0 adisabledpwm@ff160020(rockchip,rk3308-pwmrockchip,rk3328-pwm y .pwmpclkUdefaultc1 adisabledpwm@ff160030(rockchip,rk3308-pwmrockchip,rk3328-pwm0y .pwmpclkUdefaultc2 adisabledpwm@ff170000(rockchip,rk3308-pwmrockchip,rk3328-pwmx .pwmpclkUdefaultc3 adisabledpwm@ff170010(rockchip,rk3308-pwmrockchip,rk3328-pwmx .pwmpclkUdefaultc4 adisabledpwm@ff170020(rockchip,rk3308-pwmrockchip,rk3328-pwm x .pwmpclkUdefaultc5 adisabledpwm@ff170030(rockchip,rk3308-pwmrockchip,rk3328-pwm0x .pwmpclkUdefaultc6 adisabledpwm@ff180000(rockchip,rk3308-pwmrockchip,rk3328-pwm .pwmpclkUdefaultc7aokayMtpwm@ff180010(rockchip,rk3308-pwmrockchip,rk3328-pwm .pwmpclkUdefaultc8 adisabledpwm@ff180020(rockchip,rk3308-pwmrockchip,rk3328-pwm  .pwmpclkUdefaultc9 adisabledpwm@ff180030(rockchip,rk3308-pwmrockchip,rk3328-pwm0 .pwmpclkUdefaultc: adisabledrktimer@ff1a0000rockchip,rk3288-timer   .pclktimersaradc@ff1e0000.rockchip,rk3308-saradcrockchip,rk3399-saradc %%.saradcapb_pclkF  saradc-apbaokay Mnefuse@ff210000rockchip,rk3308-otp!@+'.otpapb_pclkphyT phyid@7cpu-leakage@17logic-leakage@18dma-controller@ff2c0000arm,pl330arm,primecell,@% .apb_pclk<M!dma-controller@ff2d0000arm,pl330arm,primecell-@% .apb_pclk<M*i2s@ff320000rockchip,rk3308-i2s-tdm2 2.mclk_txmclk_rxhclkTV**rxtx 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P :host-wakeUdefaultcQnand-controller@ff4b0000(rockchip,rk3308-nfcrockchip,rv1108-nfcK@ Q-.ahbnfc-рcRSTUVWXUdefault adisabledethernet@ff4e0000rockchip,rk3308-gmacN @:macirq@@BBA@C[.stmmacethmac_clk_rxmac_clk_txclk_mac_refclk_mac_refoutaclk_macpclk_macclk_mac_speedrmiiUdefaultcYZ}  stmmacethG;aokay@[input\ mdio+snps,dwmac-mdioethernet-phy@1ethernet-phy-ieee802.3-c22Udefaultc]PP PM\spi@ff4c0000 rockchip,sfcL@ R=.clk_sfchclk_sfc c^_`Udefault adisabledclock-controller@ff500000rockchip,rk3308-cruPa.xin24mG;T Mcodec@ff560000rockchip,rk3308-codecVG;.mclk_txmclk_rxhclkUW codecTaokayportendpointxbM<interrupt-controller@ff580000 arm,gic-400@XX X@ X`   'Msram@fff80000 mmio-sram<+ddr-sram@0vad-sram@8000pinctrlrockchip,rk3308-pinctrlG;+<Udefaultccgpio@ff220000rockchip,gpio-bank" (CS'MPgpio@ff230000rockchip,gpio-bank# )CS'gpio@ff240000rockchip,gpio-bank$ *CS'gpio@ff250000rockchip,gpio-bank% +CS'gpio@ff260000rockchip,gpio-bank& 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fM=i2s-2ch-0-lrckfM>i2s-2ch-0-sdofM@i2s-2ch-0-sdifM?i2s_8ch_0i2s-8ch-0-mclkfi2s-8ch-0-sclktxfi2s-8ch-0-sclkrxfi2s-8ch-0-lrcktxfi2s-8ch-0-lrckrxfi2s-8ch-0-sdo0 fi2s-8ch-0-sdo1 fi2s-8ch-0-sdo2 fi2s-8ch-0-sdo3 fi2s-8ch-0-sdi0 fi2s-8ch-0-sdi1fi2s-8ch-0-sdi2fi2s-8ch-0-sdi3fi2s_8ch_1_m0i2s-8ch-1-m0-mclkfi2s-8ch-1-m0-sclktxfi2s-8ch-1-m0-sclkrxfi2s-8ch-1-m0-lrcktxfi2s-8ch-1-m0-lrckrxfi2s-8ch-1-m0-sdo0fi2s-8ch-1-m0-sdo1-sdi3fi2s-8ch-1-m0-sdo2-sdi2 fi2s-8ch-1-m0-sdo3_sdi1 fi2s-8ch-1-m0-sdi0 fi2s_8ch_1_m1i2s-8ch-1-m1-mclk fi2s-8ch-1-m1-sclktx fi2s-8ch-1-m1-sclkrxfi2s-8ch-1-m1-lrcktxfi2s-8ch-1-m1-lrckrxfi2s-8ch-1-m1-sdo0fi2s-8ch-1-m1-sdo1-sdi3fi2s-8ch-1-m1-sdo2-sdi2fi2s-8ch-1-m1-sdo3_sdi1fi2s-8ch-1-m1-sdi0fpdm_m0pdm-m0-clkfpdm-m0-sdi0 fpdm-m0-sdi1 fpdm-m0-sdi2 fpdm-m0-sdi3fpdm_m1pdm-m1-clkfpdm-m1-sdi0fpdm-m1-sdi1fpdm-m1-sdi2fpdm-m1-sdi3fpdm_m2pdm-m2-clkmfpdm-m2-clkfpdm-m2-sdi0 fpdm-m2-sdi1fpdm-m2-sdi2fpdm-m2-sdi3fpwm0pwm0-pin fpwm0-pin-pull-down jM7pwm1pwm1-pinfM8pwm1-pin-pull-downjpwm2pwm2-pinfM9pwm2-pin-pull-downjpwm3pwm3-pinfM:pwm3-pin-pull-downjpwm4pwm4-pinfM3pwm4-pin-pull-downjpwm5pwm5-pinfM4pwm5-pin-pull-downjpwm6pwm6-pinfM5pwm6-pin-pull-downjpwm7pwm7-pinfM6pwm7-pin-pull-downjpwm8pwm8-pin fM/pwm8-pin-pull-down jpwm9pwm9-pin fM0pwm9-pin-pull-down jpwm10pwm10-pin fM1pwm10-pin-pull-down jpwm11pwm11-pinfM2pwm11-pin-pull-downjrtcrtc-32kfMcsdmmcsdmmc-clkkMDsdmmc-cmdlMEsdmmc-detlMFsdmmc-pwrenksdmmc-bus1lsdmmc-bus4@llllMGsdiosdio-clkdMNsdio-cmdeMMsdio-pwrendsdio-wrptdsdio-intndsdio-bus1esdio-bus4@eeeeMLspdif_inspdif-infspdif_outspdif-outfMAspi0spi0-clklM"spi0-csn0lM#spi0-misolM$spi0-mosilM%spi1spi1-clk lM&spi1-csn0 lM'spi1-miso lM(spi1-mosi lM)spi1-m1spi1m1-misolspi1m1-mosilspi1m1-clklspi1m1-csn0 lspi2spi2-clklM+spi2-csn0lM,spi2-misolM-spi2-mosilM.tsadctsadc-otp-pin ftsadc-otp-out fuart0uart0-xfer mmMuart0-ctsfMuart0-rtsfMuart0-rts-pinfuart1uart1-xfer mmMuart1-ctsfMuart1-rtsfMuart2-m0uart2m0-xfer mmMuart2-m1uart2m1-xfer mmuart3uart3-xfer  m mMuart3-m1uart3m1-xfer mmuart4uart4-xfer  mmMuart4-ctsfMuart4-rtsfMuart4-rts-pinfbtbt-reg-on fMbt-wake-host fMhost-wake-bt fM ledsled-en0fMqled-en1fMrsoundphone-ctlfMpwifiwifi-reg-onfMuwifi-wake-hostjMQchosenserial2:1500000n8adc-keys adc-keysnbuttonsw@!dbutton-recovery /Recovery5h@'analog-soundaudio-graph-card/rockchip,rk3308ZoUdefaultcpleds gpio-ledsUdefaultcqrblue-led_eonspower P /blue:power |default-ongreen-led_eon sheartbeat P/green:heartbeat |heartbeatregulator-1v04-vdd-logregulator-fixedvdd_logހހsregulator-1v5-vcc-ddrregulator-fixedvcc_ddr``sregulator-1v8-vccregulator-fixedvcc_1v8w@w@ M regulator-3v3-vcc-ioregulator-fixedvcc_io2Z2ZsM regulator-5v0-vcc-inregulator-fixedvcc_inLK@LK@Msregulator-vdd-corepwm-regulatorts vdd_core xr`Msdio-pwrseqmmc-pwrseq-simplecuUdefault PMO compatibleinterrupt-parent#address-cells#size-cellsmodelgpio0gpio1gpio2gpio3gpio4i2c0i2c1i2c2i2c3serial0serial1serial2serial3serial4spi0spi1spi2ethernet0mmc0mmc1mmc2device_typeregenable-methodclocks#cooling-cellsdynamic-power-coefficientoperating-points-v2cpu-idle-statesnext-level-cachecpu-supplyphandleentry-methodlocal-timer-stoparm,psci-suspend-paramentry-latency-usexit-latency-usmin-residency-uscache-levelcache-unifiedopp-sharedopp-hzopp-microvoltclock-latency-nsopp-suspendinterruptsinterrupt-affinityclock-frequencyclock-output-names#clock-cellsstatusvccio0-supplyvccio1-supplyvccio2-supplyvccio3-supplyvccio4-supplyvccio5-supplyoffsetmode-bootloadermode-loadermode-normalmode-recoverymode-fastbootassigned-clocksassigned-clock-parentsclock-namesinterrupt-names#phy-cellspinctrl-namespinctrl-0reg-shiftreg-io-widthuart-has-rtsctsdevice-wakeup-gpiosshutdown-gpiosmax-speedvbat-supplyvddio-supplydmasdma-names#pwm-cells#io-channel-cellsresetsreset-namesvref-supplyarm,pl330-periph-burst#dma-cellsrockchip,grf#sound-dai-cellsdai-formatmclk-fsremote-endpointdr_modeg-np-tx-fifo-sizeg-rx-fifo-sizeg-tx-fifo-sizephysphy-namesbus-widthfifo-depthmax-frequencycap-mmc-highspeedcap-sd-highspeeddisable-wpvmmc-supplymmc-hs200-1_8vno-sdno-sdionon-removablecap-sdio-irqkeep-power-in-suspendmmc-pwrseqno-mmcsd-uhs-sdr104assigned-clock-ratesphy-modeclock_in_outphy-handlephy-supplyreset-assert-usreset-deassert-usreset-gpios#reset-cells#interrupt-cellsinterrupt-controllerrangesgpio-controller#gpio-cellsbias-pull-upbias-pull-downbias-disabledrive-strengthinput-schmitt-enableoutput-highoutput-lowinput-enablerockchip,pinsstdout-pathio-channelsio-channel-nameskeyup-threshold-microvoltpoll-intervallabellinux,codepress-threshold-microvoltdaiscolordefault-statefunctionlinux,default-triggerregulator-nameregulator-always-onregulator-boot-onregulator-min-microvoltregulator-max-microvoltvin-supplypwmspwm-supplyregulator-settling-time-up-us