8( ؜(rockchip,rk3399-evb-indrockchip,rk3399 +%7Rockchip RK3399 EVB IND LPDDR4 Boardaliases=/pinctrl/gpio@ff720000C/pinctrl/gpio@ff730000I/pinctrl/gpio@ff780000O/pinctrl/gpio@ff788000U/pinctrl/gpio@ff790000[/i2c@ff3c0000`/i2c@ff110000e/i2c@ff120000j/i2c@ff130000o/i2c@ff3d0000t/i2c@ff140000y/i2c@ff150000~/i2c@ff160000/i2c@ff3e0000/serial@ff180000/serial@ff190000/serial@ff1a0000/serial@ff1b0000/serial@ff370000/spi@ff1c0000/spi@ff1d0000/spi@ff1e0000/spi@ff350000/spi@ff1f0000/spi@ff200000/mmc@fe330000/mmc@fe320000cpus+cpu-mapcluster0core0core1core2core3cluster1core0core1cpu@0cpuarm,cortex-a53psci #d= MZ@ly@   cpu@1cpuarm,cortex-a53psci #d= MZ@ly@   cpu@2cpuarm,cortex-a53psci #d= MZ@ly@   cpu@3cpuarm,cortex-a53psci #d= MZ@ly@   cpu@100cpuarm,cortex-a72psci  #= MZ@ly@thermal-idle'cpu@101cpuarm,cortex-a72psci  #= MZ@ly@thermal-idle'l2-cache-cluster0cacheO\@n l2-cache-cluster1cacheO\@nidle-statespscicpu-sleeparm,idle-state 1HxY cluster-sleeparm,idle-state 1HY display-subsystemrockchip,display-subsystemjmemory-controllerrockchip,rk3399-dmcp} dmc_clk disabledpmu_a53arm,cortex-a53-pmupmu_a72arm,cortex-a72-pmupsci arm,psci-1.0smctimerarm,armv8-timer@   xin24m fixed-clockn6xin24mpcie@f8000000rockchip,rk3399-pcie axi-baseapb-basepci+   Gaclkaclk-perfhclkpm0123"syslegacyclient2`ESb j,opcie-phy-0pcie-phy-1pcie-phy-2pcie-phy-38y8(coremgmtmgmt-stickypipepmpclkaclk disabledinterrupt-controllerpcie-ep@f8000000rockchip,rk3399-pcie-ep apb-basemem-base  Gaclkaclk-perfhclkpm8(coremgmtmgmt-stickypipepmpclkaclk j,opcie-phy-0pcie-phy-1pcie-phy-2pcie-phy-3 default disabledethernet@fe300000rockchip,rk3399-gmac0 "macirq8 ighfjfMstmmacethmac_clk_rxmac_clk_txclk_mac_refclk_mac_refoutaclk_macpclk_mac stmmaceth disabledmmc@fe3100000rockchip,rk3399-dw-mshcrockchip,rk3288-dw-mshc1@@р  Mbiuciuciu-driveciu-sample*yreset disabledmmc@fe3200000rockchip,rk3399-dw-mshcrockchip,rk3288-dw-mshc2@Aр5E   Lbiuciuciu-driveciu-sample*zresetokayZdvdefault  !mmc@fe330000+rockchip,rk3399-sdhci-5.1arasan,sdhci-5.13 5NE  Nclk_xinclk_ahbemmc_cardclockj" ophy_arasanokayZ.4usb@fe380000 generic-ehci8 #j$ousbokayusb@fe3a0000 generic-ohci: #j$ousbokayusb@fe3c0000 generic-ehci< %j&ousbokayusb@fe3e0000 generic-ohci>  %j&ousbokaydebug@fe430000&arm,coresight-cpu-debugarm,primecellC M apb_pclkdebug@fe432000&arm,coresight-cpu-debugarm,primecellC  M apb_pclkdebug@fe434000&arm,coresight-cpu-debugarm,primecellC@ M apb_pclkdebug@fe436000&arm,coresight-cpu-debugarm,primecellC` M apb_pclkdebug@fe610000&arm,coresight-cpu-debugarm,primecella L apb_pclkdebug@fe710000&arm,coresight-cpu-debugarm,primecellq L apb_pclkusb@fe800000rockchip,rk3399-dwc3+y0 Gref_clksuspend_clkbus_clkaclk_usb3_rksoc_axi_perfaclk_usb3grf_clk% usb3-otgokayusb@fe800000 snps,dwc3i refbus_earlysuspendBotgj'(ousb2-phyusb3-phy Jutmi_wideSkokayusb@fe900000rockchip,rk3399-dwc3+y0 Gref_clksuspend_clkbus_clkaclk_usb3_rksoc_axi_perfaclk_usb3grf_clk& usb3-otgokayusb@fe900000 snps,dwc3n refbus_earlysuspendBhostj)*ousb2-phyusb3-phy Jutmi_wideSkokaydp@fec00000rockchip,rk3399-cdn-dp 5rE   ruocore-clkpclkspdifgrfj+, HJspdifdptxapbcore disabledportsport+endpoint@0-endpoint@1.interrupt-controller@fee00000 arm,gic-v3+yP  msi-controller@fee20000arm,gic-v3-its ppi-partitionsinterrupt-partition-0#interrupt-partition-1#saradc@ff100000rockchip,rk3399-saradc>, Pesaradcapb_pclk saradc-apb disabledcrypto@ff8b0000rockchip,rk3399-crypto@ hclk_masterhclk_slavesclkmasterslavecrypto-rstcrypto@ff8b8000rockchip,rk3399-crypto@ hclk_masterhclk_slavesclkmasterslavecrypto-rsti2c@ff110000rockchip,rk3399-i2c5AE  AU i2cpclk;default/+ disabledi2c@ff120000rockchip,rk3399-i2c5BE  BV i2cpclk#default0+ disabledi2c@ff130000rockchip,rk3399-i2c5CE  CW i2cpclk"default1+ disabledi2c@ff140000rockchip,rk3399-i2c5DE  DX i2cpclk&default2+ disabledi2c@ff150000rockchip,rk3399-i2c5EE  EY i2cpclk%default3+ disabledi2c@ff160000rockchip,rk3399-i2c5FE  FZ i2cpclk$default4+ disabledserial@ff180000&rockchip,rk3399-uartsnps,dw-apb-uart Q`baudclkapb_pclkc>Hdefault5 disabledserial@ff190000&rockchip,rk3399-uartsnps,dw-apb-uart Rabaudclkapb_pclkb>Hdefault6 disabledserial@ff1a0000&rockchip,rk3399-uartsnps,dw-apb-uart Sbbaudclkapb_pclkd>Hdefault7okayserial@ff1b0000&rockchip,rk3399-uartsnps,dw-apb-uart Tcbaudclkapb_pclke>Hdefault8 disabledspi@ff1c0000(rockchip,rk3399-spirockchip,rk3066-spi G[spiclkapb_pclkDU9 9 Ztxrxdefault:;<=+ disabledspi@ff1d0000(rockchip,rk3399-spirockchip,rk3066-spi H\spiclkapb_pclk5U9 9 Ztxrxdefault>?@A+ disabledspi@ff1e0000(rockchip,rk3399-spirockchip,rk3066-spi I]spiclkapb_pclk4U99ZtxrxdefaultBCDE+ disabledspi@ff1f0000(rockchip,rk3399-spirockchip,rk3066-spi J^spiclkapb_pclkCU99ZtxrxdefaultFGHI+ disabledspi@ff200000(rockchip,rk3399-spirockchip,rk3066-spi  K_spiclkapb_pclkUJJ ZtxrxdefaultKLMN+ disabledthermal-zonescpu-thermalddzOtripscpu_alert0ppassivePcpu_alert1$passiveQcpu_crits criticalcooling-mapsmap0Pmap1QHgpu-thermalddzOtripsgpu_alert0$passiveRgpu_crits criticalcooling-mapsmap0R Stsadc@ff260000rockchip,rk3399-tsadc&a5OE q Odtsadcapb_pclk tsadc-apbsinitdefaultsleepTUTokayOqos@ffa58000rockchip,rk3399-qossyscon ]qos@ffa5c000rockchip,rk3399-qossyscon ^qos@ffa60080rockchip,rk3399-qossyscon qos@ffa60100rockchip,rk3399-qossyscon qos@ffa60180rockchip,rk3399-qossyscon qos@ffa70000rockchip,rk3399-qossyscon aqos@ffa70080rockchip,rk3399-qossyscon bqos@ffa74000rockchip,rk3399-qossyscon@ _qos@ffa76000rockchip,rk3399-qossyscon` `qos@ffa90000rockchip,rk3399-qossyscon cqos@ffa98000rockchip,rk3399-qossyscon Vqos@ffaa0000rockchip,rk3399-qossyscon dqos@ffaa0080rockchip,rk3399-qossyscon eqos@ffaa8000rockchip,rk3399-qossyscon fqos@ffaa8080rockchip,rk3399-qossyscon gqos@ffab0000rockchip,rk3399-qossyscon Wqos@ffab0080rockchip,rk3399-qossyscon Xqos@ffab8000rockchip,rk3399-qossyscon Yqos@ffac0000rockchip,rk3399-qossyscon Zqos@ffac0080rockchip,rk3399-qossyscon [qos@ffac8000rockchip,rk3399-qossyscon hqos@ffac8080rockchip,rk3399-qossyscon iqos@ffad0000rockchip,rk3399-qossyscon jqos@ffad8080rockchip,rk3399-qossyscon qos@ffae0000rockchip,rk3399-qossyscon \power-management@ff310000&rockchip,rk3399-pmusysconsimple-mfd1power-controller!rockchip,rk3399-power-controller6+power-domain@34" JV6power-domain@33! JWX6power-domain@31 JY6power-domain@32   JZ[6power-domain@35# J\6power-domain@25 l6power-domain@23 J]6power-domain@22 fJ^6power-domain@27 LJ_6power-domain@28 J`6power-domain@8 ~}6power-domain@9  6power-domain@24 Jab6power-domain@156+power-domain@21 rJc6power-domain@19 Jde6power-domain@20 Jfg6power-domain@166+power-domain@17 Jhi6power-domain@18 Jj6syscon@ff320000)rockchip,rk3399-pmugrfsysconsimple-mfd2io-domains&rockchip,rk3399-pmu-io-voltage-domainokayQkspi@ff350000(rockchip,rk3399-spirockchip,rk3066-spi5 llspiclkapb_pclk<defaultmnop+ disabledserial@ff370000&rockchip,rk3399-uartsnps,dw-apb-uart7 ll"baudclkapb_pclkf>Hdefaultq disabledi2c@ff3c0000rockchip,rk3399-i2c<5l E  l l i2cpclk9defaultr+okay`xregulator@10 tcs,tcs4525defaultsvdd_gpu` 4 t uregulator-state-mem<regulator@1c tcs,tcs4525defaultv vdd_cpu_b` 4 t uregulator-state-mem<pmic@20rockchip,rk809 xin32krk808-clkout2 udefaultwUctot{ttxxtytregulatorsDCDC_REG1 vdd_centerp qqregulator-state-mem<DCDC_REG2 vdd_cpu_lp qq regulator-state-mem<DCDC_REG3vcc_ddrregulator-state-memDCDC_REG4 vcc3v3_sys2Z2Zyregulator-state-mem2ZDCDC_REG5 vcc_buck5!!xregulator-state-mem!LDO_REG1 vcca_0v9  regulator-state-mem<LDO_REG2vcc_1v8w@w@kregulator-state-memw@LDO_REG3 vcc0v9_soc  regulator-state-mem LDO_REG4 vcca_1v8w@w@regulator-state-mem<LDO_REG5 vdd1v5_dvp``regulator-state-mem<LDO_REG6vcc_1v5``regulator-state-mem<LDO_REG7vcc_3v0--regulator-state-mem<LDO_REG8 vccio_sd2Zw@!regulator-state-mem<LDO_REG9vcc_sd2Z2Z regulator-state-mem<SWITCH_REG1 vcc5v0_usbregulator-state-memSWITCH_REG2 vccio_3v3regulator-state-mem<i2c@ff3d0000rockchip,rk3399-i2c=5l E  l l i2cpclk8defaultz+ disabledi2c@ff3e0000rockchip,rk3399-i2c>5l E  l l i2cpclk:default{+ disabledpwm@ff420000(rockchip,rk3399-pwmrockchip,rk3288-pwmB default| l disabledpwm@ff420010(rockchip,rk3399-pwmrockchip,rk3288-pwmB default} l disabledpwm@ff420020(rockchip,rk3399-pwmrockchip,rk3288-pwmB  default~ l disabledpwm@ff420030(rockchip,rk3399-pwmrockchip,rk3288-pwmB0 default l disableddfi@ff630000c@rockchip,rk3399-dfip y pclk_ddr_monvideo-codec@ff650000rockchip,rk3399-vpue rq "vepuvdpu  aclkhclk %iommu@ff650800rockchip,iommue@s  aclkiface ,video-codec@ff660000rockchip,rk3399-vdecft  axiahbcabaccore % iommu@ff660480rockchip,iommu f@f@u  aclkiface  ,iommu@ff670800rockchip,iommug@*  aclkiface , disabledrga@ff680000rockchip,rk3399-rgah7 maclkhclksclkjgi coreaxiahb!efuse@ff690000rockchip,rk3399-efusei+ } pclk_efusecpu-id@7cpu-leakage@17gpu-leakage@18center-leakage@19cpu-leakage@1alogic-leakage@1bwafer-info@1cdma-controller@ff6d0000arm,pl330arm,primecellm@  9 D  apb_pclkJdma-controller@ff6e0000arm,pl330arm,primecelln@  9 D  apb_pclk9clock-controller@ff750000rockchip,rk3399-pmucruu xin24m [5lE(Jlclock-controller@ff760000rockchip,rk3399-cruv xin24m [5@BCxDE#g/;рxh<4`#Fׄׄ ׄsyscon@ff770000&rockchip,rk3399-grfsysconsimple-mfdw+io-domains"rockchip,rk3399-io-voltage-domainokay h u  !mipi-dphy-rx0rockchip,rk3399-mipi-dphy-rx0 wodphy-refdphy-cfggrf  disabledusb2phy@e450rockchip,rk3399-usb2phyP {phyclkclk_usbphy0_480mokay#host-port  "linestateokay$otg-port 0ghj"otg-bvalidotg-idlinestateokay'usb2phy@e460rockchip,rk3399-usb2phy` |phyclkclk_usbphy1_480mokay%host-port  "linestateokay&otg-port 0lmo"otg-bvalidotg-idlinestateokay)phy@f780rockchip,rk3399-emmc-phy$ emmcclk 2 okay"pcie-phyrockchip,rk3399-pcie-phy refclk phy disabledphy@ff7c0000rockchip,rk3399-typec-phy| ~}tcpdcoretcpdphy-ref5~ELuphyuphy-pipeuphy-tcphyokaydp-port +usb3-port (phy@ff800000rockchip,rk3399-typec-phy tcpdcoretcpdphy-ref5E Muphyuphy-pipeuphy-tcphyokaydp-port ,usb3-port *watchdog@ff848000 rockchip,rk3399-wdtsnps,dw-wdt |xrktimer@ff850000rockchip,rk3399-timerQ hZ pclktimerspdif@ff870000rockchip,rk3399-spdifBUJZtx mclkhclk Udefault disabledi2s@ff880000(rockchip,rk3399-i2srockchip,rk3066-i2s'UJJZtxrxi2s_clki2s_hclk Vbclk_onbclk_off disabledi2s@ff890000(rockchip,rk3399-i2srockchip,rk3066-i2s(UJJZtxrxi2s_clki2s_hclk Wdefault disabledi2s@ff8a0000(rockchip,rk3399-i2srockchip,rk3066-i2s)UJJZtxrxi2s_clki2s_hclk Xokayvop@ff8f0000rockchip,rk3399-vop-lit w5Eׄ aclk_vopdclk_vophclk_vop % axiahbdclkokayport+endpoint@0endpoint@1endpoint@2endpoint@3endpoint@4.iommu@ff8f3f00rockchip,iommu?w  aclkiface ,okayvop@ff900000rockchip,rk3399-vop-big v5Eׄ aclk_vopdclk_vophclk_vop % axiahbdclkokayport+endpoint@0endpoint@1endpoint@2endpoint@3endpoint@4-iommu@ff903f00rockchip,iommu?v  aclkiface ,okayisp0@ff910000rockchip,rk3399-cif-isp@+ nispaclkhclk %jodphy disabledports+port@0+iommu@ff914000rockchip,iommu @P+  aclkiface , isp1@ff920000rockchip,rk3399-cif-isp@, oispaclkhclk %jodphy disabledports+port@0+iommu@ff924000rockchip,iommu @P,  aclkiface , hdmi-soundsimple-audio-card i2s  hdmi-soundokaysimple-audio-card,cpu #simple-audio-card,codec #hdmi@ff940000rockchip,rk3399-dw-hdmiH( tqpoiahbisfrcecgrfrefokaydefaultports+port@0+endpoint@0endpoint@1port@1dsi@ff960000*rockchip,rk3399-mipi-dsisnps,dw-mipi-dsi-  porefpclkphy_cfggrfapb+ disabledports+port@0+endpoint@0endpoint@1port@1dsi@ff968000*rockchip,rk3399-mipi-dsisnps,dw-mipi-dsi.  qorefpclkphy_cfggrfapb+  disabledports+port@0+endpoint@0endpoint@1port@1dp@ff970000rockchip,rk3399-edp  jlo dppclkgrfdefaultdp disabledports+port@0+endpoint@0endpoint@1port@1gpu@ff9a0000#rockchip,rk3399-maliarm,mali-t8600 "jobmmugpu # P#okay -Spinctrlrockchip,rk3399-pinctrlp+ygpio@ff720000rockchip,gpio-bankr l 9 Igpio@ff730000rockchip,gpio-banks l 9 Iugpio@ff780000rockchip,gpio-bankx P 9 Igpio@ff788000rockchip,gpio-bankx Q 9 Igpio@ff790000rockchip,gpio-banky R 9 Ipcfg-pull-up Upcfg-pull-down bpcfg-pull-none qpcfg-pull-none-12ma q ~ pcfg-pull-none-13ma q ~ pcfg-pull-none-18ma q ~pcfg-pull-none-20ma q ~pcfg-pull-up-2ma U ~pcfg-pull-up-8ma U ~pcfg-pull-up-18ma U ~pcfg-pull-up-20ma U ~pcfg-pull-down-4ma b ~pcfg-pull-down-8ma b ~pcfg-pull-down-12ma b ~ pcfg-pull-down-18ma b ~pcfg-pull-down-20ma b ~pcfg-output-high pcfg-output-low pcfg-input-enable pcfg-input-pull-up  Upcfg-input-pull-down  bclockclk-32k cifcif-clkin  cif-clkouta  edpedp-hpd gmacrgmii-pins     rmii-pins      i2c0i2c0-xfer ri2c1i2c1-xfer /i2c2i2c2-xfer 0i2c3i2c3-xfer 1i2c4i2c4-xfer   zi2c5i2c5-xfer   2i2c6i2c6-xfer   3i2c7i2c7-xfer 4i2c8i2c8-xfer {i2s0i2s0-2ch-bus` i2s0-2ch-bus-bclk-off` i2s0-8ch-bus i2s0-8ch-bus-bclk-off i2s1i2s1-2ch-busP i2s1-2ch-bus-bclk-offP sdio0sdio0-bus1 sdio0-bus4@ sdio0-cmd sdio0-clk sdio0-cd sdio0-pwr sdio0-bkpwr sdio0-wp sdio0-int sdmmcsdmmc-bus1 sdmmc-bus4@    sdmmc-clk  sdmmc-cmd  sdmmc-cd sdmmc-wp suspendap-pwroff ddrio-pwroff spdifspdif-bus spdif-bus-1 spi0spi0-clk :spi0-cs0 =spi0-cs1 spi0-tx ;spi0-rx <spi1spi1-clk  >spi1-cs0  Aspi1-rx @spi1-tx ?spi2spi2-clk  Bspi2-cs0  Espi2-rx  Dspi2-tx  Cspi3spi3-clk mspi3-cs0 pspi3-rx ospi3-tx nspi4spi4-clk Fspi4-cs0 Ispi4-rx Hspi4-tx Gspi5spi5-clk Kspi5-cs0 Nspi5-rx Mspi5-tx Ltestclktest-clkout0 test-clkout1 test-clkout2 tsadcotp-pin Totp-out Uuart0uart0-xfer 5uart0-cts uart0-rts uart1uart1-xfer   6uart2auart2a-xfer  uart2buart2b-xfer uart2cuart2c-xfer 7uart3uart3-xfer 8uart3-cts uart3-rts uart4uart4-xfer quarthdcpuarthdcp-xfer pwm0pwm0-pin |pwm0-pin-pull-down vop0-pwm-pin vop1-pwm-pin pwm1pwm1-pin }pwm1-pin-pull-down pwm2pwm2-pin ~pwm2-pin-pull-down pwm3apwm3a-pin pwm3bpwm3b-pin hdmihdmi-i2c-xfer hdmi-cec pciepci-clkreqn-cpm pci-clkreqnb-cpm pmicpmic-int-l wvsel1 vvsel2 sopp-table-0operating-points-v2  opp00 Q  @opp01 #F opp02 0, P Popp03 < HHopp04 G B@B@opp05 Tfr **opp-table-1operating-points-v2 opp00 Q  @opp01 #F opp02 0, opp03 < Y Yopp04 G ~~opp05 Tfr opp06 _" opp07 kI OOopp-table-2operating-points-v2opp00  0opp01 @ 0opp02 ׄ 0opp03 e Y Y0opp04 #F HH0opp05 / 0chosen serial2:1500000n8regulator-vcc5v0-sysregulator-fixed   vcc5v0_sysLK@LK@t compatibleinterrupt-parent#address-cells#size-cellsmodelgpio0gpio1gpio2gpio3gpio4i2c0i2c1i2c2i2c3i2c4i2c5i2c6i2c7i2c8serial0serial1serial2serial3serial4spi0spi1spi2spi3spi4spi5mmc0mmc1cpudevice_typeregenable-methodcapacity-dmips-mhzclocks#cooling-cellsdynamic-power-coefficientcpu-idle-statesi-cache-sizei-cache-line-sizei-cache-setsd-cache-sized-cache-line-sized-cache-setsnext-level-cacheoperating-points-v2cpu-supplyphandleduration-usexit-latency-uscache-levelcache-unifiedentry-methodlocal-timer-stoparm,psci-suspend-paramentry-latency-usmin-residency-usportsrockchip,pmudevfreq-eventsclock-namesstatusinterruptsarm,no-tick-in-suspendclock-frequencyclock-output-names#clock-cellsreg-names#interrupt-cellsaspm-no-l0sbus-rangeinterrupt-namesinterrupt-map-maskinterrupt-mapmax-link-speedmsi-mapphysphy-namesrangesresetsreset-namesinterrupt-controllermax-functionsnum-lanesrockchip,max-outbound-regionspinctrl-namespinctrl-0power-domainsrockchip,grfsnps,txpblmax-frequencyfifo-depthassigned-clocksassigned-clock-ratesbus-widthcap-mmc-highspeedcap-sd-highspeeddisable-wpno-sdiono-mmcsd-uhs-sdr104vmmc-supplyvqmmc-supplyarasan,soc-ctl-syscondisable-cqe-dcmdkeep-power-in-suspendmmc-hs400-1_8vmmc-hs400-enhanced-strobeno-sdnon-removabledr_modephy_typesnps,dis_enblslpm_quirksnps,dis-u2-freeclk-exists-quirksnps,dis_u2_susphy_quirksnps,dis-del-phy-power-chg-quirksnps,dis-tx-ipgap-linecheck-quirk#sound-dai-cellsremote-endpointmsi-controller#msi-cellsaffinity#io-channel-cellsreg-shiftreg-io-widthdmasdma-namespolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresistripcooling-devicerockchip,hw-tshut-temppinctrl-1pinctrl-2#thermal-sensor-cellsrockchip,hw-tshut-moderockchip,hw-tshut-polarity#power-domain-cellspm_qospmu1830-supplyi2c-scl-falling-time-nsi2c-scl-rising-time-nsregulator-nameregulator-always-onregulator-boot-onregulator-max-microvoltregulator-min-microvoltregulator-ramp-delayvin-supplyvsel-gpiosfcs,suspend-voltage-selectorregulator-off-in-suspendwakeup-sourcevcc1-supplyvcc2-supplyvcc3-supplyvcc4-supplyvcc5-supplyvcc6-supplyvcc7-supplyvcc8-supplyvcc9-supplyregulator-initial-moderegulator-on-in-suspendregulator-suspend-microvolt#pwm-cellsiommus#iommu-cells#dma-cellsarm,pl330-periph-burst#reset-cellsaudio-supplybt656-supplygpio1830-supplysdmmc-supply#phy-cellsdrive-impedance-ohmrockchip,disable-mmu-resetsimple-audio-card,formatsimple-audio-card,mclk-fssimple-audio-card,namesound-daimali-supplygpio-controller#gpio-cellsbias-pull-upbias-pull-downbias-disabledrive-strengthoutput-highoutput-lowinput-enablerockchip,pinsopp-sharedopp-hzopp-microvoltclock-latency-nsstdout-pathenable-active-highgpio