dC8^P(^radxa,e20crockchip,rk3528 + 7Radxa E20Caliases=/pinctrl/gpio@ff610000C/pinctrl/gpio@ffaf0000I/pinctrl/gpio@ffb00000O/pinctrl/gpio@ffb10000U/pinctrl/gpio@ffb20000[/soc/ethernet@ffbe0000e/soc/i2c@ffa58000j/soc/mmc@ffbf0000o/soc/mmc@ffc30000t/soc/serial@ff9f0000cpus+cpu-mapcluster0core0|core1|core2|core3|cpu@0arm,cortex-a53cpupscicpu@1arm,cortex-a53cpupscicpu@2arm,cortex-a53cpupscicpu@3arm,cortex-a53cpupscifirmwarescmi arm,scmi-smc+protocol@14pinctrlrockchip,rk3528-pinctrl + gpio@ff610000rockchip,gpio-banka r s G 2Bgpio@ffaf0000rockchip,gpio-bank  I 2gpio@ffb00000rockchip,gpio-bank $ % K @ 2gpio@ffb10000rockchip,gpio-bank  L ` 2gpio@ffb20000rockchip,gpio-bank  N 20pcfg-pull-upCpcfg-pull-noneP pcfg-pull-none-drv-level-0P]pcfg-pull-none-drv-level-2P]pcfg-pull-up-drv-level-2C] pcfg-pull-none-smtPlarmclkemmcemmc-bus8        1emmc-clk 2emmc-cmd 3emmc-strb 4ethfephyfephym0-led-link #fephym0-led-spd $fspigpuhdmihsmi2c0i2c1i2c1m0-xfer i2c2i2c2m1-xfer i2c3i2c4i2c4-xfer i2c5i2c6i2c7i2c7-xfer i2s0i2s1jtagpciepdmpmupwm0pwm1pwm1m0-pinspwm2pwm2m0-pinspwm3pwm4pwm5pwm6pwm7pwrrefrgmiirgmii-miim *rgmii-rx-bus20   ,rgmii-tx-bus20 +rgmii-rgmii-clk  -rgmii-rgmii-bus@   .scrsdio0sdio0-bus4@    5sdio0-clk 6sdio0-cmd 7sdio1sdio1-bus4@     8sdio1-clk 9sdio1-cmd :sdmmcsdmmc-bus4@    ;sdmmc-clk <sdmmc-cmd =sdmmc-det>sdmmc-vol-ctrl-h Gspdifspi0spi1tsi0tsi1uart0uart0m0-xfer uart1uart2uart3uart4uart5uart6uart7ethernetgmac1-rstn-l /gpio-keysuser-keyAledslan-led-g Csys-led-g Dwan-led-g Epsciarm,psci-1.0arm,psci-0.2smcreserved-memory+shmem@10f000arm,scmi-shmemtimerarm,armv8-timer0   clock-xin24m fixed-clockn6xin24mclock-gmac50m fixed-clockgmac0soc simple-bus+interrupt-controller@fed01000 arm,gic-400@ @ `   2qos@ff200000rockchip,rk3528-qossyscon qos@ff200080rockchip,rk3528-qossyscon qos@ff200100rockchip,rk3528-qossyscon  qos@ff200200rockchip,rk3528-qossyscon  qos@ff200280rockchip,rk3528-qossyscon  qos@ff200300rockchip,rk3528-qossyscon  qos@ff200380rockchip,rk3528-qossyscon  qos@ff210000rockchip,rk3528-qossyscon! qos@ff210080rockchip,rk3528-qossyscon! qos@ff220000rockchip,rk3528-qossyscon" qos@ff220080rockchip,rk3528-qossyscon" qos@ff240000rockchip,rk3528-qossyscon$ qos@ff250000rockchip,rk3528-qossyscon% qos@ff260000rockchip,rk3528-qossyscon& qos@ff270000rockchip,rk3528-qossyscon' qos@ff270080rockchip,rk3528-qossyscon' qos@ff270100rockchip,rk3528-qossyscon' qos@ff270200rockchip,rk3528-qossyscon' qos@ff270280rockchip,rk3528-qossyscon' qos@ff270300rockchip,rk3528-qossyscon' qos@ff270380rockchip,rk3528-qossyscon' qos@ff270480rockchip,rk3528-qossyscon' qos@ff270500rockchip,rk3528-qossyscon' qos@ff280000rockchip,rk3528-qossyscon( qos@ff280080rockchip,rk3528-qossyscon( qos@ff280100rockchip,rk3528-qossyscon( qos@ff280180rockchip,rk3528-qossyscon( qos@ff280200rockchip,rk3528-qossyscon( qos@ff280280rockchip,rk3528-qossyscon( qos@ff280300rockchip,rk3528-qossyscon( qos@ff280380rockchip,rk3528-qossyscon( qos@ff280400rockchip,rk3528-qossyscon( syscon@ff340000rockchip,rk3528-vpu-grfsyscon4%syscon@ff360000rockchip,rk3528-vo-grfsyscon6clock-controller@ff4a0000rockchip,rk3528-cruJ t          z y  LLFq;;]Q沀eр Cׄ#FsY@e xin24mgmac0 syscon@ff540000rockchip,rk3528-ioc-grfsysconT serial@ff9f0000&rockchip,rk3528-uartsnps,dw-apb-uart  kbaudclkapb_pclk (  okaydefault(serial@ff9f8000&rockchip,rk3528-uartsnps,dw-apb-uart  baudclkapb_pclk )    disabledserial@ffa00000&rockchip,rk3528-uartsnps,dw-apb-uart  baudclkapb_pclk *    disabledserial@ffa08000&rockchip,rk3528-uartsnps,dw-apb-uart  baudclkapb_pclk +  disabledserial@ffa10000&rockchip,rk3528-uartsnps,dw-apb-uart  1baudclkapb_pclk ,  disabledserial@ffa18000&rockchip,rk3528-uartsnps,dw-apb-uart " baudclkapb_pclk -  disabledserial@ffa20000&rockchip,rk3528-uartsnps,dw-apb-uart % baudclkapb_pclk .  disabledserial@ffa28000&rockchip,rk3528-uartsnps,dw-apb-uart ( baudclkapb_pclk /  disabledi2c@ffa50000(rockchip,rk3528-i2crockchip,rk3399-i2c  i2cpclk =+ disabledi2c@ffa58000(rockchip,rk3528-i2crockchip,rk3399-i2c  i2cpclk >+okaydefault(eeprom@50belling,bl24c16aatmel,24c16P2;Ei2c@ffa60000(rockchip,rk3528-i2crockchip,rk3399-i2c j i i2cpclk ?default(+ disabledi2c@ffa68000(rockchip,rk3528-i2crockchip,rk3399-i2c  i2cpclk @+ disabledi2c@ffa70000(rockchip,rk3528-i2crockchip,rk3399-i2c 3 2 i2cpclk Adefault(+ disabledi2c@ffa78000(rockchip,rk3528-i2crockchip,rk3399-i2c  i2cpclk B+ disabledi2c@ffa80000(rockchip,rk3528-i2crockchip,rk3399-i2c  i2cpclk C+ disabledi2c@ffa88000(rockchip,rk3528-i2crockchip,rk3399-i2c 5 4 i2cpclk Ddefault(+ disabledpwm@ffa90000(rockchip,rk3528-pwmrockchip,rk3328-pwm o n pwmpclkP disabledpwm@ffa90010(rockchip,rk3528-pwmrockchip,rk3328-pwm o n pwmpclkPokaydefault(Hpwm@ffa90020(rockchip,rk3528-pwmrockchip,rk3328-pwm  o n pwmpclkPokaydefault(Ipwm@ffa90030(rockchip,rk3528-pwmrockchip,rk3328-pwm0 o n pwmpclkP disabledpwm@ffa98000(rockchip,rk3528-pwmrockchip,rk3328-pwm r q pwmpclkP disabledpwm@ffa98010(rockchip,rk3528-pwmrockchip,rk3328-pwm r q pwmpclkP disabledpwm@ffa98020(rockchip,rk3528-pwmrockchip,rk3328-pwm  r q pwmpclkP disabledpwm@ffa98030(rockchip,rk3528-pwmrockchip,rk3328-pwm0 r q pwmpclkP disabledadc@ffae0000rockchip,rk3528-saradc saradcapb_pclk [ o bsaradc-apbnokay@ethernet@ffbd0000&rockchip,rk3528-gmacsnps,dwmac-4.20a0      >stmmacethclk_mac_refmac_clk_rxmac_clk_txpclk_macaclk_macqtmacirqeth_wake_irqrmii[  bstmmaceth !" disabledmdiosnps,dwmac-mdio+ethernet-phy@2ethernet-phy-ieee802.3-c22 "default(#$[ stmmac-axi-config, rx-queues-config<!queue0tx-queues-configR"queue0ethernet@ffbe0000&rockchip,rk3528-gmacsnps,dwmac-4.20a (stmmacethclk_mac_refpclk_macaclk_macy|macirqeth_wake_irq[ a bstmmaceth%&'(okayhoutput) rgmii-idudefault(*+,-.mdiosnps,dwmac-mdio+ethernet-phy@1ethernet-phy-ieee802.3-c22default(/N  0)stmmac-axi-config,&rx-queues-config<'queue0tx-queues-configR(queue0mmc@ffbf00000rockchip,rk3528-dwcmshcrockchip,rk3588-dwcmshc   n6 ( corebusaxiblocktimer  default(1234([ A B C D Ebcorebusaxiblocktimerokaymmc@ffc100000rockchip,rk3528-dw-mshcrockchip,rk3288-dw-mshc@  biuciuciu-driveciu-sample  default (567[ gbreset disabledmmc@ffc200000rockchip,rk3528-dw-mshcrockchip,rk3288-dw-mshc@  biuciuciu-driveciu-sample  default (89:[ hbreset disabledmmc@ffc300000rockchip,rk3528-dw-mshcrockchip,rk3288-dw-mshc@ ( '  biuciuciu-driveciu-sample рdefault(;<=>[ breset'ZokayEVa?dma-controller@ffd60000arm,pl330arm,primecell@ ^ apb_pclklozchosenserial0:1500000n8adc-keys adc-keys@buttonsw@dbutton-maskromMASKROMgpio-keys gpio-keysdefault(Abutton-user BUSER leds gpio-ledsdefault (CDEled-lan!off/lan 0 8netdevled-sys!on /heartbeat 0 8heartbeatled-wan!off/wan 08netdevregulator-0v9-vddregulator-fixedNvdd_0v9]q  Fregulator-1v1-vcc-ddrregulator-fixedNvcc_ddr]qFregulator-1v8-vccregulator-fixedNvcc_1v8]qw@w@regulator-3v3-vccregulator-fixedNvcc_3v3]q2Z2ZFregulator-5v0-vcc-sysregulator-fixed Nvcc5v0_sys]qLK@LK@Fregulator-vccio-sdregulator-gpio 0default(G Nvccio_sdw@2Zw@2ZF?regulator-vdd-armpwm-regulatorHFNvdd_arm]q bShregulator-vdd-logicpwm-regulatorIF Nvdd_logic]q Y compatibleinterrupt-parent#address-cells#size-cellsmodelgpio0gpio1gpio2gpio3gpio4ethernet0i2c1mmc0mmc1serial0cpuregdevice_typeenable-methodclockscpu-supplyphandlearm,smc-idshmem#clock-cellsrockchip,grfrangesinterruptsgpio-controller#gpio-cellsgpio-rangesinterrupt-controller#interrupt-cellsbias-pull-upbias-disabledrive-strengthinput-schmitt-enablerockchip,pinsno-mapclock-frequencyclock-output-namesassigned-clocksassigned-clock-ratesclock-names#reset-cellsdmasreg-io-widthreg-shiftstatuspinctrl-namespinctrl-0pagesizeread-onlyvcc-supply#pwm-cellsresetsreset-names#io-channel-cellsvref-supplyinterrupt-namesphy-handlephy-modesnps,axi-configsnps,mixed-burstsnps,mtl-rx-configsnps,mtl-tx-configsnps,tsophy-is-integratedsnps,blensnps,rd_osr_lmtsnps,wr_osr_lmtsnps,rx-queues-to-usesnps,tx-queues-to-useclock_in_outphy-supplyreset-assert-usreset-deassert-usreset-gpiosmax-frequencybus-widthcap-mmc-highspeedmmc-hs200-1_8vno-sdno-sdionon-removablevmmc-supplyvqmmc-supplyfifo-depthrockchip,default-sample-phasecap-sd-highspeeddisable-wpsd-uhs-sdr104#dma-cellsarm,pl330-periph-burststdout-pathio-channelsio-channel-nameskeyup-threshold-microvoltpoll-intervallabellinux,codepress-threshold-microvoltwakeup-sourcecolordefault-statefunctionlinux,default-triggerregulator-nameregulator-always-onregulator-boot-onregulator-min-microvoltregulator-max-microvoltvin-supplystatespwmspwm-supplyregulator-settling-time-up-us