8( x)rockchip,rk3576-evb1-v10rockchip,rk3576 +7Rockchip RK3576 EVB V10 Boardaliases=/soc/i2c@27300000B/soc/i2c@2ac40000G/soc/i2c@2ac50000L/soc/i2c@2ac60000Q/soc/i2c@2ac70000V/soc/i2c@2ac80000[/soc/i2c@2ac90000`/soc/i2c@2aca0000e/soc/i2c@2acb0000j/soc/i2c@2ae80000o/soc/serial@2ad40000w/soc/serial@27310000/soc/serial@2ad50000/soc/serial@2ad60000/soc/serial@2ad70000/soc/serial@2ad80000/soc/serial@2ad90000/soc/serial@2ada0000/soc/serial@2adb0000/soc/serial@2adc0000/soc/serial@2afc0000/soc/serial@2afd0000/soc/spi@2acf0000/soc/spi@2ad00000/soc/spi@2ad10000/soc/spi@2ad20000/soc/spi@2ad30000/soc/ethernet@2a220000/soc/ethernet@2a230000clock-xin32k fixed-clockxin32k!clock-xin24m fixed-clock!n6xin24mclock-spll fixed-clock!)׫spllcpus+cpu-mapcluster0core0.core1.core2.core3.cluster1core0.core1.core2.core3. cpu@02cpuarm,cortex-a53>BpsciPc j ~x  cpu@12cpuarm,cortex-a53>BpsciPc j  cpu@22cpuarm,cortex-a53>BpsciPc j  cpu@32cpuarm,cortex-a53>BpsciPc j  cpu@1002cpuarm,cortex-a72>BpsciPc j~@ cpu@1012cpuarm,cortex-a72>BpsciPc j cpu@1022cpuarm,cortex-a72>BpsciPc j cpu@1032cpuarm,cortex-a72>BpsciPc j  idle-statespscicpu-sleeparm,idle-statex  opp-table-cluster0operating-points-v21 opp-408000000<Q C ` `~Q@opp-600000000<#F C ` `~Q@opp-816000000<0, C ` `~Q@opp-1008000000<< C ` `~Q@opp-1200000000<G C ` `~Q@opp-1416000000<Tfr C  ~Q@opp-1608000000<_" C q q~Q@opp-1800000000<kI C ~Q@bopp-2016000000<x) C ~Q@opp-2208000000<h C~~~Q@opp-table-cluster1operating-points-v21opp-408000000<Q C ` `~Q@bopp-600000000<#F C ` `~Q@opp-816000000<0, C ` `~Q@opp-1008000000<< C ` `~Q@opp-1200000000<G C ` `~Q@opp-1416000000<Tfr C 4 4~Q@opp-1608000000<_" C @ @~Q@opp-1800000000<kI C 5 5~Q@opp-2016000000<x) C )$ )$~Q@opp-2208000000<h CHH~Q@opp-2304000000<T@ C~~~Q@opp-table-gpuoperating-points-v2Qopp-300000000< C ` ` Popp-400000000<ׄ C ` ` Popp-500000000<e C ` ` Popp-600000000<#F C ` ` Popp-700000000<)' C   Popp-800000000</ C X X Popp-900000000<5 C Popp-950000000<8ـ C P P Pdisplay-subsystemrockchip,display-subsystemnfirmwarescmi arm,scmi-smct+protocol@14>! hdmi-soundsimple-audio-cardHDMIi2s disabledsimple-audio-card,codecsimple-audio-card,cpupinctrlrockchip,rk3576-pinctrl+gpio@27320000rockchip,gpio-bank>'2c  0<gpio@2ae10000rockchip,gpio-bank>*c  0<gpio@2ae20000rockchip,gpio-bank>*c@  0<jgpio@2ae30000rockchip,gpio-bank>*c`  0<ugpio@2ae40000rockchip,gpio-bank>*c  0<"pcfg-pull-upMpcfg-pull-noneZpcfg-pull-none-drv-level-2Zgpcfg-pull-up-drv-level-2Mgpcfg-pull-up-drv-level-3Mgpcfg-pull-none-smtZvaupll_clkcam_clk0cam_clk1cam_clk2can0can1clk0_32kclk1_32kclk_32kcpubigcpulitdebug0_testdebug1_testdebug2_testdebug3_testdebug4_testdebug5_testdebug6_testdebug7_testdpdsm_auddsmcdsmc_testclkdsmc_testdataedp_txemmcemmc-rstnout }emmc-bus8~emmc-clk emmc-cmdemmc-strb emmc_testclkemmc_testdataeth0eth0m0-miim deth0m0-rx_bus20  feth0m0-tx_bus20   eeth0m0-rgmii_clk geth0m0-rgmii_bus@heth1eth1m0-miim oeth1m0-rx_bus20qeth1m0-tx_bus20peth1m0-rgmii_clk reth1m0-rgmii_bus@seth0_ptpeth0_testrxclketh0_testrxdeth1_ptpeth1_testrxclketh1_testrxdeth_clk0_25methm0-clk0-25m-outieth_clk1_25methm0-clk1-25m-outtflexbus0flexbus1flexbus0_testclkflexbus0_testdataflexbus1_testclkflexbus1_testdatafspi0fspi1fspi0_testclkfspi0_testdatafspi1_testclkfspi1_testdatagpuhdmi_txhdmi_txm0-pins   Xhdmi-tx-scl Yhdmi-tx-sda Zi2c0i2c0m0-xfer   )i2c1i2c1m0-xfer   i2c2i2c2m0-xfer   i2c3i2c3m0-xfer   i2c4i2c4m0-xfer   i2c5i2c5m0-xfer   i2c6i2c6m0-xfer   i2c7i2c7m0-xfer   i2c8i2c8m0-xfer   i2c9i2c9m0-xfer   i3c0i3c1i3c0_sdai3c1_sdaisp_flashisp_prelightjtagmipinpupcie0pcie1pdm0pdm1pmu_debug_testpwm0pwm1pwm2ref_clk0ref_clk1ref_clk2sai0sai0m0-lrcksai0m0-sclksai0m0-sdi0sai0m0-sdi1 sai0m0-sdi2 sai0m0-sdi3 sai0m0-sdo0sai0m0-sdo1sai0m0-sdo2 sai0m0-sdo3sai1sai1m0-lrcksai1m0-sclksai1m0-sdi0 sai1m0-sdo0sai1m0-sdo1sai1m0-sdo2 sai1m0-sdo3 sai2sai2m0-lrcksai2m0-sclksai2m0-sdisai2m0-sdosai3sai3m0-lrcksai3m0-sclksai3m0-sdisai3m0-sdo sai4sai4m0-lrcksai4m0-sclksai4m0-sdisai4m0-sdo sata30sata30_port0sata30_port1sdmmc0sdmmc0-bus4@zsdmmc0-clkwsdmmc0-cmdxsdmmc0-detysdmmc0-pwren{sdmmc1sdmmc0_testclksdmmc0_testdatasdmmc1_testclksdmmc1_testdataspdifspi0spi0m0-pins0   spi0m0-csn0 spi0m0-csn1 spi1spi1m0-pins0   spi1m0-csn0 spi1m0-csn1 spi2spi2m0-pins0   spi2m0-csn0 spi2m0-csn1 spi3spi3m0-pins0   spi3m0-csn0 spi3m0-csn1 spi4spi4m0-pins0   spi4m0-csn0 spi4m0-csn1 test_clktsadctsadc_ctrluart0uart0m0-xfer   uart1uart1m0-xfer   +uart2uart2m0-xfer   uart3uart3m0-xfer   uart4uart4m0-xfer   uart5uart5m0-xfer   uart6uart6m0-xfer   uart7uart7m0-xfer   uart8uart8m0-xfer   uart9uart9m0-xfer   uart10uart10m0-xfer   uart11uart11m0-xfer   ufsufs-refclkvufs_testdata0ufs_testdata1ufs_testdata2ufs_testdata3vi_cifvo_lcdcvo_postvp0_syncvp1_syncvp2_syncpmicpmic-pins   vovo_ebcusbusb-host-pwrenusb-otg0-pwrenusbc0-intpmu-a53arm,cortex-a53-pmu0pmu-a72arm,cortex-a72-pmu0 psci arm,psci-1.0Ismctimerarm,armv8-timer0   soc simple-bus+pcie@22000000*rockchip,rk3576-pcierockchip,rk3568-pcie0>"@*  dbiapbconfig(c$aclk_mstaclk_slvaclk_dbipclkaux2pciHsyspmcmsglegacyerrmsi<`,9HR Wpcie-phyaT    o vpwrpipe+ disabledlegacy-interrupt-controller<  pcie@22400000*rockchip,rk3576-pcierockchip,rk3568-pcie0>"@@*!!dbiapbconfig /(c  $aclk_mstaclk_slvaclk_dbipclkaux2pciH     syspmcmsglegacyerrmsi<`    ,9HR! Wpcie-phya T!!! !  o vpwrpipe+ disabled "#legacy-interrupt-controller<    usb@23000000rockchip,rk3576-dwc3snps,dwc3>#@cEFDref_clksuspend_clkbus_clk aohost R$%Wusb2-phyusb3-phy utmi_wide9[zokayusb@23400000rockchip,rk3576-dwc3snps,dwc3>#@@cref_clksuspend_clkbus_clk aohost R&!Wusb2-phyusb3-phy utmi_wide9[zokaysyscon@2600a000rockchip,rk3576-sys-grfsyscon>& Tsyscon@2600c000#rockchip,rk3576-bigcore-grfsyscon>& syscon@2600e000#rockchip,rk3576-litcore-grfsyscon>& syscon@26010000rockchip,rk3576-cci-grfsyscon>& syscon@26016000rockchip,rk3576-gpu-grfsyscon>&` syscon@26018000rockchip,rk3576-npu-grfsyscon>& syscon@2601a000rockchip,rk3576-vo0-grfsyscon>& [syscon@2601e000rockchip,rk3576-usb-grfsyscon>&syscon@26020000rockchip,rk3576-php-grfsyscon>& syscon@26024000+rockchip,rk3576-pmu0-grfsysconsimple-mfd>&@syscon@26026000 rockchip,rk3576-pmu1-grfsyscon>&`syscon@26028000$rockchip,rk3576-pipe-phy-grfsyscon>& syscon@2602a000$rockchip,rk3576-pipe-phy-grfsyscon>& syscon@2602c000$rockchip,rk3576-usbdpphy-grfsyscon>& syscon@2602e000.rockchip,rk3576-usb2phy-grfsysconsimple-mfd>&@+usb2-phy@0rockchip,rk3576-usb2phy>ovphyapbcGHphyclkaclkaclk_slv usb480m_phy0!okayotg-port$^_`otg-bvalidotg-idlinestateokay'$usb2-phy@2000rockchip,rk3576-usb2phy> ovphyapbc  phyclkaclkaclk_slv usb480m_phy1!okayotg-port$bcdotg-bvalidotg-idlinestateokay(&syscon@26032000$rockchip,rk3576-hdptxphy-grfsyscon>& syscon@26036000rockchip,rk3576-vo1-grfsyscon>&`csyscon@26038000"rockchip,rk3576-sdgmac-grfsyscon>&_syscon@26040000*rockchip,rk3576-ioc-grfsysconsimple-mfd>&clock-controller@27200000rockchip,rk3576-cru>' !p  8 Fq;.@ e沀e沀i2c@27300000(rockchip,rk3576-i2crockchip,rk3399-i2c>'0c i2cpclk Xdefault-)+ disabledserial@27310000&rockchip,rk3576-uartsnps,dw-apb-uart>'17Acbaudclkapb_pclkN**  Mdefault-+ disabledpower-management@27380000&rockchip,rk3576-pmusysconsimple-mfd>'8Upower-controller!rockchip,rk3576-power-controllerS+power-domain@0>S+power-domain@1>@cg,-./0S+power-domain@2>cg1Spower-domain@3>cg2Spower-domain@4>cg3Spower-domain@5>cg45S+power-domain@6>Hc3"(0#)g6789:;Spower-domain@8> c g<=S+power-domain@9> Spower-domain@10> Spower-domain@12> cg>Spower-domain@13> Pc\[RSPOXWUTg?@ABCSpower-domain@14>c=>gDSpower-domain@15>`cghfcdeilmpnogEFGHIS+power-domain@11> ca`gJSpower-domain@18> cgKLS+power-domain@7>(cBGHIgMNSpower-domain@16>(cgOSpower-domain@17>(cgPSgpu@27800000&rockchip,rk3576-maliarm,mali-bifrost>'   =ccoreY$[\] jobmmugpujQa~ disabledvop@27d00000rockchip,rk3576-vop >'0'Pvopgamma-lut0V{|}sysvp0vp1vp2,cR2aclkhclkdclk_vp0dclk_vp1dclk_vp2pll_hdmiphy0nSaTuUokayports+port@0+>endpoint@2>V\port@1+>port@2+>iommu@27d07e00,rockchip,rk3576-iommurockchip,rk3568-iommu >'~' Vc aclkifaceaokaySsai@27d40000rockchip,rk3576-sai>' c mclkhclkNWrxaoijvmhSAI5 disabledsai@27d50000rockchip,rk3576-sai>' c mclkhclkNWWtxrxaoklvmhSAI6 disabledhdmi@27da0000rockchip,rk3576-dw-hdmi-qp>'0cpclkearcrefaudhdphclk_vo1<RSTUoavpcecearcmainhpdRRdefault -XYZaofvrefhdp[okayports+port@0>endpoint\Vport@1>endpoint]sai@27ed0000rockchip,rk3576-sai>' c mclkhclkNWtxaouvvmhSAI7 disabledsai@27ee0000rockchip,rk3576-sai>' tc mclkhclkN^txaorqvmhSAI8 disabledsai@27ef0000rockchip,rk3576-sai>' uc mclkhclkN*txaovmhSAI9 disabledqos@27f02000rockchip,rk3576-qossyscon>' Pqos@27f04000rockchip,rk3576-qossyscon>'@ 6qos@27f04080rockchip,rk3576-qossyscon>'@ 7qos@27f04100rockchip,rk3576-qossyscon>'A 8qos@27f04180rockchip,rk3576-qossyscon>'A 9qos@27f04200rockchip,rk3576-qossyscon>'B :qos@27f04280rockchip,rk3576-qossyscon>'B ;qos@27f05000rockchip,rk3576-qossyscon>'P 3qos@27f06000rockchip,rk3576-qossyscon>'` >qos@27f08000rockchip,rk3576-qossyscon>' ,qos@27f08080rockchip,rk3576-qossyscon>' -qos@27f08100rockchip,rk3576-qossyscon>' .qos@27f09000rockchip,rk3576-qossyscon>' 4qos@27f09080rockchip,rk3576-qossyscon>' 5qos@27f0a000rockchip,rk3576-qossyscon>' <qos@27f0a080rockchip,rk3576-qossyscon>' =qos@27f0c000rockchip,rk3576-qossyscon>' Dqos@27f0d000rockchip,rk3576-qossyscon>' qos@27f0e000rockchip,rk3576-qossyscon>' Mqos@27f0e080rockchip,rk3576-qossyscon>' Nqos@27f0f000rockchip,rk3576-qossyscon>' Jqos@27f10000rockchip,rk3576-qossyscon>' Eqos@27f10080rockchip,rk3576-qossyscon>' Fqos@27f10100rockchip,rk3576-qossyscon>' Gqos@27f10180rockchip,rk3576-qossyscon>' Hqos@27f10200rockchip,rk3576-qossyscon>' Iqos@27f11000rockchip,rk3576-qossyscon>' Oqos@27f12800rockchip,rk3576-qossyscon>'( Kqos@27f12880rockchip,rk3576-qossyscon>'( Lqos@27f13000rockchip,rk3576-qossyscon>'0 ?qos@27f13080rockchip,rk3576-qossyscon>'0 Aqos@27f13100rockchip,rk3576-qossyscon>'1 Bqos@27f13180rockchip,rk3576-qossyscon>'1 @qos@27f13200rockchip,rk3576-qossyscon>'2 Cqos@27f20000rockchip,rk3576-qossyscon>' 1qos@27f21000rockchip,rk3576-qossyscon>' 2qos@27f22080rockchip,rk3576-qossyscon>' /qos@27f22100rockchip,rk3576-qossyscon>'! 0ethernet@2a220000&rockchip,rk3576-gmacsnps,dwmac-4.20a>*"(c$. %0stmmacethclk_mac_refpclk_macaclk_macptp_ref%*macirqeth_wake_irqao vstmmaceth_`):aMb`okayioutput vrgmii-rxidcdefault-defghi j  N !mdiosnps,dwmac-mdio+phy@1ethernet-phy-ieee802.3-c22>c+cstmmac-axi-config`rx-queues-configaqueue0tx-queues-configbqueue0ethernet@2a230000&rockchip,rk3576-gmacsnps,dwmac-4.20a>*#(c%/!$0stmmacethclk_mac_refpclk_macaclk_macptp_ref-2macirqeth_wake_irqao  vstmmaceth_k):lMm`okayioutputn vrgmii-rxiddefault-opqrst u N  mdiosnps,dwmac-mdio+phy@1ethernet-phy-ieee802.3-c22>c,nstmmac-axi-configkrx-queues-configlqueue0tx-queues-configmqueue0sata@2a240000'rockchip,rk3576-dwc-ahcisnps,dwc-ahci>*$csatapmaliverxoob a R Wsata-phy$ disabledsata@2a250000'rockchip,rk3576-dwc-ahcisnps,dwc-ahci>*%csatapmaliverxoob a R! Wsata-phy$ disabledufshc@2a2d0000rockchip,rk3576-ufshcP>*-+&&*."hcimphyhci_grfmphy_grfhci_apb cICcorepclkpclk_mphyref_out; ia-vdefault o!"$vbiusysufsgrf "okayspi@2a300000 rockchip,sfc>*0@ c*+clk_sfchclk_sfca+ disabledmmc@2a310000rockchip,rk3576-dw-mshc>*1@c)(biuciu6 A default-wxyz{ao vresetokayOYk||mmc@2a3300000rockchip,rk3576-dwcmshcrockchip,rk3588-dwcmshc>*3  n6 (ccorebusaxiblocktimer A -}~defaulta(ovcorebusaxiblocktimer disabledspi@2a340000 rockchip,sfc>*4@ cclk_sfchclk_sfca+ disabledrng@2a410000rockchip,rk3576-rng>*Ac ootp@2a580000rockchip,rk3576-otp>*X+c1otpapb_pclkphyovotpapbcpu-code@2>cpu-version@5>id@a> cpub-leakage@1e>cpul-leakage@1f>npu-leakage@20> gpu-leakage@21>!log-leakage@22>"sai@2a600000rockchip,rk3576-sai>*` c@A mclkhclkN**txrxa ovmhdefault(-SAI0 disabledsai@2a610000rockchip,rk3576-sai>*a cGH mclkhclkN**txrxa ovmhdefault-SAI1 disabledsai@2a620000rockchip,rk3576-sai>*b cJK mclkhclkN^^txrxa ovmhdefault-SAI2 disabledsai@2a630000rockchip,rk3576-sai>*c cMN mclkhclkN^^txrxa ovmhdefault-SAI3 disabledsai@2a640000rockchip,rk3576-sai>*d cPQ mclkhclkNWWtxrxa ovmhdefault-SAI4 disabledinterrupt-controller@2a701000 arm,gic-400@>*p*p *p@*p`  <+dma-controller@2ab90000arm,pl330arm,primecell>*@c apb_pclk !*dma-controller@2abb0000arm,pl330arm,primecell>*@c apb_pclk"#^dma-controller@2abd0000arm,pl330arm,primecell>*@c apb_pclk$%Wi2c@2ac40000(rockchip,rk3576-i2crockchip,rk3399-i2c>*cth i2cpclk Ydefault-+okaypmic@23rockchip,rk806># 0default-   ! - 9 E Q ] i v    dvs1-null-pinsgpio_pwrctrl1 pin_fun0dvs2-null-pinsgpio_pwrctrl2 pin_fun0dvs3-null-pinsgpio_pwrctrl3 pin_fun0dvs1-slp-pinsgpio_pwrctrl1 pin_fun1dvs1-pwrdn-pinsgpio_pwrctrl1 pin_fun2dvs1-rst-pinsgpio_pwrctrl1 pin_fun3dvs2-slp-pinsgpio_pwrctrl2 pin_fun1dvs2-pwrdn-pinsgpio_pwrctrl2 pin_fun2dvs2-rst-pinsgpio_pwrctrl2 pin_fun3dvs2-dvs-pinsgpio_pwrctrl2 pin_fun4dvs2-gpio-pinsgpio_pwrctrl2 pin_fun5dvs3-slp-pinsgpio_pwrctrl3 pin_fun1dvs3-pwrdn-pinsgpio_pwrctrl3 pin_fun2dvs3-rst-pinsgpio_pwrctrl3 pin_fun3dvs3-dvs-pinsgpio_pwrctrl3 pin_fun4dvs3-gpio-pinsgpio_pwrctrl3 pin_fun5regulatorsdcdc-reg1   dp ~ 0 *vdd_cpu_big_s0 9regulator-state-mem Udcdc-reg2  dp ~ 0 *vdd_npu_s0 9regulator-state-mem Udcdc-reg3   dp ~ 0 *vdd_cpu_lit_s0 regulator-state-mem U n qdcdc-reg4   2Z 2Z *vcc_3v3_s3regulator-state-mem  n2Zdcdc-reg5  dp  0 *vdd_gpu_s0 9regulator-state-mem U n Pdcdc-reg6   *vddq_ddr_s0regulator-state-mem Udcdc-reg7   dp 5 *vdd_logic_s0regulator-state-mem Udcdc-reg8   w@ w@ *vcc_1v8_s3regulator-state-mem  nw@dcdc-reg9   *vdd2_ddr_s3regulator-state-mem dcdc-reg10   dp O *vdd_ddr_s0regulator-state-mem Upldo-reg1   w@ w@ *vcca_1v8_s0regulator-state-mem Upldo-reg2   w@ w@ *vcca1v8_pldo2_s0regulator-state-mem Upldo-reg3   O O *vdda_1v2_s0regulator-state-mem Upldo-reg4   2Z 2Z *vcca_3v3_s0regulator-state-mem Upldo-reg5   w@ 2Z *vccio_sd_s0|regulator-state-mem Upldo-reg6   w@ w@ *vcca1v8_pldo6_s3regulator-state-mem  nw@nldo-reg1   dp q *vdd_0v75_s3regulator-state-mem  n qnldo-reg2   P P *vdda_ddr_pll_s0regulator-state-mem Unldo-reg3  | | *vdda0v75_hdmi_s0regulator-state-mem Unldo-reg4   P P *vdda_0v85_s0regulator-state-mem Unldo-reg5   q q *vdda_0v75_s0regulator-state-mem Ui2c@2ac50000(rockchip,rk3576-i2crockchip,rk3399-i2c>*cui i2cpclk Zdefault-+ disabledi2c@2ac60000(rockchip,rk3576-i2crockchip,rk3399-i2c>*cvj i2cpclk [default-+ disabledi2c@2ac70000(rockchip,rk3576-i2crockchip,rk3399-i2c>*cwk i2cpclk \default-+ disabledi2c@2ac80000(rockchip,rk3576-i2crockchip,rk3399-i2c>*cxl i2cpclk ]default-+ disabledi2c@2ac90000(rockchip,rk3576-i2crockchip,rk3399-i2c>*cym i2cpclk ^default-+ disabledi2c@2aca0000(rockchip,rk3576-i2crockchip,rk3399-i2c>*czn i2cpclk _default-+ disabledi2c@2acb0000(rockchip,rk3576-i2crockchip,rk3399-i2c>*c{o i2cpclk `default-+ disabledtimer@2acc0000,rockchip,rk3576-timerrockchip,rk3288-timer>* c pclktimer -watchdog@2ace0000 rockchip,rk3576-wdtsnps,dw-wdt>*c tclkpclk ( disabledspi@2acf0000(rockchip,rk3576-spirockchip,rk3066-spi>*cspiclkapb_pclkN**txrx t default -+ disabledspi@2ad00000(rockchip,rk3576-spirockchip,rk3066-spi>*cspiclkapb_pclkN**txrx u default -+ disabledspi@2ad10000(rockchip,rk3576-spirockchip,rk3066-spi>*cspiclkapb_pclkN^^txrx v default -+ disabledspi@2ad20000(rockchip,rk3576-spirockchip,rk3066-spi>*cspiclkapb_pclkN^^txrx w default -+ disabledspi@2ad30000(rockchip,rk3576-spirockchip,rk3066-spi>*cspiclkapb_pclkNW W txrx x default -+ disabledserial@2ad40000&rockchip,rk3576-uartsnps,dw-apb-uart>*7Acbaudclkapb_pclkN**txrx L-defaultokayserial@2ad50000&rockchip,rk3576-uartsnps,dw-apb-uart>*7Acbaudclkapb_pclkN* * txrx Ndefault- disabledserial@2ad60000&rockchip,rk3576-uartsnps,dw-apb-uart>*7Acbaudclkapb_pclkN* * txrx O-default disabledserial@2ad70000&rockchip,rk3576-uartsnps,dw-apb-uart>*7Acbaudclkapb_pclkN^ ^ txrx P-default disabledserial@2ad80000&rockchip,rk3576-uartsnps,dw-apb-uart>*7Acbaudclkapb_pclkN^ ^ txrx Q-default disabledserial@2ad90000&rockchip,rk3576-uartsnps,dw-apb-uart>*7Acbaudclkapb_pclkN^ ^txrx R-default disabledserial@2ada0000&rockchip,rk3576-uartsnps,dw-apb-uart>*7Acbaudclkapb_pclkNWWtxrx S-default disabledserial@2adb0000&rockchip,rk3576-uartsnps,dw-apb-uart>*7Acbaudclkapb_pclkNWW txrx T-default disabledserial@2adc0000&rockchip,rk3576-uartsnps,dw-apb-uart>*7Acbaudclkapb_pclkNW W txrx U-default disabledadc@2ae00000.rockchip,rk3576-saradcrockchip,rk3588-saradc>*c~}saradcapb_pclk |oH vsaradc-apb okay i2c@2ae80000(rockchip,rk3576-i2crockchip,rk3399-i2c>*c|p i2cpclk adefault-oG;vi2capb+ disabledserial@2afc0000&rockchip,rk3576-uartsnps,dw-apb-uart>*7Acbaudclkapb_pclkNWW Vdefault- disabledserial@2afd0000&rockchip,rk3576-uartsnps,dw-apb-uart>*7Acbaudclkapb_pclkNWW Wdefault- disabledphy@2b050000rockchip,rk3576-naneng-combphy>+c95 refapbpipe9 ovphyapb   disabledphy@2b060000rockchip,rk3576-naneng-combphy>+c:6  refapbpipe: ovphyapb  okay!phy@2b010000rockchip,rk3576-usbdp-phy>+crefclkimmortalpclkutmi(ovinitcmnlanepcs_apbpma_apb   okay )%hdmiphy@2b0000004rockchip,rk3576-hdptx-phyrockchip,rk3588-hdptx-phy>+ c!refapb! ovapbinitcmnlaneokayRsram@3ff88000 mmio-sram>??+rkvdec-sram@0>scmi-shmem@4010f000arm,scmi-shmem>@chosen >serial0:1500000n8adc-keys adc-keys J Vbuttons gw@ dbutton-back back  8button-menu menu  button-vol-down volume down r \button-vol-up volume up s Bhhdmi-conhdmi-connector9aportendpoint]leds gpio-ledsled-0   heartbeatregulator-vbus5v0-typecregulator-fixed *vbus5v0_typec LK@ LK@   default-'regulator-vcc12v-dcinregulator-fixed *vcc12v_dcin    regulator-vcc1v2-ufs-vccq-s0regulator-fixed *vcc1v2_ufs_vccq_s0   O O regulator-vcc1v8-ufs-vccq2-s0regulator-fixed *vcc1v8_ufs_vccq2_s0   w@ w@ regulator-vcc3v3-lcd0-nregulator-fixed *vcc3v3_lcd0_n    regulator-vcc3v3-pcie1regulator-fixed *vcc3v3_pcie1 2Z 2Z  u  #regulator-vcc3v3-rtc-s5regulator-fixed *vcc3v3_rtc_s5   2Z 2Z regulator-vcc5v0-deviceregulator-fixed *vcc5v0_device   LK@ LK@ regulator-vcc5v0-hostregulator-fixed *vcc5v0_host   LK@ LK@   default-(regulator-vcc5v0-sysregulator-fixed *vcc_sys   LK@ LK@ regulator-vcc-1v1-nldo-s3regulator-fixed *vcc_1v1_nldo_s3     regulator-vcc-1v8-s0regulator-fixed *vcc_1v8_s0   w@ w@ regulator-vcc-2v0-pldo-s3regulator-fixed *vcc_2v0_pldo_s3     regulator-vcc-3v3-s0regulator-fixed *vcc_3v3_s0   2Z 2Z regulator-vcc-ufs-s0regulator-fixed *vcc_ufs_s0   2Z 2Z  compatibleinterrupt-parent#address-cells#size-cellsmodeli2c0i2c1i2c2i2c3i2c4i2c5i2c6i2c7i2c8i2c9serial0serial1serial2serial3serial4serial5serial6serial7serial8serial9serial10serial11spi0spi1spi2spi3spi4ethernet0ethernet1clock-frequencyclock-output-names#clock-cellscpudevice_typeregenable-methodcapacity-dmips-mhzclocksoperating-points-v2#cooling-cellsdynamic-power-coefficientcpu-idle-statescpu-supplyphandleentry-methodarm,psci-suspend-paramentry-latency-usexit-latency-usmin-residency-uslocal-timer-stopopp-sharedopp-hzopp-microvoltclock-latency-nsopp-suspendportsarm,smc-idshmemsimple-audio-card,namesimple-audio-card,formatsimple-audio-card,mclk-fsstatussound-dairockchip,grfrangesgpio-controllergpio-rangesinterruptsinterrupt-controller#gpio-cells#interrupt-cellsbias-pull-upbias-disabledrive-strengthinput-schmitt-enablerockchip,pinsinterrupt-affinityreg-namesbus-rangeclock-namesinterrupt-namesinterrupt-map-maskinterrupt-maplinux,pci-domainmax-link-speednum-ib-windowsnum-viewportnum-ob-windowsnum-lanesphysphy-namespower-domainsresetsreset-namesreset-gpiosvpcie3v3-supplydr_modephy_typesnps,dis_enblslpm_quirksnps,dis-u1-entry-quirksnps,dis-u2-entry-quirksnps,dis-u2-freeclk-exists-quirksnps,dis-del-phy-power-chg-quirksnps,dis-tx-ipgap-linecheck-quirksnps,parkmode-disable-hs-quirksnps,parkmode-disable-ss-quirksnps,dis_rxdet_inp3_quirkdma-coherent#phy-cellsphy-supply#reset-cellsassigned-clocksassigned-clock-parentsassigned-clock-ratespinctrl-namespinctrl-0reg-shiftreg-io-widthdmas#power-domain-cellspm_qosiommusrockchip,pmuremote-endpoint#iommu-cellsdma-namesrockchip,sai-rx-route#sound-dai-cellssound-name-prefixrockchip,sai-tx-routerockchip,vo-grfrockchip,php-grfsnps,axi-configsnps,mixed-burstsnps,mtl-rx-configsnps,mtl-tx-configsnps,tsoclock_in_outphy-modephy-handlesnps,reset-gpiosnps,reset-active-lowsnps,reset-delays-ustx_delaysnps,blensnps,rd_osr_lmtsnps,wr_osr_lmtsnps,rx-queues-to-usesnps,tx-queues-to-useports-implementedfifo-depthmax-frequencybus-widthcap-mmc-highspeedcap-sd-highspeeddisable-wpno-sdiono-mmcsd-uhs-sdr104vqmmc-supplysupports-cqebitsarm,pl330-periph-burst#dma-cellssystem-power-controllervcc1-supplyvcc2-supplyvcc3-supplyvcc4-supplyvcc5-supplyvcc6-supplyvcc7-supplyvcc8-supplyvcc9-supplyvcc10-supplyvcc11-supplyvcc12-supplyvcc13-supplyvcc14-supplyvcca-supplyfunctionregulator-always-onregulator-boot-onregulator-min-microvoltregulator-max-microvoltregulator-ramp-delayregulator-nameregulator-enable-ramp-delayregulator-off-in-suspendregulator-suspend-microvoltregulator-on-in-suspendnum-cs#io-channel-cellsvref-supplyrockchip,pipe-grfrockchip,pipe-phy-grfrockchip,u2phy-grfrockchip,usb-grfrockchip,usbdpphy-grfrockchip,dp-lane-muxstdout-pathio-channelsio-channel-nameskeyup-threshold-microvoltpoll-intervallabellinux,codepress-threshold-microvoltlinux,default-triggerenable-active-highvin-supplystartup-delay-us