=/8/( /d,radxa,e52crockchip,rk3582rockchip,rk3588s + 7Radxa E52Caliases=/pinctrl/gpio@fd8a0000C/pinctrl/gpio@fec20000I/pinctrl/gpio@fec30000O/pinctrl/gpio@fec40000U/pinctrl/gpio@fec50000[/i2c@fd880000`/i2c@fea90000e/i2c@feaa0000j/i2c@feab0000o/i2c@feac0000t/i2c@fead0000y/i2c@fec80000~/i2c@fec90000/i2c@feca0000/serial@fd890000/serial@feb40000/serial@feb50000/serial@feb60000/serial@feb70000/serial@feb80000/serial@feb90000/serial@feba0000/serial@febb0000/serial@febc0000/spi@feb00000/spi@feb10000/spi@feb20000/spi@feb30000/spi@fecb0000/mmc@fe2e0000/mmc@fe2c0000cpus+cpu-mapcluster0core0core1core2core3cluster1core0core1cluster2core0core1 cpu@0cpuarm,cortex-a55 psci0 7 GT@fs@  cpu@100cpuarm,cortex-a55 psci0 7 GT@fs@ cpu@200cpuarm,cortex-a55 psci0 7 GT@fs@ cpu@300cpuarm,cortex-a55 psci0 7 GT@fs@ cpu@400cpuarm,cortex-a76 psci0 7 GT@fs@cpu@500cpuarm,cortex-a76 psci0 7 GT@fs@cpu@600cpuarm,cortex-a76 psci0 7 GT@fs@cpu@700cpuarm,cortex-a76 psci0 7 GT@fs@ idle-statespscicpu-sleeparm,idle-state 5dFxV l2-cache-l0cacheIV@hgs l2-cache-l1cacheIV@hgsl2-cache-l2cacheIV@hgsl2-cache-l3cacheIV@hgsl2-cache-b0cacheIV@hgsl2-cache-b1cacheIV@hgsl2-cache-b2cacheIV@hgsl2-cache-b3cacheIV@hgsl3-cachecacheI0V@hgsdisplay-subsystemrockchip,display-subsystemfirmwarescmi arm,scmi-smc+protocol@14  protocol@16 hdmi0-soundsimple-audio-cardi2shdmi0 disabledsimple-audio-card,codecsimple-audio-card,cpupmu-a55arm,cortex-a55-pmu pmu-a76arm,cortex-a76-pmu  psci arm,psci-1.0smcclock-0 fixed-clock)׫(splltimerarm,armv8-timerP     %;sec-physphysvirthyp-physhyp-virtclock-1 fixed-clockn6(xin24mclock-2 fixed-clock(xin32kreserved-memory+Kshmem@10f000arm,scmi-shmem Rgpu@fb000000*rockchip,rk3588-maliarm,mali-valhall-csf Y i 0!!!~corecoregroupstacks 0 \]^ ;jobmmugpu"  disabled#usb@fc000000rockchip,rk3588-dwc3snps,dwc3 @ 0!!!~ref_clksuspend_clkbus_clkhost $%usb2-phyusb3-phy utmi_wide"!R(Iokayusb@fc800000"rockchip,rk3588-ehcigeneric-ehci  0!!!&'usb" disabledusb@fc840000"rockchip,rk3588-ohcigeneric-ohci  0!!!&'usb" disabledusb@fc880000"rockchip,rk3588-ehcigeneric-ehci  0!!!()usb" disabledusb@fc8c0000"rockchip,rk3588-ohcigeneric-ohci  0!!!()usb" disabledusb@fcd00000rockchip,rk3588-dwc3snps,dwc3 @ (0!j!i!h!k!r&~ref_clksuspend_clkbus_clkutmipipehost* usb3-phy utmi_wide!4(Ik disablediommu@fc900000 arm,smmu-v3 @ qsvo;eventqgerrorpriqcmdq-sync{iommu@fcb00000 arm,smmu-v3 @ }{;eventqgerrorpriqcmdq-sync disabledsyscon@fd58a000)rockchip,rk3588-pmugrfsysconsimple-mfd Xxsyscon@fd58c000rockchip,rk3588-sys-grfsyscon Xlsyscon@fd5e8000!rockchip,rk3588-dcphy-grfsyscon ^@syscon@fd5ec000!rockchip,rk3588-dcphy-grfsyscon ^@syscon@fd5a4000rockchip,rk3588-vop-grfsyscon Z@ msyscon@fd5a6000rockchip,rk3588-vo0-grfsyscon Z` 0!syscon@fd5a8000rockchip,rk3588-vo1-grfsyscon Z@0!nsyscon@fd5ac000rockchip,rk3588-usb-grfsyscon Z@syscon@fd5b0000rockchip,rk3588-php-grfsyscon [,syscon@fd5bc000$rockchip,rk3588-pipe-phy-grfsyscon [syscon@fd5c4000$rockchip,rk3588-pipe-phy-grfsyscon \@syscon@fd5c8000$rockchip,rk3588-usbdpphy-grfsyscon \@syscon@fd5d0000.rockchip,rk3588-usb2phy-grfsysconsimple-mfd ]@+usb2phy@0rockchip,rk3588-usb2phy 0!~phyclk (usb480m_phy0 !m!phyapbokayotg-portokay+$syscon@fd5d8000.rockchip,rk3588-usb2phy-grfsysconsimple-mfd ]@+usb2phy@8000rockchip,rk3588-usb2phy 0!~phyclk (usb480m_phy2 !o!phyapb disabled&host-port disabled'syscon@fd5dc000.rockchip,rk3588-usb2phy-grfsysconsimple-mfd ]@+usb2phy@c000rockchip,rk3588-usb2phy 0!~phyclk (usb480m_phy3 !p! phyapb disabled(host-port disabled)syscon@fd5e0000$rockchip,rk3588-hdptxphy-grfsyscon ^syscon@fd5f0000rockchip,rk3588-iocsyscon _sram@fd600000 mmio-sram `K`+clock-controller@fd7c0000rockchip,rk3588-cru |Y!!!!!!!!!!!!!]!q!!@iA.2Fq)׫ׄe/ׄ eZ р ,!i2c@fd880000(rockchip,rk3588-i2crockchip,rk3399-i2c  =0!t!s ~i2cpclk-default+okayregulator@42rockchip,rk8602 Bvdd_cpu_big0_s0+dpC[p.regulator-state-mem{regulator@43 rockchip,rk8603rockchip,rk8602 Cvdd_cpu_big1_s0+dpC[p.regulator-state-mem{eeprom@50belling,bl24c16aatmel,24c16 P/serial@fd890000&rockchip,rk3588-uartsnps,dw-apb-uart  K0!!~baudclkapb_pclk00txrx1default disabledpwm@fd8b0000(rockchip,rk3588-pwmrockchip,rk3328-pwm 0!! ~pwmpclk2default disabledpwm@fd8b0010(rockchip,rk3588-pwmrockchip,rk3328-pwm 0!! ~pwmpclk3default disabledpwm@fd8b0020(rockchip,rk3588-pwmrockchip,rk3328-pwm 0!! ~pwmpclk4default disabledpwm@fd8b0030(rockchip,rk3588-pwmrockchip,rk3328-pwm 00!! ~pwmpclk5default disabledpower-management@fd8d8000&rockchip,rk3588-pmusysconsimple-mfd opower-controller!rockchip,rk3588-power-controller+okay"power-domain@8 +power-domain@9  0!!!#!"! 678+power-domain@10 0!!!#!"9power-domain@11 0!!!#!":power-domain@12 0!!!;<=>power-domain@13 +power-domain@14 (0!!!!!?power-domain@15  0!!!!@power-domain@16 0!! ABC+power-domain@17  0!!!! DEFpower-domain@21 0!!!!!!!!!!!!!!!!!! GHIJKLMN+power-domain@23 0!C!A!Opower-domain@14  0!!!!?power-domain@15 0!!!@power-domain@22 0!!Ppower-domain@24 0![!Z!]QR+power-domain@25 80!!!!!!!ZSpower-domain@26 80!!!!!!!QTUpower-domain@27 00!!!!!!VWXY+power-domain@28  0!!!!Z[power-domain@29 (0!!!!!\]power-domain@30 0!z!{^power-domain@31 @0!W!!!!!!!_`abpower-domain@33 !0!W!Z![power-domain@34 "0!W!Z![power-domain@37 %0!!2cpower-domain@38 &0!4!5power-domain@40 (dvideo-codec@fdb50000+rockchip,rk3588-vpu121rockchip,rk3568-vpu  w;vdpu0!! ~aclkhclke"iommu@fdb50800,rockchip,rk3588-iommurockchip,rk3568-iommu @ v ~aclkiface0!!"erga@fdb80000(rockchip,rk3588-rgarockchip,rk3288-rga  t0!!!~aclkhclksclk!r!q!p coreaxiahb"video-codec@fdba0000rockchip,rk3588-vepu121  z0!! ~aclkhclkf"iommu@fdba0800,rockchip,rk3588-iommurockchip,rk3568-iommu @ y0!! ~aclkiface"fvideo-codec@fdba4000rockchip,rk3588-vepu121 @ |0!! ~aclkhclkg"iommu@fdba4800,rockchip,rk3588-iommurockchip,rk3568-iommu H@ {0!! ~aclkiface"gvideo-codec@fdba8000rockchip,rk3588-vepu121  ~0!! ~aclkhclkh"iommu@fdba8800,rockchip,rk3588-iommurockchip,rk3568-iommu @ }0!! ~aclkiface"hvideo-codec@fdbac000rockchip,rk3588-vepu121  0!! ~aclkhclki"iommu@fdbac800,rockchip,rk3588-iommurockchip,rk3568-iommu @ 0!! ~aclkiface"ivideo-codec@fdc70000rockchip,rk3588-av1-vpu  l;vdpuY!A!Ciׄׄ0!A!C ~aclkhclk" !!!!vop@fdd90000rockchip,rk3588-vop  BPvopgamma-lut <0!]!\!a!b!c!d![jD~aclkhclkdclk_vp0dclk_vp1dclk_vp2dclk_vp3pclk_voppll_hdmiphy0k"lm n1o disabledports+port@0+ port@1+ port@2+ port@3+ iommu@fdd97e00,rockchip,rk3588-iommurockchip,rk3568-iommu  ~ 0!]!\ ~aclkiface" disabledkspdif-tx@fddb0000,rockchip,rk3588-spdifrockchip,rk3568-spdif >!Y! ~mclkhclk0!!txp "U disabledi2s@fddc0000rockchip,rk3588-i2s-tdm  0!!!~mclk_txmclk_rxhclkY!>!qtx"!tx-mU disabledspdif-tx@fdde0000,rockchip,rk3588-spdifrockchip,rk3568-spdif >!Y!A ~mclkhclk0!D!@txp "U disabledi2s@fddf0000rockchip,rk3588-i2s-tdm  0!4!4!5~mclk_txmclk_rxhclkY!1>!qtx"!tx-mU disabledi2s@fddfc000rockchip,rk3588-i2s-tdm  0!0!0!,~mclk_txmclk_rxhclkY!->!qrx"!rx-mU disableddsi@fde20000rockchip,rk3588-mipi-dsi2  0!e!g ~pclksys!apb"r dcphym disabledports+port@0 port@1 dsi@fde30000rockchip,rk3588-mipi-dsi2  0!f!h ~pclksys!apb"s dcphym disabledports+port@0 port@1 hdmi@fde80000rockchip,rk3588-dw-hdmi-qp 00!!!!4!R!~pclkearcrefaudhdphclk_vo1P h;avpcecearcmainhpdjdefaulttuvw"!!0refhdplfnU disabledports+port@0 port@1 edp@fdec0000rockchip,rk3588-edp 0!!~dppclk jdp"!!dpapbn disabledports+port@0 port@1 qos@fdf35000rockchip,rk3588-qossyscon P ;qos@fdf35200rockchip,rk3588-qossyscon R <qos@fdf35400rockchip,rk3588-qossyscon T =qos@fdf35600rockchip,rk3588-qossyscon V >qos@fdf36000rockchip,rk3588-qossyscon ` ^qos@fdf39000rockchip,rk3588-qossyscon cqos@fdf3d800rockchip,rk3588-qossyscon dqos@fdf3e000rockchip,rk3588-qossyscon `qos@fdf3e200rockchip,rk3588-qossyscon _qos@fdf3e400rockchip,rk3588-qossyscon aqos@fdf3e600rockchip,rk3588-qossyscon bqos@fdf40000rockchip,rk3588-qossyscon \qos@fdf40200rockchip,rk3588-qossyscon  ]qos@fdf40400rockchip,rk3588-qossyscon  Vqos@fdf40500rockchip,rk3588-qossyscon  Wqos@fdf40600rockchip,rk3588-qossyscon  Xqos@fdf40800rockchip,rk3588-qossyscon  Yqos@fdf41000rockchip,rk3588-qossyscon  Zqos@fdf41100rockchip,rk3588-qossyscon  [qos@fdf60000rockchip,rk3588-qossyscon Aqos@fdf60200rockchip,rk3588-qossyscon  Bqos@fdf60400rockchip,rk3588-qossyscon  Cqos@fdf61000rockchip,rk3588-qossyscon  Dqos@fdf61200rockchip,rk3588-qossyscon  Eqos@fdf61400rockchip,rk3588-qossyscon  Fqos@fdf62000rockchip,rk3588-qossyscon ?qos@fdf63000rockchip,rk3588-qossyscon 0 @qos@fdf64000rockchip,rk3588-qossyscon @ Oqos@fdf66000rockchip,rk3588-qossyscon ` Gqos@fdf66200rockchip,rk3588-qossyscon b Hqos@fdf66400rockchip,rk3588-qossyscon d Iqos@fdf66600rockchip,rk3588-qossyscon f Jqos@fdf66800rockchip,rk3588-qossyscon h Kqos@fdf66a00rockchip,rk3588-qossyscon j Lqos@fdf66c00rockchip,rk3588-qossyscon l Mqos@fdf66e00rockchip,rk3588-qossyscon n Nqos@fdf67000rockchip,rk3588-qossyscon p Pqos@fdf67200rockchip,rk3588-qossyscon r qos@fdf70000rockchip,rk3588-qossyscon 9qos@fdf71000rockchip,rk3588-qossyscon  :qos@fdf72000rockchip,rk3588-qossyscon 6qos@fdf72200rockchip,rk3588-qossyscon " 7qos@fdf72400rockchip,rk3588-qossyscon $ 8qos@fdf80000rockchip,rk3588-qossyscon Sqos@fdf81000rockchip,rk3588-qossyscon  Tqos@fdf81200rockchip,rk3588-qossyscon  Uqos@fdf82000rockchip,rk3588-qossyscon Qqos@fdf82200rockchip,rk3588-qossyscon " Rdfi@fe060000 rockchip,rk3588-dfi@ &0:1xpcie@fe180000*rockchip,rk3588-pcierockchip,rk3568-pciev0?00!C!H!>!M!R!)~aclk_mstaclk_slvaclk_dbipclkauxpipepciP ;syspmcmsglegacyerr`yyyy0z00{0* pcie-phy""TK @ @0 @@dbiapbconfig!)!. pwrpipe+okaydefault| }~legacy-interrupt-controller   ypcie@fe190000*rockchip,rk3588-pcierockchip,rk3568-pciev@O00!D!I!?!N!S!s)~aclk_mstaclk_slvaclk_dbipclkauxpipepciP ;syspmcmsglegacyerr`@z@@{@ pcie-phy""TK @ @0 A@dbiapbconfig!*!/ pwrpipe+okaydefault ~legacy-interrupt-controller   ethernet@fe1c0000&rockchip,rk3588-gmacsnps,dwmac-4.20a   ;macirqeth_wake_irq(0!6!7!Y!^!50~stmmacethclk_mac_refpclk_macaclk_macptp_ref"!!$ stmmacethl,0@Qdw disabledmdiosnps,dwmac-mdio+stmmac-axi-configrx-queues-configqueue0queue1tx-queues-configqueue0queue1sata@fe210000'rockchip,rk3588-dwc-ahcisnps,dwc-ahci ! (0!b!_!e!T!o~satapmaliverxoobrefasic+ disabledsata-port@0 @ sata-phy  sata@fe230000'rockchip,rk3588-dwc-ahcisnps,dwc-ahci # (0!d!a!g!V!q~satapmaliverxoobrefasic+ disabledsata-port@0 @* sata-phy  spi@fe2b0000 rockchip,sfc +@ 0!/!0~clk_sfchclk_sfc+ disabledmmc@fe2c00000rockchip,rk3588-dw-mshcrockchip,rk3288-dw-mshc ,@  0  !!~biuciuciu-driveciu-sample default"(okay,6H Ybmu~mmc@fe2d00000rockchip,rk3588-dw-mshcrockchip,rk3288-dw-mshc -@  0!!!!~biuciuciu-driveciu-sample default"% disabledmmc@fe2e0000rockchip,rk3588-dwcmshc . Y!-!.!, i n6 (0!,!*!+!-!.~corebusaxiblocktimer default(!!!!!corebusaxiblocktimerokay,6mrng@fe378000rockchip,rk3588-rng 7 0 0i2s@fe470000rockchip,rk3588-i2s-tdm G 0!+!/!(~mclk_txmclk_rxhclkY!)!->!!00txrx"&!*!+ tx-mrx-mdefault(U disabledi2s@fe480000rockchip,rk3588-i2s-tdm H 0!y!}!u~mclk_txmclk_rxhclk00txrx!^!_ tx-mrx-mdefault(U disabledi2s@fe490000(rockchip,rk3588-i2srockchip,rk3066-i2s I 0!!~i2s_clki2s_hclkY!>!pptxrx"&defaultU disabledi2s@fe4a0000(rockchip,rk3588-i2srockchip,rk3066-i2s J 0!%!~i2s_clki2s_hclkY!">!pptxrx"&defaultU disabledspdif-tx@fe4e0000,rockchip,rk3588-spdifrockchip,rk3568-spdif N>!Y!7 ~mclkhclk0!9!6tx0 default"&U disabledspdif-tx@fe4f0000,rockchip,rk3588-spdifrockchip,rk3568-spdif O>!Y!= ~mclkhclk0!?!<txp default"&U disabledinterrupt-controller@fe600000 arm,gic-v3  `h    a 8 K+msi-controller@fe640000arm,gic-v3-its d  (zmsi-controller@fe660000arm,gic-v3-its f  (ppi-partitionsinterrupt-partition-0 3interrupt-partition-1 3  dma-controller@fea10000arm,pl330arm,primecell @  VW <0!n ~apb_pclk S0dma-controller@fea30000arm,pl330arm,primecell @  XY <0!o ~apb_pclk Spi2c@fea90000(rockchip,rk3588-i2crockchip,rk3399-i2c 0!!{ ~i2cpclk >default+ disabledi2c@feaa0000(rockchip,rk3588-i2crockchip,rk3399-i2c 0!!| ~i2cpclk ?default+okayregulator@42rockchip,rk8602 B vdd_npu_s0+dpC~[p.regulator-state-mem{i2c@feab0000(rockchip,rk3588-i2crockchip,rk3399-i2c 0!!} ~i2cpclk @default+ disabledi2c@feac0000(rockchip,rk3588-i2crockchip,rk3399-i2c 0!!~ ~i2cpclk Adefault+ disabledi2c@fead0000(rockchip,rk3588-i2crockchip,rk3399-i2c 0!! ~i2cpclk Bdefault+okayrtc@51haoyu,hym8563 Q (rtcic_32kout  default ^timer@feae0000,rockchip,rk3588-timerrockchip,rk3288-timer  !0!T!W ~pclktimerwatchdog@feaf0000 rockchip,rk3588-wdtsnps,dw-wdt 0!d!c ~tclkpclk ;spi@feb00000(rockchip,rk3588-spirockchip,rk3066-spi  F0!!~spiclkapb_pclk00txrx l default+ disabledspi@feb10000(rockchip,rk3588-spirockchip,rk3066-spi  G0!!~spiclkapb_pclk00txrx l default+ disabledspi@feb20000(rockchip,rk3588-spirockchip,rk3066-spi  H0!!~spiclkapb_pclkpptxrx ldefault+okayY!i pmic@0rockchip,rk806  s   default B@  . . . . . . . . . %. 2 ?. L Y fdvs1-null-pins rgpio_pwrctrl1 wpin_fun0dvs2-null-pins rgpio_pwrctrl2 wpin_fun0dvs3-null-pins rgpio_pwrctrl3 wpin_fun0regulatorsdcdc-reg1 vdd_gpu_s0+dpC~[0 regulator-state-mem{dcdc-reg2vdd_cpu_lit_s0+dpC~[0regulator-state-mem{dcdc-reg3 vdd_logic_s0+ LC q[0regulator-state-mem  qdcdc-reg4 vdd_vdenc_s0+dpC~[0regulator-state-mem{dcdc-reg5 vdd_ddr_s0+ LC [0regulator-state-mem{ Pdcdc-reg6 vdd2_ddr_s3regulator-state-mem dcdc-reg7vcc_2v0_pldo_s3+Cregulator-state-mem  dcdc-reg8 vcc_3v3_s3+2ZC2Z~regulator-state-mem  2Zdcdc-reg9 vddq_ddr_s0regulator-state-mem{dcdc-reg10 vcc_1v8_s3+w@Cw@regulator-state-mem  w@pldo-reg1 vcc_1v8_s0+w@Cw@regulator-state-mem  w@pldo-reg2 vcca_1v8_s0+w@Cw@regulator-state-mem  w@pldo-reg3 vdda_1v2_s0+OCOregulator-state-mem{pldo-reg4 vcca_3v3_s0+2ZC2Zregulator-state-mem  2Zpldo-reg5 vccio_sd_s0+w@C2Zregulator-state-mem{pldo-reg6 pldo6_s3+w@Cw@regulator-state-mem  w@nldo-reg1 vdd_0v75_s3+ qC qregulator-state-mem  qnldo-reg2vdda_ddr_pll_s0+ PC Pregulator-state-mem  Pnldo-reg3 vdda_0v75_s0+ qC qregulator-state-mem  qnldo-reg4 vdda_0v85_s0+ PC Pregulator-state-mem{nldo-reg5 vdd_0v75_s0+ qC qregulator-state-mem{spi@feb30000(rockchip,rk3588-spirockchip,rk3066-spi  I0!!~spiclkapb_pclkpptxrx l default+ disabledserial@feb40000&rockchip,rk3588-uartsnps,dw-apb-uart  L0!!~baudclkapb_pclk00 txrxdefault disabledserial@feb50000&rockchip,rk3588-uartsnps,dw-apb-uart  M0!!~baudclkapb_pclk0 0 txrxdefaultokayserial@feb60000&rockchip,rk3588-uartsnps,dw-apb-uart  N0!!~baudclkapb_pclk0 0 txrxdefault disabledserial@feb70000&rockchip,rk3588-uartsnps,dw-apb-uart  O0!!~baudclkapb_pclkp p txrxdefault disabledserial@feb80000&rockchip,rk3588-uartsnps,dw-apb-uart  P0!!~baudclkapb_pclkp p txrxdefault disabledserial@feb90000&rockchip,rk3588-uartsnps,dw-apb-uart  Q0!!~baudclkapb_pclkp ptxrxdefault disabledserial@feba0000&rockchip,rk3588-uartsnps,dw-apb-uart  R0!!~baudclkapb_pclkqqtxrxdefault disabledserial@febb0000&rockchip,rk3588-uartsnps,dw-apb-uart  S0!!~baudclkapb_pclkq q txrxdefault disabledserial@febc0000&rockchip,rk3588-uartsnps,dw-apb-uart  T0!!~baudclkapb_pclkq q txrxdefault disabledpwm@febd0000(rockchip,rk3588-pwmrockchip,rk3328-pwm 0!L!K ~pwmpclkdefault disabledpwm@febd0010(rockchip,rk3588-pwmrockchip,rk3328-pwm 0!L!K ~pwmpclkdefault disabledpwm@febd0020(rockchip,rk3588-pwmrockchip,rk3328-pwm 0!L!K ~pwmpclkdefault disabledpwm@febd0030(rockchip,rk3588-pwmrockchip,rk3328-pwm 00!L!K ~pwmpclkdefault disabledpwm@febe0000(rockchip,rk3588-pwmrockchip,rk3328-pwm 0!O!N ~pwmpclkdefault disabledpwm@febe0010(rockchip,rk3588-pwmrockchip,rk3328-pwm 0!O!N ~pwmpclkdefault disabledpwm@febe0020(rockchip,rk3588-pwmrockchip,rk3328-pwm 0!O!N ~pwmpclkdefault disabledpwm@febe0030(rockchip,rk3588-pwmrockchip,rk3328-pwm 00!O!N ~pwmpclkdefaultokaypwm@febf0000(rockchip,rk3588-pwmrockchip,rk3328-pwm 0!R!Q ~pwmpclkdefault disabledpwm@febf0010(rockchip,rk3588-pwmrockchip,rk3328-pwm 0!R!Q ~pwmpclkdefault disabledpwm@febf0020(rockchip,rk3588-pwmrockchip,rk3328-pwm 0!R!Q ~pwmpclkdefaultokaypwm@febf0030(rockchip,rk3588-pwmrockchip,rk3328-pwm 00!R!Q ~pwmpclkdefault disabledthermal-zonespackage-thermal   tripspackage-crit 8  criticalbigcore0-thermal d  tripsbigcore0-alert L passivebigcore0-crit 8  criticalcooling-mapsmap0  bigcore2-thermal d  tripsbigcore2-alert L passivebigcore2-crit 8  criticalcooling-mapsmap0   littlecore-thermal d  tripslittlecore-alert L passivelittlecore-crit 8  criticalcooling-mapsmap0 0 center-thermal   tripscenter-crit 8  criticalgpu-thermal d  tripsgpu-alert L passivegpu-crit 8  criticalcooling-mapsmap0  npu-thermal   tripsnpu-crit 8  criticaltsadc@fec00000rockchip,rk3588-tsadc  0!!~tsadcapb_pclkY!i!V!Wtsadc-apbtsadc / F ] xdefaultsleep okayadc@fec10000rockchip,rk3588-saradc   0!!~saradcapb_pclk!U saradc-apbokay i2c@fec80000(rockchip,rk3588-i2crockchip,rk3399-i2c 0!! ~i2cpclk Cdefault+ disabledi2c@fec90000(rockchip,rk3588-i2crockchip,rk3399-i2c 0!! ~i2cpclk Ddefault+ disabledi2c@feca0000(rockchip,rk3588-i2crockchip,rk3399-i2c 0!! ~i2cpclk Edefault+ disabledspi@fecb0000(rockchip,rk3588-spirockchip,rk3066-spi  J0!!~spiclkapb_pclkq qtxrx l default+ disabledefuse@fecc0000rockchip,rk3588-otp  0!!!!~otpapb_pclkphyarb!!! otpapbarb+cpu-code@2 id@7 cpu-leakage@17 cpu-leakage@18 cpu-leakage@19 log-leakage@1a gpu-leakage@1b cpu-version@1c  npu-leakage@28 (codec-leakage@29 )dma-controller@fed10000arm,pl330arm,primecell @  Z[ <0!p ~apb_pclk Sqphy@fed60000rockchip,rk3588-hdptx-phy 0!!T~refapb8!#!!c!d!e!!!""phyapbinitcmnlaneroplllcpll disabledjphy@fed80000rockchip,rk3588-usbdp-phy 0!!l!V~refclkimmortalpclkutmi(! ! ! !!initcmnlanepcs_apbpma_apb   fokay%phy@feda0000rockchip,rk3588-mipi-dcphy 0!! ~pclkref !i!!!jm_phyapbgrfs_phy disabledrphy@fedb0000rockchip,rk3588-mipi-dcphy 0!! ~pclkref !k!!!lm_phyapbgrfs_phy disabledsphy@fee00000rockchip,rk3588-naneng-combphy 0!!v!W ~refapbpipeY!i!<!Cphyapb , okayphy@fee20000rockchip,rk3588-naneng-combphy 0!!x!W ~refapbpipeY!i!>!Ephyapb , okay*sram@ff001000 mmio-sram K+pinctrlrockchip,rk3588-pinctrlK+gpio@fd8a0000rockchip,gpio-bank  0!q!r s    gpio@fec20000rockchip,gpio-bank  0!s!t s    gpio@fec30000rockchip,gpio-bank  0!u!v s @   gpio@fec40000rockchip,gpio-bank  0!w!x s `   gpio@fec50000rockchip,gpio-bank  0!y!z s    }pcfg-pull-up )pcfg-pull-down 6pcfg-pull-none Epcfg-pull-none-drv-level-2 E Rpcfg-pull-up-drv-level-1 ) Rpcfg-pull-up-drv-level-2 ) Rpcfg-pull-none-smt E apcfg-pull-none-drv-level-1-smt E R apcfg-pull-none-drv-level-5-smt E R aauddsmbt1120can0can1can2cifclk32kcpuddrphych0ddrphych1ddrphych2ddrphych3dp0dp1emmcemmc-rstnout vemmc-bus8 vemmc-clk vemmc-cmd vemmc-data-strobe veth1fspigmac1gpuhdmihdmim0-tx0-cec vthdmim0-tx0-hpd vuhdmim0-tx0-scl vvhdmim0-tx0-sda vwi2c0i2c0m2-xfer v-i2c1i2c1m0-xfer v  i2c2i2c2m0-xfer v  i2c3i2c3m0-xfer v  i2c4i2c4m0-xfer v  i2c5i2c5m2-xfer v  i2c6i2c6m0-xfer v  i2c7i2c7m0-xfer v  i2c8i2c8m0-xfer v  i2s0i2s0-lrck vi2s0-sclk vi2s0-sdi0 vi2s0-sdi1 vi2s0-sdi2 vi2s0-sdi3 vi2s0-sdo0 vi2s0-sdo1 vi2s0-sdo2 vi2s0-sdo3 vi2s1i2s1m0-lrck vi2s1m0-sclk vi2s1m0-sdi0 vi2s1m0-sdi1 vi2s1m0-sdi2 vi2s1m0-sdi3 vi2s1m0-sdo0 v i2s1m0-sdo1 v i2s1m0-sdo2 v i2s1m0-sdo3 v i2s2i2s2m1-lrck vi2s2m1-sclk v i2s2m1-sdi v i2s2m1-sdo v i2s3i2s3-lrck vi2s3-sclk vi2s3-sdi vi2s3-sdo vjtaglitcpumcumipinpupcie20x1pcie30phypcie30x1pcie30x2pcie30x4pdm0pdm1pmicpmic-pinsp vpmupwm0pwm0m0-pins v2pwm1pwm1m0-pins v3pwm2pwm2m0-pins v4pwm3pwm3m0-pins v5pwm4pwm4m0-pins v pwm5pwm5m0-pins v pwm6pwm6m0-pins v pwm7pwm7m0-pins v pwm8pwm8m0-pins v pwm9pwm9m0-pins v pwm10pwm10m0-pins v pwm11pwm11m1-pins v pwm12pwm12m0-pins v pwm13pwm13m0-pins v pwm14pwm14m1-pins v pwm15pwm15m0-pins v refclksatasata0sata1sata2sdiosdiom1-pins` vsdmmcsdmmc-bus4@ vsdmmc-clk vsdmmc-cmd vsdmmc-det vspdif0spdif0m0-tx vspdif1spdif1m0-tx vspi0spi0m0-pins0 vspi0m0-cs0 vspi0m0-cs1 vspi1spi1m1-pins0 vspi1m1-cs0 vspi1m1-cs1 vspi2spi2m2-pins0 v spi2m2-cs0 v spi3spi3m1-pins0 v spi3m1-cs0 vspi3m1-cs1 vspi4spi4m0-pins0 vspi4m0-cs0 vspi4m0-cs1 vtsadctsadc-shut-org vuart0uart0m1-xfer v 1uart1uart1m1-xfer v  uart2uart2m0-xfer v  uart3uart3m1-xfer v  uart4uart4m1-xfer v  uart5uart5m1-xfer v  uart6uart6m1-xfer v  uart7uart7m1-xfer v  uart8uart8m1-xfer v  uart9uart9m1-xfer v  vopbt656gpio-functsadc-gpio-func vkeysbutton-0 v ledsled-0 vpciepcie-1 v|pcie-2 vregulatorsregulator-5v0-1 v rtcrtc-0 vusbregulator-5v0-0 v opp-table-cluster0operating-points-v2  opp-1008000000 < L L~ @opp-1200000000 G 4 4~ @opp-1416000000 Tfr ~ @ opp-1608000000 _" P P~ @opp-1800000000 kI ~~~ @opp-table-cluster1operating-points-v2 opp-1200000000 G L LB@ @opp-1416000000 Tfr  B@ @opp-1608000000 _" B@ @opp-1800000000 kI P PB@ @opp-2016000000 x) HHB@ @opp-2208000000 h llB@ @opp-2400000000  B@B@B@ @opp-table-cluster2operating-points-v2 opp-1200000000 G L LB@ @opp-1416000000 Tfr  B@ @opp-1608000000 _" B@ @opp-1800000000 kI P PB@ @opp-2016000000 x) HHB@ @opp-2208000000 h llB@ @opp-2400000000  B@B@B@ @opp-tableoperating-points-v2#opp-300000000  L L Popp-400000000 ׄ L L Popp-500000000 e L L Popp-600000000 #F L L Popp-700000000 )' ` ` Popp-800000000 / q q Popp-900000000 5 5 5 Popp-1000000000 ; P P Pchosen serial2:1500000n8keys-0 adc-keys  buttons FP dbutton-0 Maskrom h #keys-1 gpio-keysdefaultbutton-1 User }   ^leds-0 gpio-ledsdefaultled-0 = Con wstatus  Qheartbeatleds-1 pwm-ledsled-1 = Con wlan Qnetdev gB@ lled-2 = Con wwan Qnetdev gB@ lregulator-1v1regulator-fixedvcc_1v1_nldo_s3+Cp.regulator-3v3-0regulator-fixed vcc_3v3_pmu+2ZC2Zp~/regulator-3v3-1regulator-fixed vcc_3v3_s0+2ZC2Zp~regulator-4v0regulator-fixedvcca+= C= p.regulator-5v0-0regulator-fixed { default vcc5v0_usb_otg0+LK@CLK@p.+regulator-5v0-1regulator-fixed { }default vcc_5v0+LK@CLK@p.regulator-5v0-2regulator-fixed vcc_sysin+LK@CLK@. compatibleinterrupt-parent#address-cells#size-cellsmodelgpio0gpio1gpio2gpio3gpio4i2c0i2c1i2c2i2c3i2c4i2c5i2c6i2c7i2c8serial0serial1serial2serial3serial4serial5serial6serial7serial8serial9spi0spi1spi2spi3spi4mmc0mmc1cpudevice_typeregenable-methodcapacity-dmips-mhzclockscpu-idle-statesi-cache-sizei-cache-line-sizei-cache-setsd-cache-sized-cache-line-sized-cache-setsnext-level-cachedynamic-power-coefficient#cooling-cellsoperating-points-v2cpu-supplyphandleentry-methodlocal-timer-stoparm,psci-suspend-paramentry-latency-usexit-latency-usmin-residency-uscache-levelcache-unifiedportsarm,smc-idshmem#clock-cells#reset-cellssimple-audio-card,formatsimple-audio-card,mclk-fssimple-audio-card,namestatussound-daiinterruptsclock-frequencyclock-output-namesinterrupt-namesrangesno-mapassigned-clocksassigned-clock-ratesclock-namespower-domainsdr_modephysphy-namesphy_typeresetssnps,dis_enblslpm_quirksnps,dis-u1-entry-quirksnps,dis-u2-entry-quirksnps,dis-u2-freeclk-exists-quirksnps,dis-del-phy-power-chg-quirksnps,dis-tx-ipgap-linecheck-quirksnps,dis_rxdet_inp3_quirk#iommu-cellsreset-names#phy-cellsphy-supplyrockchip,grfpinctrl-0pinctrl-namesfcs,suspend-voltage-selectorregulator-nameregulator-always-onregulator-boot-onregulator-min-microvoltregulator-max-microvoltregulator-ramp-delayvin-supplyregulator-off-in-suspendpagesizeread-onlyvcc-supplydmasdma-namesreg-shiftreg-io-width#pwm-cells#power-domain-cellspm_qosiommusreg-namesrockchip,vop-grfrockchip,vo1-grfrockchip,pmuassigned-clock-parents#sound-dai-cellsrockchip,vo-grfbus-range#interrupt-cellsinterrupt-map-maskinterrupt-maplinux,pci-domainmax-link-speedmsi-mapiommu-mapnum-lanesreset-gpiosvpcie3v3-supplyinterrupt-controllerrockchip,php-grfsnps,axi-configsnps,mixed-burstsnps,mtl-rx-configsnps,mtl-tx-configsnps,tsosnps,blensnps,wr_osr_lmtsnps,rd_osr_lmtsnps,rx-queues-to-usesnps,tx-queues-to-useports-implementedhba-port-capsnps,rx-ts-maxsnps,tx-ts-maxfifo-depthmax-frequencybus-widthcap-mmc-highspeedcap-sd-highspeedcd-gpiosdisable-wpno-sdiosd-uhs-sdr104vmmc-supplyvqmmc-supplymmc-hs400-1_8vmmc-hs400-enhanced-strobeno-sdnon-removablerockchip,trcm-sync-tx-onlydma-noncoherentmbi-aliasmbi-rangesmsi-controller#msi-cellsaffinityarm,pl330-periph-burst#dma-cellswakeup-sourcenum-csgpio-controller#gpio-cellsspi-max-frequencysystem-power-controllervcc1-supplyvcc2-supplyvcc3-supplyvcc4-supplyvcc5-supplyvcc6-supplyvcc7-supplyvcc8-supplyvcc9-supplyvcc10-supplyvcc11-supplyvcc12-supplyvcc13-supplyvcc14-supplyvcca-supplypinsfunctionregulator-enable-ramp-delayregulator-on-in-suspendregulator-suspend-microvoltpolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresistripcooling-devicerockchip,hw-tshut-temprockchip,hw-tshut-moderockchip,hw-tshut-polaritypinctrl-1#thermal-sensor-cells#io-channel-cellsvref-supplybitsrockchip,u2phy-grfrockchip,usb-grfrockchip,usbdpphy-grfrockchip,pipe-grfrockchip,pipe-phy-grfgpio-rangesbias-pull-upbias-pull-downbias-disabledrive-strengthinput-schmitt-enablerockchip,pinsopp-sharedopp-hzopp-microvoltclock-latency-nsopp-suspendstdout-pathio-channelsio-channel-nameskeyup-threshold-microvoltpoll-intervallabellinux,codepress-threshold-microvoltcolordefault-statelinux,default-triggerpwmsmax-brightnessenable-active-highgpio