88( radxa,rockpi-erockchip,rk3328 +7Radxa ROCK Pi Ealiases=/pinctrl/gpio@ff210000C/pinctrl/gpio@ff220000I/pinctrl/gpio@ff230000O/pinctrl/gpio@ff240000U/serial@ff110000]/serial@ff120000e/serial@ff130000m/i2c@ff150000r/i2c@ff160000w/i2c@ff170000|/i2c@ff180000/ethernet@ff540000/ethernet@ff550000/mmc@ff500000/mmc@ff520000cpus+cpu@0cpuarm,cortex-a53xpsci@0=J@\iz cpu@1cpuarm,cortex-a53xpsci@0=J@\iz cpu@2cpuarm,cortex-a53xpsci@0=J@\iz cpu@3cpuarm,cortex-a53xpsci@0=J@\iz idle-statespscicpu-sleeparm,idle-statexl2-cachecache @2opp-table-0operating-points-v2opp-408000000Q ~.@?opp-600000000#F ~.@opp-8160000000, B@.@opp-1008000000< .@opp-1200000000G (.@opp-1296000000M?d  .@analog-soundsimple-audio-cardKi2sd~Analogokaysimple-audio-card,cpusimple-audio-card,codecarm-pmuarm,cortex-a53-pmu0defg display-subsystemrockchip,display-subsystem hdmi-soundsimple-audio-cardKi2sd~HDMI disabledsimple-audio-card,cpusimple-audio-card,codecpsciarm,psci-1.0arm,psci-0.2smctimerarm,armv8-timer0   xin24m fixed-clockn6xin24mDi2s@ff000000(rockchip,rk3328-i2srockchip,rk3066-i2s )7i2s_clki2s_hclk   txrx disabledi2s@ff010000(rockchip,rk3328-i2srockchip,rk3066-i2s *8i2s_clki2s_hclk txrxokayi2s@ff020000(rockchip,rk3328-i2srockchip,rk3066-i2s +9i2s_clki2s_hclk txrx disabledspdif@ff030000rockchip,rk3328-spdif .: mclkhclk  tx&default4 disabledpdm@ff040000 rockchip,pdm=Rpdm_clkpdm_hclk rx&defaultsleep4> disabledsyscon@ff100000&rockchip,rk3328-grfsysconsimple-mfd8io-domains"rockchip,rk3328-io-voltage-domainokayHUcqgpiorockchip,rk3328-grf-gpiopower-controller!rockchip,rk3328-power-controller+;power-domain@6Dpower-domain@5 BABpower-domain@8Freboot-modesyscon-reboot-modeRBRBRB  RBserial@ff110000&rockchip,rk3328-uartsnps,dw-apb-uart 7&baudclkapb_pclk txrx&default 4 # disabledserial@ff120000&rockchip,rk3328-uartsnps,dw-apb-uart 8'baudclkapb_pclk txrx&default 4!"## disabledserial@ff130000&rockchip,rk3328-uartsnps,dw-apb-uart 9(baudclkapb_pclk txrx&default4$#okayi2c@ff150000(rockchip,rk3328-i2crockchip,rk3399-i2c $+7 i2cpclk&default4% disabledi2c@ff160000(rockchip,rk3328-i2crockchip,rk3399-i2c %+8 i2cpclk&default4&okaypmic@18rockchip,rk805 'xin32krk805-clkout2&default4(-ES)_)k)w))regulatorsDCDC_REG1vdd_log 4 0regulator-state-mem-B@DCDC_REG2vdd_arm 4 0regulator-state-mem-~DCDC_REG3vcc_ddrregulator-state-memDCDC_REG4vcc_io2Z2Zregulator-state-mem-2ZLDO_REG1vcc_18w@w@9regulator-state-mem-w@LDO_REG2 vcc18_emmcw@w@regulator-state-mem-w@LDO_REG3vdd_10B@B@regulator-state-mem-B@i2c@ff170000(rockchip,rk3328-i2crockchip,rk3399-i2c &+9 i2cpclk&default4* disabledi2c@ff180000(rockchip,rk3328-i2crockchip,rk3399-i2c '+: i2cpclk&default4+ disabledspi@ff190000(rockchip,rk3328-spirockchip,rk3066-spi 1+ spiclkapb_pclk  txrx&default4,-./ disabledwatchdog@ff1a0000 rockchip,rk3328-wdtsnps,dw-wdt (pwm@ff1b0000rockchip,rk3328-pwm< pwmpclk&default40I disabledpwm@ff1b0010rockchip,rk3328-pwm< pwmpclk&default41I disabledpwm@ff1b0020rockchip,rk3328-pwm < pwmpclk&default42I disabledpwm@ff1b0030rockchip,rk3328-pwm0< pwmpclk&default43I disableddma-controller@ff1f0000arm,pl330arm,primecell@T apb_pclkkthermal-zonessoc-thermalv4tripstrip-point0ppassivetrip-point1Lpassive5soc-crits criticalcooling-mapsmap050 tsadc@ff250000rockchip,rk3328-tsadc% :$P$tsadcapb_pclk&initdefaultsleep46>76#B *tsadc-apb68CZokay4efuse@ff260000rockchip,rk3328-efuse&P+> pclk_efusep id@7cpu-leakage@17logic-leakage@19cpu-version@1aEadc@ff280000.rockchip,rk3328-saradcrockchip,rk3399-saradc( P%saradcapb_pclk#V *saradc-apbokay9egpu@ff300000"rockchip,rk3328-maliarm,mali-4500TZW]XY[\"gpgpmmupppp0ppmmu0pp1ppmmu1 buscore#fiommu@ff330200rockchip,iommu3 ` aclkiface disablediommu@ff340800rockchip,iommu4@ bF aclkiface disabledvideo-codec@ff350000rockchip,rk3328-vpu5  vdpuF aclkhclk:;iommu@ff350800rockchip,iommu5@  F aclkiface;:video-codec@ff360000*rockchip,rk3328-vdecrockchip,rk3399-vdec6  BABaxiahbcabaccoreAB ׄׄ<;iommu@ff360480rockchip,iommu 6@6@ JB aclkiface;<vop@ff370000rockchip,rk3328-vop7>  x;aclk_vopdclk_vophclk_vop# *axiahbdclk= disabledport+ endpoint@0>Ciommu@ff373f00rockchip,iommu7?  ; aclkiface disabled=hdmi@ff3c0000rockchip,rk3328-dw-hdmi< #Fiahbisfrcec?hdmi&default 4@AB68 disabledports+port@0endpointC>port@1codec@ff410000rockchip,rk3328-codecA* pclkmclk68okayphy@ff430000rockchip,rk3328-hdmi-phyC SDysysclkrefoclkrefpclk hdmi_phyE cpu-version disabled?clock-controller@ff440000rockchip,rk3328-cruDDxin24m68 x=&'(ABDC"\5H4$-zDDD|n6n6n6ׄn6#FLGрxhxhрxhxhsyscon@ff450000.rockchip,rk3328-usb2phy-grfsysconsimple-mfdE+usb2phy@100rockchip,rk3328-usb2phyDphyclk usb480m_phy{-FokayFotg-port$;<=otg-bvalidotg-idlinestateokayXhost-port > linestateokayYmmc@ff5000000rockchip,rk3328-dw-mshcrockchip,rk3288-dw-mshcP@   =!JNbiuciuciu-driveciu-sampleDOр#m*resetokay]gx&default4GHIJKmmc@ff5100000rockchip,rk3328-dw-mshcrockchip,rk3288-dw-mshcQ@   >"KObiuciuciu-driveciu-sampleDOр#n*reset disabledmmc@ff5200000rockchip,rk3328-dw-mshcrockchip,rk3288-dw-mshcR@  ?#LPbiuciuciu-driveciu-sampleDOр#o*resetokay]&default 4LMNethernet@ff540000rockchip,rk3328-gmacT macirq8dWXZYMstmmacethmac_clk_rxmac_clk_txclk_mac_refclk_mac_refoutaclk_macpclk_mac#c *stmmaceth68okaydf-OOinput Prgmii &default4Q+&4mdiosnps,dwmac-mdio+ethernet-phy@14RS&default T='MP _TPethernet@ff550000rockchip,rk3328-gmacU68 macirq8TSSUVIstmmacethmac_clk_rxmac_clk_txclk_mac_refaclk_macpclk_macclk_macphy#b *stmmacethrmii Uoutputokaymdiosnps,dwmac-mdio+ethernet-phy@04ethernet-phy-id1234.d400ethernet-phy-ieee802.3-c22V#d&default4VWkUusb@ff5800002rockchip,rk3328-usbrockchip,rk3066-usbsnps,dwc2X Motg}otg@ X usb2-phyokayusb@ff5c0000 generic-ehci\  NFYusbokayusb@ff5d0000 generic-ohci]  NFYusb disabledmmc@ff5f00000rockchip,rk3328-dw-mshcrockchip,rk3288-dw-mshc_@  @MQbiuciuciu-driveciu-sampleDOр#h*reset disabledusb@ff600000rockchip,rk3328-dwc3snps,dwc3` C`aref_clksuspend_clkbus_clk}host utmi_wide  : Sokayinterrupt-controller@ff811000 arm,gic-400 l }@ @ `   crypto@ff060000rockchip,rk3328-crypto@ PQ;hclk_masterhclk_slavesclk#D *crypto-rstpinctrlrockchip,rk3328-pinctrl68+ gpio@ff210000rockchip,gpio-bank! 3 } l1 pin-15 [GPIO0_D3]'gpio@ff220000rockchip,gpio-bank" 4 } l1 pin-07 [GPIO1_D4]Tgpio@ff230000rockchip,gpio-bank# 5 } lA pin-08 [GPIO2_A0]pin-10 [GPIO2_A1]pin-11 [GPIO2_A2]pin-13 [GPIO2-A3]pin-27 [GPIO2_A4]pin-28 [GPIO2_A5]pin-33 [GPIO2_A6]pin-26 [GPIO2_B4]pin-36 [GPIO2_B7]pin-32 [GPIO2_C0]pin-35 [GPIO2_C1]pin-12 [GPIO2_C2]pin-38 [GPIO2_C3]pin-29 [GPIO2_C4]pin-31 [GPIO2_C5]pin-37 [GPIO2_C6]pin-40 [GPIO2_C7]gpio@ff240000rockchip,gpio-bank$ 6 } l pin-23 [GPIO3_A0]pin-19 [GPIO3_A1]pin-21 [GPIO3_A2]pin-03 [GPIO3_A4]pin-05 [GPIO3_A6]pin-24 [GPIO3_B0]gpcfg-pull-up \pcfg-pull-down dpcfg-pull-none Zpcfg-pull-none-2ma  cpcfg-pull-up-2ma  pcfg-pull-up-4ma  ]pcfg-pull-none-4ma  `pcfg-pull-down-4ma  pcfg-pull-none-8ma  ^pcfg-pull-up-8ma  _pcfg-pull-none-12ma  apcfg-pull-up-12ma  bpcfg-output-high pcfg-output-low pcfg-input-high  [pcfg-input i2c0i2c0-xfer ZZ%i2c1i2c1-xfer ZZ&i2c2i2c2-xfer  ZZ*i2c3i2c3-xfer ZZ+i2c3-pins ZZhdmi_i2chdmii2c-xfer ZZApdm-0pdmm0-clk Zpdmm0-fsync Zpdmm0-sdi0 Zpdmm0-sdi1 Zpdmm0-sdi2 Zpdmm0-sdi3 Zpdmm0-clk-sleep [pdmm0-sdi0-sleep [pdmm0-sdi1-sleep [pdmm0-sdi2-sleep [pdmm0-sdi3-sleep [pdmm0-fsync-sleep [tsadcotp-pin  Z6otp-out  Z7uart0uart0-xfer  Z\uart0-cts  Zuart0-rts  Z uart0-rts-pin  Zuart1uart1-xfer Z\!uart1-cts Z"uart1-rts Z#uart1-rts-pin Zuart2-0uart2m0-xfer Z\uart2-1uart2m1-xfer Z\$spi0-0spi0m0-clk \spi0m0-cs0  \spi0m0-tx  \spi0m0-rx  \spi0m0-cs1  \spi0-1spi0m1-clk \spi0m1-cs0 \spi0m1-tx \spi0m1-rx \spi0m1-cs1 \spi0-2spi0m2-clk \,spi0m2-cs0 \/spi0m2-tx \-spi0m2-rx \.i2s1i2s1-mclk Zi2s1-sclk Zi2s1-lrckrx Zi2s1-lrcktx Zi2s1-sdi Zi2s1-sdo Zi2s1-sdio1 Zi2s1-sdio2 Zi2s1-sdio3 Zi2s1-sleep [[[[[[[[[i2s2-0i2s2m0-mclk Zi2s2m0-sclk Zi2s2m0-lrckrx Zi2s2m0-lrcktx Zi2s2m0-sdi Zi2s2m0-sdo Zi2s2m0-sleep` [[[[[[i2s2-1i2s2m1-mclk Zi2s2m1-sclk Zi2sm1-lrckrx Zi2s2m1-lrcktx Zi2s2m1-sdi Zi2s2m1-sdo Zi2s2m1-sleepP [[[[[spdif-0spdifm0-tx Zspdif-1spdifm1-tx Zspdif-2spdifm2-tx Zsdmmc0-0sdmmc0m0-pwren ]sdmmc0m0-pin ]sdmmc0-1sdmmc0m1-pwren ]sdmmc0m1-pin ]hsdmmc0sdmmc0-clk ^Gsdmmc0-cmd _Hsdmmc0-dectn ]Isdmmc0-wrprt ]sdmmc0-bus1 _sdmmc0-bus4@ ____Jsdmmc0-pins ]]]]]]]]sdmmc0extsdmmc0ext-clk `sdmmc0ext-cmd ]sdmmc0ext-wrprt ]sdmmc0ext-dectn ]sdmmc0ext-bus1 ]sdmmc0ext-bus4@ ]]]]sdmmc0ext-pins ]]]]]]]]sdmmc1sdmmc1-clk  ^sdmmc1-cmd  _sdmmc1-pwren _sdmmc1-wrprt _sdmmc1-dectn _sdmmc1-bus1 _sdmmc1-bus4@ ____sdmmc1-pins  ] ]]]]]]]]emmcemmc-clk aLemmc-cmd bMemmc-pwren Zemmc-rstnout Zemmc-bus1 bemmc-bus4@ bbbbemmc-bus8 bbbbbbbbNpwm0pwm0-pin Z0pwm1pwm1-pin Z1pwm2pwm2-pin Z2pwmirpwmir-pin Z3gmac-1rgmiim1-pins`  ^ ``^``` ` `^ ^``^^^ ^`^^^^Qrmiim1-pins cacccc c ca a Z ZZZZZgmac2phyfephyled-speed10 Zfephyled-duplex Zfephyled-rxm1 ZVfephyled-txm1 Zfephyled-linkm1 ZWtsadc_pintsadc-int  Ztsadc-pin  Zhdmi_pinhdmi-cec Z@hdmi-hpd dBcif-0dvp-d2d9-m0 ZZZZZ Z Z ZZZZZcif-1dvp-d2d9-m1 ZZZZZZZZZZZZephyeth-phy-int-pin dReth-phy-reset-pin dSledsled-pin Zfpmicpmic-int-l \(usb3usb30-host-drv Ziwifiwifi-en Zjchosen serial2:1500000n8adc-keys adc-keys e +buttons <button-recovery VRecovery \h g'external-gmac-clock fixed-clocksY@ gmac_clkinOleds gpio-leds4f&defaultled-0  eg heartbeatregulator-sdmmcregulator-fixed '&default4hvcc_sd Kregulator-vcc-host-5vregulator-fixed g&default4i  vcc_host_5v )regulator-vcc-sysregulator-fixedvcc_sysLK@LK@)regulator-vcc-wifiregulator-fixed '&default4j vcc_wifi  compatibleinterrupt-parent#address-cells#size-cellsmodelgpio0gpio1gpio2gpio3serial0serial1serial2i2c0i2c1i2c2i2c3ethernet0ethernet1mmc0mmc1device_typeregclocks#cooling-cellscpu-idle-statesdynamic-power-coefficientenable-methodoperating-points-v2i-cache-sizei-cache-line-sizei-cache-setsd-cache-sized-cache-line-sized-cache-setsnext-level-cachecpu-supplyphandleentry-methodlocal-timer-stoparm,psci-suspend-paramentry-latency-usexit-latency-usmin-residency-uscache-levelcache-unifiedopp-sharedopp-hzopp-microvoltclock-latency-nsopp-suspendsimple-audio-card,formatsimple-audio-card,mclk-fssimple-audio-card,namestatussound-daiinterruptsinterrupt-affinityports#clock-cellsclock-frequencyclock-output-namesclock-namesdmasdma-names#sound-dai-cellspinctrl-namespinctrl-0pinctrl-1pmuio-supplyvccio1-supplyvccio2-supplyvccio3-supplyvccio4-supplyvccio5-supplyvccio6-supplygpio-controller#gpio-cells#power-domain-cellsoffsetmode-normalmode-recoverymode-bootloadermode-loaderreg-io-widthreg-shiftsystem-power-controllerwakeup-sourcevcc1-supplyvcc2-supplyvcc3-supplyvcc4-supplyvcc5-supplyvcc6-supplyregulator-nameregulator-always-onregulator-boot-onregulator-min-microvoltregulator-max-microvoltregulator-ramp-delayregulator-on-in-suspendregulator-suspend-microvolt#pwm-cellsarm,pl330-periph-burst#dma-cellspolling-delay-passivepolling-delaysustainable-powerthermal-sensorstemperaturehysteresistripcooling-devicecontributionassigned-clocksassigned-clock-ratespinctrl-2resetsreset-namesrockchip,grfrockchip,hw-tshut-temp#thermal-sensor-cellsrockchip,efuse-sizebits#io-channel-cellsvref-supplyinterrupt-names#iommu-cellsiommuspower-domainsremote-endpointphysphy-namesnvmem-cellsnvmem-cell-names#phy-cells#reset-cellsassigned-clock-parentsfifo-depthmax-frequencybus-widthcap-sd-highspeeddisable-wpvmmc-supplycap-mmc-highspeedmmc-ddr-1_8vmmc-hs200-1_8vnon-removablevqmmc-supplytx-fifo-depthrx-fifo-depthsnps,txpblclock_in_outphy-handlephy-modephy-supplytx_delayrx_delayreset-assert-usreset-deassert-usreset-gpiosphy-is-integrateddr_modeg-np-tx-fifo-sizeg-rx-fifo-sizeg-tx-fifo-sizephy_typesnps,dis-del-phy-power-chg-quirksnps,dis_enblslpm_quirksnps,dis-tx-ipgap-linecheck-quirksnps,dis-u2-freeclk-exists-quirksnps,dis_u2_susphy_quirksnps,dis_u3_susphy_quirk#interrupt-cellsinterrupt-controllerrangesgpio-line-namesbias-pull-upbias-pull-downbias-disabledrive-strengthoutput-highoutput-lowinput-enablerockchip,pinsstdout-pathio-channelsio-channel-nameskeyup-threshold-microvoltlabellinux,codepress-threshold-microvoltcolorlinux,default-triggergpiovin-supplyenable-active-high