8(  ,Qualcomm SA8540P Ride2qcom,sa8540p-rideqcom,sa8540pclocksxo-board-clk 2fixed-clock=JIZsleep-clk 2fixed-clock=JZ4cpus cpu@0bcpu2arm,cortex-a78cnrypsci%psci Zl2-cache2cache(4Zl3-cache2cache(4Zcpu@100bcpu2arm,cortex-a78cnrypsci% psci Zl2-cache2cache(4Zcpu@200bcpu2arm,cortex-a78cnrypsci%  psci Zl2-cache2cache(4Z cpu@300bcpu2arm,cortex-a78cnrypsci%  psci Zl2-cache2cache(4Z cpu@400bcpu2arm,cortex-x1cnrypsciNpsci Zl2-cache2cache(4Zcpu@500bcpu2arm,cortex-x1cnrypsciNpsci Zl2-cache2cache(4Zcpu@600bcpu2arm,cortex-x1cnrypsciNpsci Zl2-cache2cache(4Zcpu@700bcpu2arm,cortex-x1cnrypsciNpsci Zl2-cache2cache(4Zcpu-mapcluster0core0Bcore1Bcore2Bcore3Bcore4Bcore5Bcore6Bcore7Bidle-statesFpscicpu-sleep-0-02arm,idle-stateSlittle-rail-power-collapsec@zc^Z&cpu-sleep-1-02arm,idle-stateSbig-rail-power-collapsec@zZ'domain-idle-statescluster-sleep-02domain-idle-statecADz 'Z(firmwarescm2qcom,scm-sc8280xpqcom,scm  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qup-corequp-config^okayi2c@8880002qcom,geni-i2cn@ r+ se H<H ==>?.@  qup-corequp-configqup-memory^okaydefaultBspi@8880002qcom,geni-spin@ r+ se H<H ==>?.@  qup-corequp-configqup-memory ^disabledserial@8880002qcom,geni-uartn@r+ se HA<0 ==>?. qup-corequp-configCdefault ^disabledi2c@88c0002qcom,geni-i2cn@ r+ se I<H ==>?.@  qup-corequp-configqup-memory ^disabledspi@88c0002qcom,geni-spin@ r+ se I<H ==>?.@  qup-corequp-configqup-memory ^disabledi2c@8900002qcom,geni-i2cn@ r+ se J<H ==>?.@  qup-corequp-configqup-memory ^disabledspi@8900002qcom,geni-spin@ r+ se J<H ==>?.@  qup-corequp-configqup-memory ^disabledi2c@8940002qcom,geni-i2cn@@ ser+ K <H ==>?.@  qup-corequp-configqup-memory ^disabledspi@8940002qcom,geni-spin@@ r+ se K<H ==>?.@  qup-corequp-configqup-memory ^disabledi2c@8980002qcom,geni-i2cn@  ser+ A<H ==>?.@  qup-corequp-configqup-memory ^disabledspi@8980002qcom,geni-spin@ r+ se A<H ==>?.@  qup-corequp-configqup-memory ^disabledi2c@89c0002qcom,geni-i2cn@  ser+ B<H ==>?.@  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^disabledspi@9900002qcom,geni-spin@ r+ se ]<H ==>?,@  qup-corequp-configqup-memory ^disabledi2c@9940002qcom,geni-i2cn@@  ser+ ^<H ==>?,@  qup-corequp-configqup-memory ^disabledspi@9940002qcom,geni-spin@@ r+ se ^<H ==>?,@  qup-corequp-configqup-memory ^disabledi2c@9980002qcom,geni-i2cn@  ser+ _<H ==>?,@  qup-corequp-configqup-memory ^disabledspi@9980002qcom,geni-spin@ r+ se _<H ==>?,@  qup-corequp-configqup-memory ^disabledi2c@99c0002qcom,geni-i2cn@  ser+ `<H ==>?,@  qup-corequp-configqup-memory ^disabledspi@99c0002qcom,geni-spin@ r+ se `<H ==>?,@  qup-corequp-configqup-memory ^disabledgeniqup@ac00002qcom,geni-se-qupn`r++  m-ahbs-ahb ), Q^okayi2c@a800002qcom,geni-i2cn@ r+ se a<H ==>?-@  qup-corequp-configqup-memory ^disabledspi@a800002qcom,geni-spin@ r+ se a<H ==>?-@  qup-corequp-configqup-memory ^disabledi2c@a840002qcom,geni-i2cn@@ r+ se b<H ==>?-@  qup-corequp-configqup-memory ^disabledspi@a840002qcom,geni-spin@@ r+ se b<H ==>?-@  qup-corequp-configqup-memory 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ref+,^okaypqrZphy@88e700022qcom,sc8280xp-usb-hs-phyqcom,usb-snps-hs-5nm-phynpr+ ref+(^okaypsrZyphy@88e800022qcom,sc8280xp-usb-hs-phyqcom,usb-snps-hs-5nm-phynr+ ref+) ^disabledZ{phy@88e900022qcom,sc8280xp-usb-hs-phyqcom,usb-snps-hs-5nm-phynr+ ref+* ^disabledZ}phy@88ea00022qcom,sc8280xp-usb-hs-phyqcom,usb-snps-hs-5nm-phynr+ ref++ ^disabledZ~phy@88eb0002qcom,sc8280xp-qmp-usb43dp-phyn@ r+=+`+?+@ auxrefcom_auxusb3_pipe+ +9+F phycommon=^okay LpZ5ports port@0nendpointport@1nendpoint tZport@2nendpointphy@88ef0002qcom,sc8280xp-qmp-usb3-uni-phyn  r+6+4+8+9 auxrefcom_auxpipe+;+? phyphy_phy+ =usb2_phy0_pipe_clk^okay LpZzphy@88f10002qcom,sc8280xp-qmp-usb3-uni-phyn  r+6+5+8+; auxrefcom_auxpipe+<+@ phyphy_phy+ =usb2_phy1_pipe_clk ^disabledZ|phy@890200022qcom,sc8280xp-usb-hs-phyqcom,usb-snps-hs-5nm-phyn r3 ref+- ^disabledZphy@89030002qcom,sc8280xp-qmp-usb43dp-phyn0@ r+B+^+D+E auxrefcom_auxusb3_pipe+ +:+B phycommon= ^disabledZ6ports port@0nendpointport@1nendpoint uZport@2nendpointphy@8909a002qcom,sc8280xp-dp-phy@nrvv  auxcfg_ahb< = ^disabledZphy@890ca002qcom,sc8280xp-dp-phy@nrvv  auxcfg_ahb< = ^disabledZpmu@909100002qcom,sc8280xp-llcc-bwmonqcom,sc7280-llcc-bwmonn  Q  wopp-table2operating-points-v2Zwopp-0 opp-1>opp-2popp-3'opp-4,hopp-5;0Xopp-6N(opp-7Zopp-8ci8opp-9yopp-10|%@opp-11Aopp-12pmu@90b6400*2qcom,sc8280xp-cpu-bwmonqcom,sdm845-bwmonn d E >>xopp-table2operating-points-v2Zxopp-0"opp-1Eopp-2l}popp-3opp-4opp-59`opp-6ёsystem-cache-controller@92000002qcom,sc8280xp-llccn  ( 0 8 @ H P X `lllcc0_basellcc1_basellcc2_basellcc3_basellcc4_basellcc5_basellcc6_basellcc7_basellcc_broadcast_base Fusb@a4f8800 2qcom,sc8280xp-dwc3-mpqcom,dwc3n O QHr++ + +%+"++++R cfg_noccoreifacesleepmock_utminoc_aggrnoc_aggr_northnoc_aggr_southnoc_sysy+"+ $ qYX\[VV~VVVVVVVVpwr_event_1pwr_event_2pwr_event_3pwr_event_4hs_phy_1hs_phy_2hs_phy_3hs_phy_4dp_hs_phy_1dm_hs_phy_1dp_hs_phy_2dm_hs_phy_2dp_hs_phy_3dm_hs_phy_3dp_hs_phy_4dm_hs_phy_4ss_phy_1ss_phy_2+ I+40 @ >?; usb-ddrapps-usb  ^disabledusb@a400000 2snps,dwc3n @  ),yz{|}~*usb2-0usb3-0usb2-1usb3-1usb2-2usb2-3 )host 1 Iusb@a6f88002qcom,sc8280xp-dwc3qcom,dwc3n o QHr+ +&++++(++++R cfg_noccoreifacesleepmock_utminoc_aggrnoc_aggr_northnoc_aggr_southnoc_sysy+(+&$ Dq$%VVV<pwr_evenths_phy_irqdp_hs_phy_irqdm_hs_phy_irqss_phy_irq+ I+50 @ >?9 usb-ddrapps-usb ^okayusb@a600000 2snps,dwc3n ` # ),  5usb2-phyusb3-phy 1 I )peripheralports port@0nendpointport@1nendpoint Ztusb@a8f88002qcom,sc8280xp-dwc3qcom,dwc3n  QHr+!+,++1+.++++R cfg_noccoreifacesleepmock_utminoc_aggrnoc_aggr_northnoc_aggr_southnoc_sysy+.+,$ Dq+V V V<pwr_evenths_phy_irqdp_hs_phy_irqdm_hs_phy_irqss_phy_irq+ I+60 @ >?: usb-ddrapps-usb  ^disabledusb@a800000 2snps,dwc3n  * ),` 6usb2-phyusb3-phy 1 Iports port@0nendpointport@1nendpoint Zucci@ac4a000#2qcom,sc8280xp-cciqcom,msm8996-ccin Ġ  r"% camnoc_axislow_ahb_srccpas_ahbcci adefaultsleep  ^disabledi2c-bus@0nJB@ i2c-bus@1nJB@ cci@ac4b000#2qcom,sc8280xp-cciqcom,msm8996-ccin İ  r"% camnoc_axislow_ahb_srccpas_ahbcci adefaultsleep  ^disabledi2c-bus@0nJB@ i2c-bus@1nJB@ cci@ac4c000#2qcom,sc8280xp-cciqcom,msm8996-ccin   r"% camnoc_axislow_ahb_srccpas_ahbcci adefaultsleep  ^disabledi2c-bus@0nJB@ i2c-bus@1nJB@ cci@ac4d000#2qcom,sc8280xp-cciqcom,msm8996-ccin   r"% camnoc_axislow_ahb_srccpas_ahbcci adefaultsleep  ^disabledi2c-bus@0nJB@ i2c-bus@1nJB@ camss@ac5a0002qcom,sc8280xp-camss@n Š P p @ 0 `@ ˠ @  @@ ̀ ̰@  @ ` ͐@  @ @csiphy2csiphy3csiphy0csiphy1vfe0csid0vfe1csid1vfe2csid2vfe_lite0csid0_litevfe_lite1csid1_litevfe_lite2csid2_litevfe_lite3csid3_litevfe3csid3ghcsid1_litevfe_lite1csiphy3csid0vfe0csid1vfe1csid0_litevfe_lite0csiphy0csiphy1csiphy2csid2vfe2csid3_litecsid2_litevfe_lite3vfe_lite2csid3vfe3(ife0ife1ife2ife3top@r",$-&.(/*5689<=?@CDFGJKMNQSTVXY[]^`bc++ camnoc_axicpas_ahbcsiphy0csiphy0_timercsiphy1csiphy1_timercsiphy2csiphy2_timercsiphy3csiphy3_timervfe0_axivfe0vfe0_cphy_rxvfe0_csidvfe1_axivfe1vfe1_cphy_rxvfe1_csidvfe2_axivfe2vfe2_cphy_rxvfe2_csidvfe3_axivfe3vfe3_cphy_rxvfe3_csidvfe_lite0vfe_lite0_cphy_rxvfe_lite0_csidvfe_lite1vfe_lite1_cphy_rxvfe_lite1_csidvfe_lite2vfe_lite2_cphy_rxvfe_lite2_csidvfe_lite3vfe_lite3_cphy_rxvfe_lite3_csidgcc_axi_hfgcc_axi_sf), , , @, `, , , , ,$,$ ,$@,$`,$,$,$,$` >?   0 cam_ahbcam_hf_mnoccam_sf_mnoccam_sf_icp_mnoc ^disabledports port@0n port@1n port@2n port@3n clock-controller@ad000002qcom,sc8280xp-camccn r+334<#=*Zdisplay-subsystem@ae000002qcom,sc8280xp-mdssn mdssr+-< ifaceahbcore S0    mdp0-memmdp1-mem ), Q ^disabledZdisplay-controller@ae010002qcom,sc8280xp-dpu n  0 mdpvbif0r+.+/?<K! busnrt_busifacelutcorevsync<yK$ports port@0nendpoint Zport@4nendpoint Zport@5nendpoint Zport@6nendpoint Zopp-table2operating-points-v2Zopp-200000000 #opp-300000000$opp-375000000Z oopp-500000000eIopp-600000000#Fdisplayport-controller@ae900002qcom,sc8280xp-dpPn      (r; core_ifacecore_auxctrl_linkctrl_link_ifacestream_pixely k555dp< ^disabledports port@0nendpoint Zport@1nendpointopp-table2operating-points-v2Zopp-160000000 h#opp-270000000߀$opp-540000000 /oopp-8100000000GIdisplayport-controller@ae980002qcom,sc8280xp-dpPn      (r ; core_ifacecore_auxctrl_linkctrl_link_ifacestream_pixely! k666dp< ^disabledports port@0nendpoint Zport@1nendpointopp-table2operating-points-v2Zopp-160000000 h#opp-270000000߀$opp-540000000 /oopp-8100000000GIdisplayport-controller@ae9a0002qcom,sc8280xp-dpPn     (r%'*+; core_ifacecore_auxctrl_linkctrl_link_ifacestream_pixeldp<y(, k ^disabledports port@0nendpoint Zport@1nopp-table2operating-points-v2Zopp-160000000 h#opp-270000000߀$opp-540000000 /oopp-8100000000GIdisplayport-controller@aea00002qcom,sc8280xp-dpPn     (r/145; core_ifacecore_auxctrl_linkctrl_link_ifacestream_pixeldp<y26 k ^disabledports port@0nendpoint Zport@1nopp-table2operating-points-v2Zopp-160000000 h#opp-270000000߀$opp-540000000 /oopp-8100000000GIphy@aec2a002qcom,sc8280xp-dp-phy@n * " & r%  auxcfg_ahb< = ^disabledZphy@aec5a002qcom,sc8280xp-dp-phy@n Z R V Pr/  auxcfg_ahb< = ^disabledZclock-controller@af000002qcom,sc8280xp-dispcc0n dr+-345566<=* ^disabledZinterrupt-controller@b2200002qcom,sc8280xp-pdcqcom,pdc n "` ((672;8>v@BEVF6|a~!YCz ytY\n/rZVthermal-sensor@c251000"2qcom,sc8280xp-tsensqcom,tsens-v2 n % "@ qVzV|uplowcritical Zthermal-sensor@c252000"2qcom,sc8280xp-tsensqcom,tsens-v2 n %  "P qV{V}uplowcritical thermal-sensor@c263000"2qcom,sc8280xp-tsensqcom,tsens-v2 n &0 "  qVVuplowcritical Zrestart@c264000 2qcom,psholdn &@ ^reservedthermal-sensor@c265000"2qcom,sc8280xp-tsensqcom,tsens-v2 n &P "0 qVVuplowcritical Zpower-management@c300000%2qcom,sc8280xp-aoss-qmpqcom,aoss-qmpn 0q* *=ZYsram@c3f00002qcom,rpmh-statsn ?~Yspmi@c4400002qcom,spmi-pmic-arbPn D ``p @`corechnlsobsrvrintrcnfg periph_irq qV   pmic@02qcom,pm8150qcom,spmi-pmicn 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cci2-sleep-stateZcci2-i2c0-sleep-pins0gpio117gpio1185cci_i2c>cci2-i2c1-sleep-pins0gpio12gpio135cci_i2c>cci3-default-stateZcci3-i2c0-default-pins0gpio145gpio1465cci_i2c> cci3-i2c1-default-pins0gpio164gpio1655cci_i2c> cci3-sleep-stateZcci3-i2c0-sleep-pins0gpio145gpio1465cci_i2c>cci3-i2c1-sleep-pins0gpio164gpio1655cci_i2c>qup-uart18-default-stateZCcts-pins0gpio665qup18>Wrts-pins0gpio675qup18>Wtx-pins0gpio685qup18>Wrx-pins0gpio695qup18>Wethernet0-default-stateZ0mdc-pins0gpio1755rgmii_0> mdio-pins0gpio1765rgmii_0> rgmii-tx-pins00gpio183gpio184gpio185gpio186gpio187gpio1885rgmii_0> rgmii-rx-pins00gpio177gpio178gpio179gpio180gpio181gpio1825rgmii_0>Wethernet1-default-stateZmdc-pins0gpio975rgmii_1> mdio-pins0gpio985rgmii_1> rgmii-tx-pins00gpio105gpio106gpio107gpio108gpio109gpio1105rgmii_1> rgmii-rx-pins/0gpio99gpio100gpio101gpio102gpio103gpio1045rgmii_1>Wi2c0-default-state0gpio135gpio1365qup0> ZDi2c1-default-state0gpio158gpio1595qup1> ZEi2c12-default-state 0gpio0gpio15qup12> ZFi2c15-default-state0gpio36gpio375qup15> ZGi2c18-default-state0gpio66gpio675qup18> ZBpcie2a-default-stateZMperst-pins0gpio1435gpio>clkreq-pins0gpio1425pcie2a_clkreq> wake-pins0gpio1455gpio> pcie3a-default-stateZJperst-pins0gpio1515gpio>clkreq-pins0gpio1505pcie3a_clkreq> wake-pins0gpio565gpio> iommu@14f80000 2arm,smmu-v3n$eventqgerrorcmdq-sync( ^reservediommu@15000000#2qcom,sc8280xp-smmu-500arm,mmu-500n@Aghijklmnopqrstuv;<=>?@ABCDEFGHIJKLMNOPQRSTUVWXY~}|{z(Z,interrupt-controller@17a00000 2arm,gic-v3 n     QZmsi-controller@17a400002arm,gic-v3-itsn / >ZHwatchdog@17c10000%2qcom,apss-wdt-sc8280xpqcom,kpss-wdtnr4 timer@17c200002arm,armv7-timer-memn Q frame@17c21000 In frame@17c23000 I  n0 ^disabledframe@17c25000 I  nP ^disabledframe@17c27000 I  n` ^disabledframe@17c29000 I  n ^disabledframe@17c2b000 I  n° ^disabledframe@17c2d000 I n ^disabledrsc@182000002qcom,rpmh-rsc0n !"drv-0drv-1drv-2$ V  f r apps_rsc%bcm-voter2qcom,bcm-voterZ"clock-controller2qcom,sc8280xp-rpmh-clk= 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Zrregulators-12qcom,pm8150-rpmh-regulators cldo1 vreg_l1c   ldo2 vreg_l2c . . ldo4 vreg_l4c O n ldo6 vreg_l6c O O   ZPldo7 vreg_l7c w@ w@ ldo17 vreg_l17c &5@ &5@   ZOregulators-22qcom,pm8150-rpmh-regulators gldo3 vreg_l3g O O ZSldo7 vreg_l7g w@ w@ Zsldo8 vreg_l8g m m ZRinterconnect@18590000#2qcom,sc8280xp-epss-l3qcom,epss-l3nYr3+  xoalternateZcpufreq@18591000-2qcom,sc8280xp-cpufreq-epssqcom,cpufreq-epss nYY freq-domain0freq-domain1 dcvsh-irq-0dcvsh-irq-1r3+  xoalternate =Zremoteproc@1b3000002qcom,sc8280xp-nsp0-pasn0@qB#wdogfatalreadyhandoverstop-ackr3 xo< nsppstop  ^okay )qcom/sa8540p/cdsp0.mbnglink-edgeq* *nsp0fastrpc 2qcom,fastrpcfastrpcglink-apps-dspcdsp compute-cb@12qcom,fastrpc-compute-cbn ),1 compute-cb@22qcom,fastrpc-compute-cbn ),1 compute-cb@32qcom,fastrpc-compute-cbn ),1 compute-cb@42qcom,fastrpc-compute-cbn ),1 compute-cb@52qcom,fastrpc-compute-cbn ),1 compute-cb@62qcom,fastrpc-compute-cbn ),1 compute-cb@72qcom,fastrpc-compute-cbn ),1 compute-cb@82qcom,fastrpc-compute-cbn ),1 compute-cb@92qcom,fastrpc-compute-cbn  ),1 compute-cb@102qcom,fastrpc-compute-cbn  ),1 compute-cb@112qcom,fastrpc-compute-cbn  ),1 compute-cb@122qcom,fastrpc-compute-cbn  ),1 compute-cb@132qcom,fastrpc-compute-cbn  ),1 compute-cb@142qcom,fastrpc-compute-cbn ),1 remoteproc@213000002qcom,sc8280xp-nsp1-pasn!0@qw#wdogfatalreadyhandoverstop-ackr3 xo< nsppstop  ^okay )qcom/sa8540p/cdsp1.mbnglink-edgeq* *nsp1 display-subsystem@220000002qcom,sc8280xp-mdssn"mdssr+-vv< ifaceahbcore0    mdp0-memmdp1-mem a ),vv Q ^disabledZdisplay-controller@220010002qcom,sc8280xp-dpu n"" 0 mdpvbif0r+.+/vv?v<vK! busnrt_busifacelutcorevsync<yvK$ports port@0nendpoint Zport@4nendpoint Zport@5nendpoint Zport@6nendpoint Zopp-table2operating-points-v2Zopp-200000000 #opp-300000000$opp-375000000Z oopp-500000000eIopp-600000000#Fdisplayport-controller@220900002qcom,sc8280xp-dpPn" " " " " (rvvvvv; core_ifacecore_auxctrl_linkctrl_link_ifacestream_pixel dp<yvv k ^disabledports port@0nendpoint Zport@1nopp-table2operating-points-v2Zopp-160000000 h#opp-270000000߀$opp-540000000 /oopp-8100000000GIdisplayport-controller@220980002qcom,sc8280xp-dpPn" " " " " (rvvvvv ; core_ifacecore_auxctrl_linkctrl_link_ifacestream_pixel dp<yvv! k ^disabledports port@0nendpoint Zport@1nopp-table2operating-points-v2Zopp-160000000 h#opp-270000000߀$opp-540000000 /oopp-8100000000GIdisplayport-controller@2209a0002qcom,sc8280xp-dpPn" " " " " (rvv%v'v*v+; core_ifacecore_auxctrl_linkctrl_link_ifacestream_pixeldp<yv(v, k ^disabledports port@0nendpoint Zport@1nopp-table2operating-points-v2Zopp-160000000 h#opp-270000000߀$opp-540000000 /oopp-8100000000GIdisplayport-controller@220a00002qcom,sc8280xp-dpPn" " " " " (rvv/v1v4v5; core_ifacecore_auxctrl_linkctrl_link_ifacestream_pixeldp<yv2v6 k ^disabledports port@0nendpoint Zport@1nopp-table2operating-points-v2Zopp-160000000 h#opp-270000000߀$opp-540000000 /oopp-8100000000GIphy@220c2a002qcom,sc8280xp-dp-phy@n" *" "" &" rv%v  auxcfg_ahb< = ^disabledZphy@220c5a002qcom,sc8280xp-dp-phy@n" Z" R" V" Prv/v  auxcfg_ahb< = ^disabledZclock-controller@221000002qcom,sc8280xp-dispcc1n"dr+-3<=* ^disabledZvethernet@230000002qcom,sc8280xp-ethqos n##`stmmacethrgmii r+9+>+:+< stmmacethpclkptp_refrgmiimacirqeth_lpi ),@+ 09 BP^okayex rgmii-txiddefaultfixed-link 7 =rx-queues-config Zqueue00HVqueue10dqueue2s0queue3s0V tx-queues-configZqueue0queue1queue2squeue3ssoundthermal-zonescpu0-thermal I _tripscpu-crit o { icriticalcpu1-thermal I _tripscpu-crit o { icriticalcpu2-thermal I _tripscpu-crit o { icriticalcpu3-thermal I _tripscpu-crit o { icriticalcpu4-thermal I _tripscpu-crit o { icriticalcpu5-thermal I _tripscpu-crit o { icriticalcpu6-thermal I _tripscpu-crit o { icriticalcpu7-thermal I _tripscpu-crit o { icriticalcluster0-thermal I _ tripscpu-crit o { icriticalgpu-thermal I _cooling-mapsmap0  tripstrip-point0 oL {ipassiveZtrip-point1 o { icriticalmem-thermal I _tripstrip-point0 o_ {ihottimer2arm,armv8-timer0   aliases! /soc@0/geniqup@9c0000/i2c@980000! /soc@0/geniqup@9c0000/i2c@984000! /soc@0/geniqup@ac0000/i2c@a90000! /soc@0/geniqup@ac0000/i2c@a9c000! /soc@0/geniqup@8c0000/i2c@888000$ /soc@0/geniqup@8c0000/serial@884000chosen serial0:115200n8 interrupt-parent#address-cells#size-cellsmodelcompatible#clock-cellsclock-frequencyphandledevice_typeregclocksenable-methodcapacity-dmips-mhzdynamic-power-coefficientnext-level-cachepower-domainspower-domain-namesqcom,freq-domainoperating-points-v2interconnects#cooling-cellscache-levelcache-unifiedcpuentry-methodidle-state-namearm,psci-suspend-paramentry-latency-usexit-latency-usmin-residency-uslocal-timer-stopqcom,dload-mode#interconnect-cellsqcom,bcm-votersopp-sharedopp-hzopp-peak-kBpsrequired-oppsinterrupts#power-domain-cellsdomain-idle-statesrangesno-maphwlocksqcom,smeminterrupts-extendedmboxesqcom,local-pidqcom,remote-pidqcom,entry-name#qcom,smem-state-cellsinterrupt-controller#interrupt-cellsdma-rangesreg-namesclock-namesinterrupt-namesiommussnps,tsosnps,pblrx-fifo-depthtx-fifo-depthstatussnps,mtl-rx-configsnps,mtl-tx-configphy-handlephy-modepinctrl-namespinctrl-0reset-gpiosreset-assert-usreset-deassert-usmarvell,reg-initsnps,rx-queues-to-usesnps,rx-sched-spsnps,dcb-algorithmsnps,map-to-dma-channelsnps,route-upsnps,prioritysnps,route-ptpsnps,avb-algorithmsnps,route-avcpsnps,tx-queues-to-usesnps,send_slopesnps,idle_slopesnps,high_creditsnps,low_credit#reset-cells#mbox-cellsbitsinterconnect-namesbus-rangedma-coherentlinux,pci-domainnum-lanesmsi-mapinterrupt-map-maskinterrupt-mapassigned-clocksassigned-clock-ratesresetsreset-namesphysphy-namesclock-output-names#phy-cellsperst-gpioswake-gpiosqcom,4ln-config-selvdda-phy-supplyvdda-pll-supplylanes-per-directionfreq-table-hzvcc-supplyvccq-supply#hwlock-cellsmemory-regionqcom,qmpqcom,smem-statesqcom,smem-state-nameslabelqcom,glink-channelsqcom,non-secure-domainqcom,domainqcom,intents#sound-dai-cellsqcom,protection-domainqcom,din-portsqcom,dout-portsqcom,ports-sinterval-lowqcom,ports-offset1qcom,ports-offset2qcom,ports-hstartqcom,ports-hstopqcom,ports-word-lengthqcom,ports-block-pack-modeqcom,ports-lane-controlqcom,ports-block-group-countgpio-controller#gpio-cellsgpio-rangespinsfunctiondrive-strengthslew-ratebias-disablebias-bus-holdoutput-highinput-enableoutput-lowbias-pull-downqcom,gmuopp-level#iommu-cells#global-interruptsbus-widthopp-avg-kBpsvdda18-supplyvdda33-supplyremote-endpointwakeup-sourcedr_modesnps,dis-u1-entry-quirksnps,dis-u2-entry-quirkpinctrl-1assigned-clock-parentsqcom,pdc-ranges#qcom,sensors#thermal-sensor-cellsqcom,eeqcom,channelnvmem-cellsnvmem-cell-nameswakeup-parentbias-pull-up#redistributor-regionsredistributor-stridemsi-controller#msi-cellsframe-numberqcom,tcs-offsetqcom,drv-idqcom,tcs-configqcom,pmic-idregulator-nameregulator-min-microvoltregulator-max-microvoltregulator-initial-moderegulator-allowed-modesregulator-allow-set-load#freq-domain-cellsfirmware-namespeedfull-duplexpolling-delay-passivethermal-sensorstemperaturehysteresistripcooling-devicei2c0i2c1i2c12i2c15i2c18serial0stdout-path