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R d u     3disabledf>clock-controller@6b6c00062qcom,x1e80100-lpassaudioccqcom,sc8280xp-lpassaudioccYfsoundwire@6d300002qcom,soundwire-v2.0.0n:iface 9corewakeuptTXmswr_audio_cgcrhrdefault,?Rdu 3okayfcodec@0,32sdw20217010d00 fcodec@6d4400082qcom,x1e80100-lpass-va-macroqcom,sm8550-lpass-va-macro@$n9fg:mclkmacrodcodecYnfsgenfpinctrl@6e80000>2qcom,x1e80100-lpass-lpi-pinctrlqcom,sm8550-lpass-lpi-pinctrl %nfg :coreaudio/;ftx-swr-active-statefclk-pinsGgpio0 Lswr_tx_clkUdndata-pins Ggpio1gpio2 Lswr_tx_dataUd{rx-swr-active-statefclk-pinsGgpio3 Lswr_rx_clkUdndata-pins Ggpio4gpio5 Lswr_rx_dataUd{dmic01-default-statef?clk-pinsGgpio6 Ldmic1_clkUdata-pinsGgpio7 Ldmic1_dataUdmic23-default-statef@clk-pinsGgpio8 Ldmic2_clkUdata-pinsGgpio9 Ldmic2_dataUwsa-swr-active-statefclk-pinsGgpio10 Lwsa_swr_clkUdndata-pinsGgpio11 Lwsa_swr_dataUd{wsa2-swr-active-statefclk-pinsGgpio15 Lwsa2_swr_clkUdndata-pinsGgpio16Lwsa2_swr_dataUd{clock-controller@6ea0000,2qcom,x1e80100-lpassccqcom,sc8280xp-lpasscc Yfinterconnect@7e400002qcom,x1e80100-lpass-ag-noc'fAinterconnect@74000002qcom,x1e80100-lpass-lpiaon-noc@'fBinterconnect@74300002qcom,x1e80100-lpass-lpicx-nocC'fmmc@8804000&2qcom,x1e80100-sdhciqcom,sdhci-msm-v5@9hc_irqpwr_irqn==:ifacecorexo ,< d,h;0~!"?@Fsdhc-ddrcpu-sdhc3okay Ghrdefaultsleep fCopp-table2operating-points-v2fopp-19200000@$Gopp-50000000@G/opp-100000000@G0opp-202000000@ FGmmc@8844000&2qcom,x1e80100-sdhciqcom,sdhci-msm-v5@9hc_irqpwr_irqn==:ifacecorexo ,<`d,h;0~!"?@Fsdhc-ddrcpu-sdhc 3disabledfDopp-table2operating-points-v2fopp-19200000@$Gopp-50000000@G/opp-100000000@G0opp-202000000@ FGphy@88e000082qcom,x1e80100-snps-eusb2-phyqcom,sm8550-snps-eusb2-phyTn# :refm=9 3disabledfphy@88e100082qcom,x1e80100-snps-eusb2-phyqcom,sm8550-snps-eusb2-phyTn#:refm=43okaytfphy@88e200082qcom,x1e80100-snps-eusb2-phyqcom,sm8550-snps-eusb2-phy Tn#:refm=53okaytfphy@88e30002qcom,x1e80100-qmp-usb3-uni-phy0  n===:auxrefcom_auxpipem=G=L phyphy_phy=Ynusb_mp_phy0_pipe_clk3okayfphy@88e50002qcom,x1e80100-qmp-usb3-uni-phyP  n===:auxrefcom_auxpipem=H=M phyphy_phy=Ynusb_mp_phy1_pipe_clk3okayfusb@a0f88002qcom,x1e80100-dwc3qcom,dwc3 Hn====== ===R:cfg_noccoreifacesleepmock_utminoc_aggrnoc_aggr_northnoc_aggr_southnoc_sys== $ 4Ur:9 19pwr_eventdp_hs_phy_irqdm_hs_phy_irqss_phy_irq=Gm=A0~"?@%Fusb-ddrapps-usb   3okayfEusb@a000000 2snps,dwc3  a ,< :5usb2-phyusb3-phy  . F \ t hostfFports port@0endpointnfport@1endpointnfusb@a2f88002qcom,x1e80100-dwc3qcom,dwc3 /  Hn====== ===R:cfg_noccoreifacesleepmock_utminoc_aggrnoc_aggr_northnoc_aggr_southnoc_sys== $ (U21&9pwr_eventdp_hs_phy_irqdm_hs_phy_irq=Gm==0~"?@"Fusb-ddrapps-usb  3disabledfGusb@a200000 2snps,dwc3   ,< 5usb2-phy high-speed \ tfHports port@0endpointfIusb@a4f8800 2qcom,x1e80100-dwc3-mpqcom,dwc3 OHn====== ===R:cfg_noccoreifacesleepmock_utminoc_aggrnoc_aggr_northnoc_aggr_southnoc_sys== $ U9:58436578l9pwr_event_1pwr_event_2hs_phy_1hs_phy_2dp_hs_phy_1dm_hs_phy_1dp_hs_phy_2dm_hs_phy_2ss_phy_1ss_phy_2=Gm=>0~"?@&Fusb-ddrapps-usb   3okayfJusb@a400000 2snps,dwc3 @ 3 ,<5usb2-0usb3-0usb2-1usb3-1 host  . F \ tfKusb@a6f88002qcom,x1e80100-dwc3qcom,dwc3 oHn==== == ===R:cfg_noccoreifacesleepmock_utminoc_aggrnoc_aggr_northnoc_aggr_southnoc_sys== $ 4Us=19pwr_eventdp_hs_phy_irqdm_hs_phy_irqss_phy_irq=Gm=?   3okayfLusb@a600000 2snps,dwc3 ` c ,<  85usb2-phyusb3-phy  . F \ t otg fMports port@0endpointnfport@1endpointnfusb@a8f88002qcom,x1e80100-dwc3qcom,dwc3 Hn== === = ===R:cfg_noccoreifacesleepmock_utminoc_aggrnoc_aggr_northnoc_aggr_southnoc_sys= =  $ 4Ut< /19pwr_eventdp_hs_phy_irqdm_hs_phy_irqss_phy_irq=Gm=@0~"?@$Fusb-ddrapps-usb   3okayfNusb@a800000 2snps,dwc3  e ,<` 95usb2-phyusb3-phy  . F \ t hostfOports port@0endpointnfport@1endpointnfdisplay-subsystem@ae000002qcom,x1e80100-mdss mdss Sn=&:mH~? ""?@Fmdp0-memmdp1-memcpu-cfg ,<  3okayfdisplay-controller@ae010002qcom,x1e80100-dpu   mdpvbifU(n=&=:F:nrt_busifacelutcorevsync;fPports port@0endpointnf port@4endpointnfport@5endpointnfport@6endpointn fopp-table2operating-points-v2fopp-200000000@ G/opp-325000000@_@G0opp-375000000@Z Gopp-514000000@Gopp-575000000@"EG displayport-controller@ae900002qcom,x1e80100-dpP     U (n ;:core_ifacecore_auxctrl_linkctrl_link_ifacestream_pixel 88 ;85dp3okayfQports port@0endpointn fport@1endpointn   `=Av1fopp-table2operating-points-v2f opp-160000000@ hG/opp-270000000@߀G0opp-540000000@ /Gopp-810000000@0GGdisplayport-controller@ae980002qcom,x1e80100-dpP     U (n;:core_ifacecore_auxctrl_linkctrl_link_ifacestream_pixel 99;95dp3okayfRports port@0endpointnfport@1endpointn  `=Av1fopp-table2operating-points-v2fopp-160000000@ hG/opp-270000000@߀G0opp-540000000@ /Gopp-810000000@0GGdisplayport-controller@ae9a0002qcom,x1e80100-dpP     U(n"$'(;:core_ifacecore_auxctrl_linkctrl_link_ifacestream_pixel%) ::;:5dp3okayfSports port@0endpointnf port@1endpointn  `=Av1fopp-table2operating-points-v2fopp-160000000@ hG/opp-270000000@߀G0opp-540000000@ /Gopp-810000000@0GGdisplayport-controller@aea00002qcom,x1e80100-dpP     U(n-/23;:core_ifacecore_auxctrl_linkctrl_link_ifacestream_pixel04 ;5dp 3disabledfTports port@0endpointnfport@1opp-table2operating-points-v2fopp-160000000@ hG/opp-270000000@߀G0opp-540000000@ /Gopp-810000000@0GGphy@aec2a002qcom,x1e80100-dp-phy@ * " & n" :auxcfg_ahb;Y 3disabledfUphy@aec5a002qcom,x1e80100-dp-phy@ Z R V Pn- :auxcfg_ahb;Y 3disabledfclock-controller@af000002qcom,x1e80100-dispcc dn2=%38899::;G/Yfinterrupt-controller@b2200002qcom,x1e80100-pdcqcom,pdc "@dH **/ 4ca  0fpower-management@c300000%2qcom,x1e80100-aoss-qmpqcom,aoss-qmp 01U1 1Yfsram@c3f00002qcom,rpmh-stats ?arbiter@c4000002qcom,x1e80100-spmi-pmic-arb0 @0 P@ Dcorechnlsobsrvr    fVspmi@c42d000 B@ L cnfgintr 9periph_irq U fWpmic@02qcom,pm8550qcom,spmi-pmic fXpon@13002qcom,pmk8350-pon hlospbsfYpwrkey2qcom,pmk8350-pwrkey tfZresin2qcom,pmk8350-resin 3disabledf[rtc@61002qcom,pmk8350-rtcab rtcalarmb  #f\nvram@71002qcom,spmi-sdamq   qf]reboot-reason@48H 6f^gpio@8800!2qcom,pmk8550-gpioqcom,spmi-gpio;/fpwm2qcom,pmk8550-pwm ; 3disabledf_pmic@12qcom,pm8550qcom,spmi-pmic f`temp-alarm@a002qcom,spmi-temp-alarm  Wfgpio@8800 2qcom,pm8550-gpioqcom,spmi-gpio; /frtmr0-reset-n-active-stateGgpio10Lnormal Fn S afusb0-3p3-reg-en-stateGgpio11Lnormal Fn S afled-controller@ee00*2qcom,pm8550-flash-ledqcom,spmi-flash-led 3disabledfapwm!2qcom,pm8550-pwmqcom,pm8350c-pwm ; 3disabledfbpmic@22qcom,pm8550qcom,spmi-pmic fctemp-alarm@a002qcom,spmi-temp-alarm  Wfgpio@8800"2qcom,pm8550ve-gpioqcom,spmi-gpio;/fpmic@32qcom,pmc8380qcom,spmi-pmic fdtemp-alarm@a002qcom,spmi-temp-alarm  Wfgpio@8800!2qcom,pmc8380-gpioqcom,spmi-gpio; /fpmic@42qcom,pmc8380qcom,spmi-pmic fetemp-alarm@a002qcom,spmi-temp-alarm  Wfgpio@8800!2qcom,pmc8380-gpioqcom,spmi-gpio; /fpmic@52qcom,pmc8380qcom,spmi-pmic fftemp-alarm@a002qcom,spmi-temp-alarm  Wfgpio@8800!2qcom,pmc8380-gpioqcom,spmi-gpio; /fusb0-pwr-1p15-en-stateGgpio8Lnormal Fn S afpmic@62qcom,pmc8380qcom,spmi-pmic fgtemp-alarm@a002qcom,spmi-temp-alarm  Wfgpio@8800!2qcom,pmc8380-gpioqcom,spmi-gpio; /fpmic@82qcom,pm8550qcom,spmi-pmic fhtemp-alarm@a002qcom,spmi-temp-alarm  Wfgpio@8800"2qcom,pm8550ve-gpioqcom,spmi-gpio;/fpmic@92qcom,pm8550qcom,spmi-pmic  fitemp-alarm@a002qcom,spmi-temp-alarm  Wfgpio@8800"2qcom,pm8550ve-gpioqcom,spmi-gpio;/fusb0-1p8-reg-en-stateGgpio8Lnormal Fn S afpmic@c2qcom,pm8010qcom,spmi-pmic  fjtemp-alarm@24002qcom,spmi-temp-alarm$ $Wfspmi@c432000 C @ M cnfgintr 9periph_irq U fkpmic@72qcom,smb2360qcom,spmi-pmic 3okayflphy@fd002qcom,smb2360-eusb2-repeater o  |!fpmic@a2qcom,smb2360qcom,spmi-pmic  3okayfmphy@fd002qcom,smb2360-eusb2-repeater o  |"fpmic@b2qcom,smb2360qcom,spmi-pmic  3okayfnphy@fd002qcom,smb2360-eusb2-repeater o  |#fpmic@c2qcom,smb2360qcom,spmi-pmic   3disabledfophy@fd002qcom,smb2360-eusb2-repeaterfppinctrl@f1000002qcom,x1e80100-tlmm /;  ,fqup-i2c0-data-clk-state Ggpio0gpio1 Lqup0_se0U fyqup-i2c1-data-clk-state Ggpio4gpio5 Lqup0_se1U f|qup-i2c2-data-clk-state Ggpio8gpio9 Lqup0_se2U fqup-i2c3-data-clk-stateGgpio12gpio13 Lqup0_se3U fqup-i2c4-data-clk-stateGgpio16gpio17 Lqup0_se4U fqup-i2c5-data-clk-stateGgpio20gpio21 Lqup0_se5U fqup-i2c6-data-clk-stateGgpio24gpio25 Lqup0_se6U fqup-i2c7-data-clk-stateGgpio14gpio15 Lqup0_se7U fqup-i2c8-data-clk-stateGgpio32gpio33 Lqup1_se0U f_qup-i2c9-data-clk-stateGgpio36gpio37 Lqup1_se1U fbqup-i2c10-data-clk-stateGgpio40gpio41 Lqup1_se2U fequp-i2c11-data-clk-stateGgpio44gpio45 Lqup1_se3U fhqup-i2c12-data-clk-stateGgpio48gpio49 Lqup1_se4U fkqup-i2c13-data-clk-stateGgpio52gpio53 Lqup1_se5U fnqup-i2c14-data-clk-stateGgpio56gpio57 Lqup1_se6U fqqup-i2c15-data-clk-stateGgpio54gpio55 Lqup1_se7U fuqup-i2c16-data-clk-stateGgpio64gpio65 Lqup2_se0U fBqup-i2c17-data-clk-stateGgpio68gpio69 Lqup2_se1U fFqup-i2c18-data-clk-stateGgpio72gpio73 Lqup2_se2U fIqup-i2c19-data-clk-stateGgpio76gpio77 Lqup2_se3U fMqup-i2c20-data-clk-stateGgpio80gpio81 Lqup2_se4U fPqup-i2c21-data-clk-stateGgpio84gpio85 Lqup2_se5U fSqup-i2c22-data-clk-stateGgpio88gpio89 Lqup2_se6U fWqup-i2c23-data-clk-stateGgpio86gpio87 Lqup2_se7U fZqup-spi0-cs-stateGgpio3 Lqup0_se0Unf{qup-spi0-data-clk-stateGgpio0gpio1gpio2 Lqup0_se0Unfzqup-spi1-cs-stateGgpio7 Lqup0_se1Unfqup-spi1-data-clk-stateGgpio4gpio5gpio6 Lqup0_se1Unfqup-spi2-cs-stateGgpio11 Lqup0_se2Unfqup-spi2-data-clk-stateGgpio8gpio9gpio10 Lqup0_se2Unfqup-spi3-cs-stateGgpio15 Lqup0_se3Unfqup-spi3-data-clk-stateGgpio12gpio13gpio14 Lqup0_se3Unfqup-spi4-cs-stateGgpio19 Lqup0_se4Unfqup-spi4-data-clk-stateGgpio16gpio17gpio18 Lqup0_se4Unfqup-spi5-cs-stateGgpio23 Lqup0_se5Unfqup-spi5-data-clk-stateGgpio20gpio21gpio22 Lqup0_se5Unfqup-spi6-cs-stateGgpio27 Lqup0_se6Unfqup-spi6-data-clk-stateGgpio24gpio25gpio26 Lqup0_se6Unfqup-spi7-cs-stateGgpio13 Lqup0_se7Unfqup-spi7-data-clk-stateGgpio14gpio15gpio12 Lqup0_se7Unfqup-spi8-cs-stateGgpio35 Lqup1_se0Unfaqup-spi8-data-clk-stateGgpio32gpio33gpio34 Lqup1_se0Unf`qup-spi9-cs-stateGgpio39 Lqup1_se1Unfdqup-spi9-data-clk-stateGgpio36gpio37gpio38 Lqup1_se1Unfcqup-spi10-cs-stateGgpio43 Lqup1_se2Unfgqup-spi10-data-clk-stateGgpio40gpio41gpio42 Lqup1_se2Unffqup-spi11-cs-stateGgpio47 Lqup1_se3Unfjqup-spi11-data-clk-stateGgpio44gpio45gpio46 Lqup1_se3Unfiqup-spi12-cs-stateGgpio51 Lqup1_se4Unfmqup-spi12-data-clk-stateGgpio48gpio49gpio50 Lqup1_se4Unflqup-spi13-cs-stateGgpio55 Lqup1_se5Unfpqup-spi13-data-clk-stateGgpio52gpio53gpio54 Lqup1_se5Unfoqup-spi14-cs-stateGgpio59 Lqup1_se6Unfsqup-spi14-data-clk-stateGgpio56gpio57gpio58 Lqup1_se6Unfrqup-spi15-cs-stateGgpio53 Lqup1_se7Unfwqup-spi15-data-clk-stateGgpio54gpio55gpio52 Lqup1_se7Unfvqup-spi16-cs-stateGgpio67 Lqup2_se0UnfEqup-spi16-data-clk-stateGgpio64gpio65gpio66 Lqup2_se0UnfDqup-spi17-cs-stateGgpio71 Lqup2_se1UnfHqup-spi17-data-clk-stateGgpio68gpio69gpio70 Lqup2_se1UnfGqup-spi18-cs-stateGgpio75 Lqup2_se2UnfLqup-spi18-data-clk-stateGgpio72gpio73gpio74 Lqup2_se2UnfKqup-spi19-cs-stateGgpio79 Lqup2_se3UnfOqup-spi19-data-clk-stateGgpio76gpio77gpio78 Lqup2_se3UnfNqup-spi20-cs-stateGgpio83 Lqup2_se4UnfRqup-spi20-data-clk-stateGgpio80gpio81gpio82 Lqup2_se4UnfQqup-spi21-cs-stateGgpio87 Lqup2_se5UnfUqup-spi21-data-clk-stateGgpio84gpio85gpio86 Lqup2_se5UnfTqup-spi22-cs-stateGgpio91 Lqup2_se6UnfYqup-spi22-data-clk-stateGgpio88gpio89gpio90 Lqup2_se6UnfXqup-spi23-cs-stateGgpio85 Lqup2_se7Unf\qup-spi23-data-clk-stateGgpio86gpio87gpio84 Lqup2_se7Unf[qup-uart2-default-statefcts-pinsGgpio8 Lqup0_se2Unrts-pinsGgpio9 Lqup0_se2Untx-pinsGgpio10 Lqup0_se2Unrx-pinsGgpio11 Lqup0_se2Unqup-uart14-default-stateftcts-pinsGgpio56 Lqup1_se6{rts-pinsGgpio57 Lqup1_se6Untx-pinsGgpio58 Lqup1_se6Unrx-pinsGgpio59 Lqup1_se6 qup-uart21-default-statefVtx-pinsGgpio86 Lqup2_se5Unrx-pinsGgpio87 Lqup2_se5Unsdc2-default-statefclk-pins Gsdc2_clkUncmd-pins Gsdc2_cmdU  data-pins Gsdc2_dataU  sdc2-sleep-statefclk-pins Gsdc2_clkUncmd-pins Gsdc2_cmdU data-pins Gsdc2_dataU eusb3-reset-n-stateGgpio6LgpioUn feusb6-reset-n-stateGgpio184LgpioUn fnvme-reg-en-stateGgpio18LgpioUnfpcie4-default-statefclkreq-n-pinsGgpio147 Lpcie4_clkU perst-n-pinsGgpio146LgpioUnwake-n-pinsGgpio148LgpioU pcie5-default-statefclkreq-n-pinsGgpio150 Lpcie5_clkU perst-n-pinsGgpio149LgpioUnwake-n-pinsGgpio151LgpioU pcie6a-default-statefclkreq-n-pinsGgpio153 Lpcie6a_clkU perst-n-pinsGgpio152LgpioUnwake-n-pinsGgpio154LgpioU rtmr1-reset-n-active-stateGgpio176LgpioUnfrtmr2-reset-n-active-stateGgpio185LgpioUnfrtmr1-1p15-reg-en-stateGgpio188LgpioUnfrtmr1-1p8-reg-en-stateGgpio175LgpioUnfrtmr1-3p3-reg-en-stateGgpio186LgpioUnfrtmr2-1p15-reg-en-stateGgpio189LgpioUnfrtmr2-1p8-reg-en-stateGgpio126LgpioUnfrtmr2-3p3-reg-en-stateGgpio187LgpioUnfsdc2-card-det-stateGgpio71LgpioU fwcd-reset-n-active-stateGgpio191LgpioUn fwwan-sw-en-stateGgpio221LgpioUnfstm@10002000 2arm,coresight-stmarm,primecell  (stm-basestm-stimulus-basen :apb_pclkout-portsportendpointn$f+tpdm@10003000"2qcom,coresight-tpdmarm,primecell0n :apb_pclk   3disabledout-portsportendpointn%f&tpda@10004000"2qcom,coresight-tpdaarm,primecell@n :apb_pclkin-ports port@0endpointn&f%port@1endpointn'f)out-portsportendpointn(f*tpdm@1000f000"2qcom,coresight-tpdmarm,primecelln :apb_pclk  out-portsportendpointn)f'funnel@10041000+2arm,coresight-dynamic-funnelarm,primecelln :apb_pclkin-ports port@6endpointn*f(port@7endpointn+f$out-portsportendpointn,f1funnel@10042000+2arm,coresight-dynamic-funnelarm,primecell n :apb_pclkin-ports port@2endpointn-fwport@5endpointn.fAport@6endpointn/fiout-portsportendpointn0f2funnel@10045000+2arm,coresight-dynamic-funnelarm,primecellPn :apb_pclkin-ports port@0endpointn1f,port@1endpointn2f0out-portsportendpointn3fDtpdm@10800000"2qcom,coresight-tpdmarm,primecelln :apb_pclk @ out-portsportendpointn4fmtpdm@1082c000"2qcom,coresight-tpdmarm,primecelln :apb_pclk   out-portsportendpointn5fbtpdm@10841000"2qcom,coresight-tpdmarm,primecelln :apb_pclk  out-portsportendpointn6f`tpdm@10844000"2qcom,coresight-tpdmarm,primecell@n :apb_pclk   out-portsportendpointn7f8funnel@10846000+2arm,coresight-dynamic-funnelarm,primecell`n :apb_pclkin-portsportendpointn8f7out-portsportendpointn9f_cti@1098b000 2arm,coresight-ctiarm,primecelln :apb_pclktpdm@109d0000"2qcom,coresight-tpdmarm,primecelln :apb_pclk    3disabledout-portsportendpointn:fatpdm@10ac0000"2qcom,coresight-tpdmarm,primecelln :apb_pclk    3disabledout-portsportendpointn;f=tpdm@10ac1000"2qcom,coresight-tpdmarm,primecelln :apb_pclk @ out-portsportendpointn<f>tpda@10ac4000"2qcom,coresight-tpdaarm,primecell@n :apb_pclkin-ports port@8endpointn=f;port@9 endpointn>f<out-portsportendpointn?f@funnel@10ac5000+2arm,coresight-dynamic-funnelarm,primecellPn :apb_pclkin-portsportendpointn@f?out-portsportendpointnAf.funnel@10b04000+2arm,coresight-dynamic-funnelarm,primecell@n :apb_pclkin-ports port@3endpointnBfYport@6endpointnCfOport@7endpointnDf3out-portsportendpointnEfFtmc@10b05000 2arm,coresight-tmcarm,primecellPn :apb_pclkfqin-portsportendpointnFfEout-portsportendpointnGfHreplicator@10b06000/2arm,coresight-dynamic-replicatorarm,primecell`n :apb_pclkin-portsportendpointnHfGout-portsportendpointnIf tpda@10b08000"2qcom,coresight-tpdaarm,primecelln :apb_pclkin-ports port@0endpointnJfPport@1endpointnKfQport@2endpointnLfRport@3endpointnMfSport@4endpointnNfTout-portsportendpointnOfCtpdm@10b09000"2qcom,coresight-tpdmarm,primecelln :apb_pclk @ out-portsportendpointnPfJtpdm@10b0a000"2qcom,coresight-tpdmarm,primecelln :apb_pclk @ out-portsportendpointnQfKtpdm@10b0b000"2qcom,coresight-tpdmarm,primecelln :apb_pclk @ out-portsportendpointnRfLtpdm@10b0c000"2qcom,coresight-tpdmarm,primecelln :apb_pclk @ out-portsportendpointnSfMtpdm@10b0d000"2qcom,coresight-tpdmarm,primecelln :apb_pclk   out-portsportendpointnTfNtpdm@10b20000"2qcom,coresight-tpdmarm,primecelln :apb_pclk    3disabledout-portsportendpointnUfVtpda@10b23000"2qcom,coresight-tpdaarm,primecell0n :apb_pclk 3disabledin-portsportendpointnVfUout-portsportendpointnWfXfunnel@10b24000+2arm,coresight-dynamic-funnelarm,primecell@n :apb_pclk 3disabledin-portsportendpointnXfWout-portsportendpointnYfBtpdm@10c08000"2qcom,coresight-tpdmarm,primecelln :apb_pclk   out-portsportendpointnZf[funnel@10c0b000+2arm,coresight-dynamic-funnelarm,primecelln :apb_pclkin-ports port@4endpointn[fZout-portsportendpointn\fltpdm@10c28000"2qcom,coresight-tpdmarm,primecell€n :apb_pclk   out-portsportendpointn]fctpdm@10c29000"2qcom,coresight-tpdmarm,primecelln :apb_pclk @ out-portsportendpointn^fdtpda@10c2b000"2qcom,coresight-tpdaarm,primecell°n :apb_pclkin-ports port@4endpointn_f9port@13endpointn`f6port@14endpointnaf:port@15endpointnbf5port@1aendpointncf]port@1bendpointndf^out-portsportendpointnefffunnel@10c2c000+2arm,coresight-dynamic-funnelarm,primecelln :apb_pclkin-ports port@0endpointnffeport@4endpointngfrport@5endpointnhfyout-portsportendpointnif/tpdm@10c38000"2qcom,coresight-tpdmarm,primecellÀn :apb_pclk @ out-portsportendpointnjfntpdm@10c39000"2qcom,coresight-tpdmarm,primecellÐn :apb_pclk @ out-portsportendpointnkfotpda@10c3c000"2qcom,coresight-tpdaarm,primecelln :apb_pclkin-ports port@4endpointnlf\port@fendpointnmf4port@10endpointnnfjport@11endpointnofkout-portsportendpointnpfqfunnel@10c3d000+2arm,coresight-dynamic-funnelarm,primecelln :apb_pclkin-portsportendpointnqfpout-portsportendpointnrfgtpdm@10cc1000"2qcom,coresight-tpdmarm,primecelln :apb_pclk @     3disabledout-portsportendpointnsfttpda@10cc4000"2qcom,coresight-tpdaarm,primecell@n :apb_pclkin-ports port@2endpointntfsout-portsportendpointnufvfunnel@10cc5000+2arm,coresight-dynamic-funnelarm,primecellPn :apb_pclkin-portsportendpointnvfuout-portsportendpointnwf-funnel@10d04000+2arm,coresight-dynamic-funnelarm,primecell@n :apb_pclkin-ports port@6endpointnxfout-portsportendpointnyfhtpdm@10d08000"2qcom,coresight-tpdmarm,primecellЀn :apb_pclk  out-portsportendpointnzftpdm@10d09000"2qcom,coresight-tpdmarm,primecellАn :apb_pclk  out-portsportendpointn{ftpdm@10d0a000"2qcom,coresight-tpdmarm,primecellРn :apb_pclk  out-portsportendpointn|ftpdm@10d0b000"2qcom,coresight-tpdmarm,primecellаn :apb_pclk  out-portsportendpointn}ftpdm@10d0c000"2qcom,coresight-tpdmarm,primecelln :apb_pclk  out-portsportendpointn~ftpdm@10d0d000"2qcom,coresight-tpdmarm,primecelln :apb_pclk  out-portsportendpointnftpdm@10d0e000"2qcom,coresight-tpdmarm,primecelln :apb_pclk  out-portsportendpointnftpdm@10d0f000"2qcom,coresight-tpdmarm,primecelln :apb_pclk  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}fldo1 >vreg_l1c_1p2 MO eO }fldo2 >vreg_l2c_0p8 M m e  }fldo3 >vreg_l3c_0p8 M m e  }fregulators-22qcom,pmc8380-rpmh-regulators d    ldo1 >vreg_l1d_0p8 M m e  }fldo2 >vreg_l2d_0p9 M  e  }fldo3 >vreg_l3d_1p8 Mw@ ew@ }f regulators-32qcom,pmc8380-rpmh-regulators e  ldo2 >vreg_l2e_0p8 M m e  }fldo3 >vreg_l3e_1p2 MO eO }fregulators-42qcom,pmc8380-rpmh-regulators f    smps1 >vreg_s1f_0p7 M ` e }fldo1 >vreg_l1f_1p0 M e }fldo2 >vreg_l2f_1p0 M e }fldo3 >vreg_l3f_1p0 M e }fregulators-62qcom,pm8550ve-rpmh-regulators i     smps1 >vreg_s1i_0p9 M  e  }fsmps2 >vreg_s2i_1p0 MB@ e }fldo1 >vreg_l1i_1p8 Mw@ ew@ }fldo2 >vreg_l2i_1p2 MO eO }fldo3 >vreg_l3i_0p8 M m e  }fregulators-72qcom,pm8550ve-rpmh-regulators j    smps5 >vreg_s5j_1p2 M*@ e }fldo1 >vreg_l1j_0p8 M m e  }fldo2 >vreg_l2j_1p2 M*@ e*@ }fldo3 >vreg_l3j_0p8 M m e  }ftimer@178000002arm,armv7-timer-mem  frame@17801000  frame@17803000 0    3disabledframe@17805000 P    3disabledframe@17807000 p    3disabledframe@17809000     3disabledframe@1780b000   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/reserved-memory/cpucp@80e40000&/reserved-memory/tags-region@81400000$/reserved-memory/xbl-dtlog@81a00000&/reserved-memory/xbl-ramdump@81a40000$/reserved-memory/aop-image@81c00000%/reserved-memory/aop-cmd-db@81c60000%/reserved-memory/aop-config@81c80000)/reserved-memory/tme-crash-dump@81ca0000"*/reserved-memory/tme-log@81ce0000#6/reserved-memory/uefi-log@81ce4000'C/reserved-memory/secdata-apss@81cff000(T/reserved-memory/pdp-ns-shared@81e00000"f/reserved-memory/gpu-prr@81f00000&r/reserved-memory/tpm-control@81f10000*/reserved-memory/usb-ucsi-shared@81f20000"/reserved-memory/pld-pep@81f30000"/reserved-memory/pld-gmu@81f36000"/reserved-memory/pld-pdp@81f37000"/reserved-memory/tz-stat@82700000)/reserved-memory/xbl-tmp-buffer@82800000//reserved-memory/adsp-rpc-remote-heap@84b000003/reserved-memory/spu-secure-shared-memory@85300000(/reserved-memory/adsp-boot-dtb@866c0000&!/reserved-memory/spss-region@86700000$1/reserved-memory/adsp-boot@86b00000 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//audio-codec.//pmic-glink/connector@0/ports/port@0/endpoint.//pmic-glink/connector@0/ports/port@1/endpoint.0/pmic-glink/connector@0/ports/port@2/endpoint.0*/pmic-glink/connector@1/ports/port@0/endpoint.0?/pmic-glink/connector@1/ports/port@1/endpoint.0T/pmic-glink/connector@1/ports/port@2/endpoint.0n/pmic-glink/connector@2/ports/port@0/endpoint.0/pmic-glink/connector@2/ports/port@1/endpoint.0/pmic-glink/connector@2/ports/port@2/endpoint0/regulator-nvme0/regulator-rtmr0-1p150/regulator-rtmr0-1p80/regulator-rtmr0-3p30/regulator-rtmr1-1p150/regulator-rtmr1-1p81 /regulator-rtmr1-3p31/regulator-rtmr2-1p151(/regulator-rtmr2-1p817/regulator-rtmr2-3p31F/regulator-vph-pwr1N/regulator-wwan interrupt-parent#address-cells#size-cellsmodelcompatiblestdout-pathclock-frequency#clock-cellsphandleclocksclock-multclock-divdevice_typeregenable-methodnext-level-cachepower-domainspower-domain-namescpu-idle-statescache-levelcache-unifiedcpuentry-methodidle-state-namearm,psci-suspend-paramentry-latency-usexit-latency-usmin-residency-usremote-endpointinterconnectsqcom,dload-modemboxesmbox-namesshmem#power-domain-cells#interconnect-cellsqcom,bcm-votersinterruptsdomain-idle-statesrangesno-maphwlockssizereusablelinux,cma-defaultopp-hzrequired-oppsinterrupts-extendedqcom,smemqcom,local-pidqcom,remote-pidqcom,entry-name#qcom,smem-state-cellsinterrupt-controller#interrupt-cellsdma-ranges#reset-cells#mbox-cellsdma-channelsdma-channel-mask#dma-cellsiommusstatusclock-namesinterconnect-namesdmasdma-namespinctrl-0pinctrl-namesoperating-points-v2vdd-supplyvdd33-supplyvdd33-cap-supplyvddar-supplyvddat-supplyvddio-supplyreset-gpiosorientation-switchretimer-switch#phy-cellsvdd3v3-supplyvdd1v8-supplyinterrupt-names#qcom,sensors#thermal-sensor-cellsresetsvdda12-supplyphysreset-namesvdda-phy-supplyvdda-pll-supplyreg-namesbus-rangedma-coherentlinux,pci-domainnum-lanesinterrupt-map-maskinterrupt-mapassigned-clocksassigned-clock-ratesphy-nameseq-presets-8gtseq-presets-16gtsopp-peak-kBpsclock-output-namesmsi-mapperst-gpioswake-gpiosvddpe-3v3-supplyqcom,4ln-config-sel#hwlock-cellsqcom,gmu#cooling-cellsmemory-regionfirmware-nameopp-levelqcom,opp-acd-levelqcom,qmp#iommu-cells#global-interruptsqcom,smem-statesqcom,smem-state-nameslabelqcom,glink-channelsqcom,non-secure-domainqcom,domainqcom,intents#sound-dai-cellsqcom,protection-domainsound-name-prefixqcom,din-portsqcom,dout-portsqcom,ports-sintervalqcom,ports-offset1qcom,ports-offset2qcom,ports-hstartqcom,ports-hstopqcom,ports-word-lengthqcom,ports-block-pack-modeqcom,ports-block-group-countqcom,ports-lane-controlqcom,rx-port-mappingqcom,ports-sinterval-lowqcom,tx-port-mappinggpio-controller#gpio-cellsgpio-rangespinsfunctiondrive-strengthslew-ratebias-disablebias-bus-holdoutput-highinput-enableqcom,dll-configqcom,ddr-configbus-widthcd-gpiospinctrl-1vmmc-supplyvqmmc-supplyno-sdiono-mmcwakeup-sourcesnps,dis_u2_susphy_quirksnps,dis_enblslpm_quirksnps,usb3_lpm_capablesnps,dis-u1-entry-quirksnps,dis-u2-entry-quirkdr_modemaximum-speedusb-role-switchassigned-clock-parentsdata-laneslink-frequenciesqcom,pdc-rangesqcom,eeqcom,channellinux,codeqcom,no-alarmqcom,uefi-rtc-infobits#pwm-cellspower-sourceinput-disableoutput-enablevdd18-supplyvdd3-supplywakeup-parentgpio-reserved-rangesbias-pull-upoutput-lowqcom,cmb-element-bitsqcom,cmb-msrs-numqcom,dsb-element-bitsqcom,dsb-msrs-num#redistributor-regionsredistributor-stridemsi-controller#msi-cellsqcom,tcs-offsetqcom,drv-idqcom,tcs-configqcom,pmic-idvdd-bob1-supplyvdd-bob2-supplyvdd-l1-l4-l10-supplyvdd-l2-l13-l14-supplyvdd-l5-l16-supplyvdd-l6-l7-supplyvdd-l8-l9-supplyvdd-l12-supplyvdd-l15-supplyvdd-l17-supplyregulator-nameregulator-min-microvoltregulator-max-microvoltregulator-initial-moderegulator-always-onvdd-l1-supplyvdd-l2-supplyvdd-l3-supplyvdd-s4-supplyvdd-s1-supplyvdd-s2-supplyvdd-s5-supplyframe-numberthermal-sensorstemperaturehysteresispolling-delay-passivetripcooling-deviceserial0qcom,micbias1-microvoltqcom,micbias2-microvoltqcom,micbias3-microvoltqcom,micbias4-microvoltqcom,mbhc-buttons-vthreshold-microvoltqcom,mbhc-headset-vthreshold-microvoltqcom,mbhc-headphone-vthreshold-microvoltqcom,rx-deviceqcom,tx-devicevdd-buck-supplyvdd-rxtx-supplyvdd-io-supplyvdd-mic-bias-supplyorientation-gpiospower-roledata-roleaudio-routinglink-namesound-daigpioenable-active-highregulator-boot-onxo_boardsleep_clkbi_tcxo_div2bi_tcxo_ao_div2cpu0l2_0cpu1cpu2cpu3cpu4l2_1cpu5cpu6cpu7cpu8l2_2cpu9cpu10cpu11cpu_map_cluster2cluster_c4cluster_cl4cluster_cl5eud_inscmscmi_dvfsclk_virtmc_virtcpu_pd0cpu_pd1cpu_pd2cpu_pd3cpu_pd4cpu_pd5cpu_pd6cpu_pd7cpu_pd8cpu_pd9cpu_pd10cpu_pd11cluster_pd0cluster_pd1cluster_pd2system_pdgunyah_hyp_memhyp_elf_package_memncc_memcpucp_log_memcpucp_memtags_memxbl_dtlog_memxbl_ramdump_memaop_image_memaop_cmd_db_memaop_config_memtme_crash_dump_memtme_log_memuefi_log_memsecdata_apss_mempdp_ns_shared_memgpu_prr_memtpm_control_memusb_ucsi_shared_mempld_pep_mempld_gmu_mempld_pdp_memtz_stat_memxbl_tmp_buffer_memadsp_rpc_remote_heap_memspu_secure_shared_memory_memadsp_boot_dtb_memspss_region_memadsp_boot_memvideo_memadspslpi_memq6_adsp_dtb_memcdsp_memq6_cdsp_dtb_memgpu_microcode_memcvp_memcamera_memav1_encoder_memwpss_memq6_wpss_dtb_memxbl_sc_memqtee_memta_memtags_mem1llcc_lpi_memsmem_memqup_opp_table_100mhzqup_opp_table_120mhzsmp2p_adsp_outsmp2p_adsp_insmp2p_cdsp_outsmp2p_cdsp_insocgccipccgpi_dma2qupv3_2i2c16spi16i2c17spi17i2c18spi18i2c19spi19i2c20spi20i2c21spi21uart21i2c22spi22i2c23spi23gpi_dma1qupv3_1i2c8spi8i2c9spi9i2c10spi10i2c11spi11i2c12spi12i2c13spi13i2c14spi14uart14i2c15spi15gpi_dma0qupv3_0i2c0spi0i2c1retimer_ss2_ss_outretimer_ss2_ss_inretimer_ss2_con_sbu_outspi1i2c2uart2spi2i2c3retimer_ss0_ss_outretimer_ss0_ss_inretimer_ss0_con_sbu_outspi3i2c4s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