q8x( @ #,powkiddy,rgb10max3rockchip,rk35667handsetDPowkiddy RGB10MAX3aliasesJ/pinctrl/gpio@fdd60000P/pinctrl/gpio@fe740000V/pinctrl/gpio@fe750000\/pinctrl/gpio@fe760000b/pinctrl/gpio@fe770000h/i2c@fdd40000m/i2c@fe5a0000r/i2c@fe5b0000w/i2c@fe5c0000|/i2c@fe5d0000/i2c@fe5e0000/serial@fdd50000/serial@fe650000/serial@fe660000/serial@fe670000/serial@fe680000/serial@fe690000/serial@fe6a0000/serial@fe6b0000/serial@fe6c0000/serial@fe6d0000/spi@fe610000/spi@fe620000/spi@fe630000/spi@fe640000/mmc@fe2b0000/mmc@fe2c0000/mmc@fe000000cpus cpu@0cpu,arm,cortex-a55 psci-:@LYf@x cpu@100cpu,arm,cortex-a55psci-:@LYf@x cpu@200cpu,arm,cortex-a55psci-:@LYf@x cpu@300cpu,arm,cortex-a55psci-:@LYf@x l3-cache,cache/<@Ndisplay-subsystem,rockchip,display-subsystemfirmwarescmi ,arm,scmi-smc݂ protocol@14hdmi-sound,simple-audio-cardHDMIi2s+Eokaysimple-audio-card,codecLsimple-audio-card,cpuL pmu,arm,cortex-a55-pmu0Va psci ,arm,psci-1.0&smcreserved-memory tshmem@10f000,arm,scmi-shmem{timer,arm,armv8-timer0V   xin24m ,fixed-clockn6xin24mxin32k ,fixed-clockxin32kdefaultsata@fc400000',rockchip,rk3568-dwc-ahcisnps,dwc-ahci@ satapmaliverxoob V_ sata-phy Edisabledsata@fc800000',rockchip,rk3568-dwc-ahcisnps,dwc-ahci satapmaliverxoob V` sata-phy Edisabledusb@fcc00000,rockchip,rk3568-dwc3snps,dwc3@ V ref_clksuspend_clkbus_clk peripheral utmi_wide 'Eokay usb2-phy@ Ghigh-speedusb@fd000000,rockchip,rk3568-dwc3snps,dwc3@ V ref_clksuspend_clkbus_clkhost usb2-phyusb3-phy utmi_wide 'Eokayinterrupt-controller@fd400000 ,arm,gic-v3 @F V Uj{A(t msi-controller@fd440000,arm,gic-v3-itsDcusb@fd800000 ,generic-ehci V usb Edisabledusb@fd840000 ,generic-ohci V usb Edisabledusb@fd880000 ,generic-ehci V usbEokayusb@fd8c0000 ,generic-ohci V usbEokaysyscon@fdc20000),rockchip,rk3568-pmugrfsysconsimple-mfdaio-domains&,rockchip,rk3568-pmu-io-voltage-domainEokaysyscon@fdc50000 ,rockchip,rk3566-pipe-grfsysconsyscon@fdc60000&,rockchip,rk3568-grfsysconsimple-mfdsyscon@fdc80000$,rockchip,rk3568-pipe-phy-grfsysconsyscon@fdc90000$,rockchip,rk3568-pipe-phy-grfsysconsyscon@fdca0000#,rockchip,rk3568-usb2phy-grfsysconsyscon@fdca8000#,rockchip,rk3568-usb2phy-grfsysconʀclock-controller@fdd00000,rockchip,rk3568-pmucru*clock-controller@fdd20000,rockchip,rk3568-cru xin24m* 7GG \si2c@fdd40000(,rockchip,rk3568-i2crockchip,rk3399-i2c V. - i2cpclk default Eokaypmic@20,rockchip,rk817 !Vrk808-clkout1rk808-clkout2mclk H7H\default"#$$$$$$$$%regulatorsDCDC_REG1 1 Ipaqv vdd_logicregulator-state-mem DCDC_REG2 1 Ipaqvvdd_gpuEregulator-state-memDCDC_REG3 vvcc_ddrregulator-state-memDCDC_REG4 12ZI2Zvvcc_3v3regulator-state-mem2ZLDO_REG1 1w@Iw@ vcca1v8_pmuMregulator-state-memw@LDO_REG2 1 I  vdda_0v9regulator-state-memLDO_REG3 1 I  vdda0v9_pmuregulator-state-mem LDO_REG4 12ZI2Z vccio_acodecregulator-state-memLDO_REG5 1w@I2Z vccio_sdregulator-state-memLDO_REG6 12ZI2Z vcc3v3_pmuregulator-state-mem2ZLDO_REG7 1w@Iw@vcc_1v8regulator-state-memLDO_REG8 1w@I2Z vcc1v8_dvpregulator-state-memLDO_REG9 1*I* vcc2v8_dvpregulator-state-memBOOST 1G`IReboost%regulator-state-memOTG_SWITCH otg_switchregulator-state-memcharger&'Dregulator@40 ,fcs,fan53555@k 1 4I5vdd_cpua$regulator-state-memserial@fdd50000&,rockchip,rk3568-uartsnps,dw-apb-uart Vt  ,baudclkapb_pclk''(default Edisabledpwm@fdd70000(,rockchip,rk3568-pwmrockchip,rk3328-pwm  0 pwmpclk)defaultEokaypwm@fdd70010(,rockchip,rk3568-pwmrockchip,rk3328-pwm  0 pwmpclk*default Edisabledpwm@fdd70020(,rockchip,rk3568-pwmrockchip,rk3328-pwm   0 pwmpclk+default Edisabledpwm@fdd70030(,rockchip,rk3568-pwmrockchip,rk3328-pwm0  0 pwmpclk,default Edisabledpower-management@fdd90000&,rockchip,rk3568-pmusysconsimple-mfdpower-controller!,rockchip,rk3568-power-controller power-domain@7 -power-domain@8  ./0power-domain@9   123power-domain@10  456789power-domain@11  :power-domain@13  ;power-domain@14  <=>power-domain@15 ?@ABCgpu@fde60000&,rockchip,rk3568-maliarm,mali-bifrost@$V()' jobmmugpu gpubusEokayDEvideo-codec@fdea0400,rockchip,rk3568-vpu Vvdpu  aclkhclkF iommu@fdea0800,rockchip,rk3568-iommu@ V aclkiface  Frga@fdeb0000(,rockchip,rk3568-rgarockchip,rk3288-rga VZ aclkhclksclk &$% coreaxiahb video-codec@fdee0000,rockchip,rk3568-vepu V@  aclkhclkG iommu@fdee0800,rockchip,rk3568-iommu@ V?  aclkiface Gmmc@fe0000000,rockchip,rk3568-dw-mshcrockchip,rk3288-dw-mshc@ Vd  biuciuciu-driveciu-sampleр resetEokay*4ERhHs IJKdefaultLMethernet@fe010000&,rockchip,rk3568-gmacsnps,dwmac-4.20aV macirqeth_wake_irq@ Wstmmacethmac_clk_rxmac_clk_txclk_mac_refoutaclk_macpclk_macclk_mac_speedptp_ref  stmmacethsNOP Edisabledmdio,snps,dwmac-mdio stmmac-axi-configNrx-queues-configOqueue0tx-queues-config*Pqueue0vop@fe040000 0@@vopgamma-lut V( %aclkhclkdclk_vp0dclk_vp1dclk_vp2Q sEokay,rockchip,rk3566-vop7\ports port@0 endpoint@2JR_port@1 endpoint@4JSUport@2 iommu@fe043e00,rockchip,rk3568-iommu >? V  aclkiface EokayQdsi@fe060000*,rockchip,rk3568-mipi-dsisnps,dw-mipi-dsi VDpclk dphyT apb sEokay ports port@0endpointJUSport@1endpointJV[panel@0,powkiddy,rgb10max3-panelZWdXYdefault qZ}fXportendpointJ[Vdsi@fe070000*,rockchip,rk3568-mipi-dsisnps,dw-mipi-dsi VEpclk dphy\ apb s Edisabledports port@0port@1hdmi@fe0a0000,rockchip,rk3568-dw-hdmi  V-( (iahbisfrcecrefdefault] sEokay^ports port@0endpointJ_Rport@1endpointJ`qos@fe128000,rockchip,rk3568-qossyscon -qos@fe138080,rockchip,rk3568-qossyscon <qos@fe138100,rockchip,rk3568-qossyscon =qos@fe138180,rockchip,rk3568-qossyscon >qos@fe148000,rockchip,rk3568-qossyscon .qos@fe148080,rockchip,rk3568-qossyscon /qos@fe148100,rockchip,rk3568-qossyscon 0qos@fe150000,rockchip,rk3568-qossyscon :qos@fe158000,rockchip,rk3568-qossyscon 4qos@fe158100,rockchip,rk3568-qossyscon 5qos@fe158180,rockchip,rk3568-qossyscon 6qos@fe158200,rockchip,rk3568-qossyscon 7qos@fe158280,rockchip,rk3568-qossyscon 8qos@fe158300,rockchip,rk3568-qossyscon 9qos@fe180000,rockchip,rk3568-qossyscon qos@fe190000,rockchip,rk3568-qossyscon ?qos@fe190280,rockchip,rk3568-qossyscon @qos@fe190300,rockchip,rk3568-qossyscon Aqos@fe190380,rockchip,rk3568-qossyscon Bqos@fe190400,rockchip,rk3568-qossyscon Cqos@fe198000,rockchip,rk3568-qossyscon ;qos@fe1a8000,rockchip,rk3568-qossyscon 1qos@fe1a8080,rockchip,rk3568-qossyscon 2qos@fe1a8100,rockchip,rk3568-qossyscon 3dfi@fe230000,rockchip,rk3568-dfi# V apcie@fe260000,rockchip,rk3568-pcie0@&@dbiapbconfig<VKJIHGsyspmcmsglegacyerr( $aclk_mstaclk_slvaclk_dbipclkauxpcij`bbbb c  pcie-phyTt @@ pipe  Edisabledlegacy-interrupt-controllerjU VHbmmc@fe2b00000,rockchip,rk3568-dw-mshcrockchip,rk3288-dw-mshc+@ Vb  biuciuciu-driveciu-sampleр resetEokay*4 ! #defgdefault .mmc@fe2c00000,rockchip,rk3568-dw-mshcrockchip,rk3288-dw-mshc,@ Vc  biuciuciu-driveciu-sampleр resetEokay*4 h  #ijkldefault .spi@fe300000 ,rockchip,sfc0@ Ve xvclk_sfchclk_sfcmdefault Edisabledmmc@fe310000,rockchip,rk3568-dwcmshc1 V7{}G n6( |zy{}corebusaxiblocktimer Edisabledrng@fe388000,rockchip,rk3568-rng8@ po coreahb m Edisabledi2s@fe400000,rockchip,rk3568-i2s-tdm@ V47=AGFqFq ?C9mclk_txmclk_rxhclkn p`_=Z<U<P;nK:F:A9gP<87827-7_(7!H#666+055 4u3@&gpio-keys-control ,gpio-keysdefaultbutton-a w button-up w