8( Ӵ ",pine64,quartz64-arockchip,rk35667Pine64 Quartz64 Model Aaliases=/pinctrl/gpio@fdd60000C/pinctrl/gpio@fe740000I/pinctrl/gpio@fe750000O/pinctrl/gpio@fe760000U/pinctrl/gpio@fe770000[/i2c@fdd40000`/i2c@fe5a0000e/i2c@fe5b0000j/i2c@fe5c0000o/i2c@fe5d0000t/i2c@fe5e0000y/serial@fdd50000/serial@fe650000/serial@fe660000/serial@fe670000/serial@fe680000/serial@fe690000/serial@fe6a0000/serial@fe6b0000/serial@fe6c0000/serial@fe6d0000/spi@fe610000/spi@fe620000/spi@fe630000/spi@fe640000/ethernet@fe010000/mmc@fe2b0000/mmc@fe310000cpus cpu@0cpu,arm,cortex-a55psci%2@DQ^@p} cpu@100cpu,arm,cortex-a55psci%2@DQ^@p} cpu@200cpu,arm,cortex-a55psci%2@DQ^@p} cpu@300cpu,arm,cortex-a55psci%2@DQ^@p} l3-cache,cache'4@Fdisplay-subsystem,rockchip,display-subsystemfirmwarescmi ,arm,scmi-smcՂ protocol@14hdmi-sound,simple-audio-cardHDMI i2s#=okaysimple-audio-card,codecDsimple-audio-card,cpuD pmu,arm,cortex-a55-pmu0NY psci ,arm,psci-1.0smcreserved-memory lshmem@10f000,arm,scmi-shmemstimer,arm,armv8-timer0N   zxin24m ,fixed-clockn6xin24mxin32k ,fixed-clockxin32kdefaultsata@fc400000',rockchip,rk3568-dwc-ahcisnps,dwc-ahci@satapmaliverxoob N_ sata-phy =disabledsata@fc800000',rockchip,rk3568-dwc-ahcisnps,dwc-ahcisatapmaliverxoob N` sata-phy =disabledusb@fcc00000,rockchip,rk3568-dwc3snps,dwc3@ Nref_clksuspend_clkbus_clkhost utmi_wide=okay usb2-phy8 ?high-speedusb@fd000000,rockchip,rk3568-dwc3snps,dwc3@ Nref_clksuspend_clkbus_clkhost usb2-phyusb3-phy utmi_wide=okayinterrupt-controller@fd400000 ,arm,gic-v3 @F N MbsA}(l msi-controller@fd440000,arm,gic-v3-itsD_usb@fd800000 ,generic-ehci Nusb=okayusb@fd840000 ,generic-ohci Nusb=okayusb@fd880000 ,generic-ehci Nusb=okayusb@fd8c0000 ,generic-ohci Nusb=okaysyscon@fdc20000),rockchip,rk3568-pmugrfsysconsimple-mfd]io-domains&,rockchip,rk3568-pmu-io-voltage-domain=okay"syscon@fdc50000 ,rockchip,rk3566-pipe-grfsysconsyscon@fdc60000&,rockchip,rk3568-grfsysconsimple-mfd syscon@fdc80000$,rockchip,rk3568-pipe-phy-grfsysconsyscon@fdc90000$,rockchip,rk3568-pipe-phy-grfsysconsyscon@fdca0000#,rockchip,rk3568-usb2phy-grfsysconsyscon@fdca8000#,rockchip,rk3568-usb2phy-grfsysconʀclock-controller@fdd00000,rockchip,rk3568-pmucru0clock-controller@fdd20000,rockchip,rk3568-cruxin24m0= MG by i2c@fdd40000(,rockchip,rk3568-i2crockchip,rk3399-i2c N.- i2cpclk!default =okayregulator@1c ,tcs,tcs4525vdd_cpu 50 "regulator-state-mem(pmic@20,rockchip,rk817 #N=HbmclkHrk808-clkout1rk808-clkout2default$%AYjx""""""""&regulatorsDCDC_REG1  pq vdd_logicregulator-state-mem DCDC_REG2  pqvdd_gpuEregulator-state-mem(DCDC_REG3 vcc_ddrregulator-state-memDCDC_REG4 2Z2Zvcc_3v3regulator-state-mem(LDO_REG1 w@w@ vcca1v8_pmuregulator-state-memw@LDO_REG2    vdda_0v9Zregulator-state-mem(LDO_REG3    vdda0v9_pmuregulator-state-mem LDO_REG4 2Z2Z vccio_acodecregulator-state-mem(LDO_REG5 w@2Z vccio_sdregulator-state-mem(LDO_REG6 2Z2Z vcc3v3_pmuregulator-state-mem2ZLDO_REG7 w@w@vcc_1v8regulator-state-mem(LDO_REG8 w@w@ vcc1v8_dvpregulator-state-mem(LDO_REG9 ** vcc2v8_dvpregulator-state-mem(BOOST LK@LK@boost&regulator-state-mem(OTG_SWITCH otg_switchregulator-state-mem(serial@fdd50000&,rockchip,rk3568-uartsnps,dw-apb-uart Nt ,baudclkapb_pclk/''(default4A=okaypwm@fdd70000(,rockchip,rk3568-pwmrockchip,rk3328-pwm 0 pwmpclk)defaultK =disabledpwm@fdd70010(,rockchip,rk3568-pwmrockchip,rk3328-pwm 0 pwmpclk*defaultK =disabledpwm@fdd70020(,rockchip,rk3568-pwmrockchip,rk3328-pwm  0 pwmpclk+defaultK =disabledpwm@fdd70030(,rockchip,rk3568-pwmrockchip,rk3328-pwm0 0 pwmpclk,defaultK =disabledpower-management@fdd90000&,rockchip,rk3568-pmusysconsimple-mfdpower-controller!,rockchip,rk3568-power-controllerV power-domain@7j-Vpower-domain@8 j./0Vpower-domain@9  j123Vpower-domain@10 j456789Vpower-domain@11 j:Vpower-domain@13 j;Vpower-domain@14 j<=>Vpower-domain@15j?@ABCVgpu@fde60000&,rockchip,rk3568-maliarm,mali-bifrost@$N()' qjobmmugpugpubus=okayDEvideo-codec@fdea0400,rockchip,rk3568-vpu Nqvdpu aclkhclkF iommu@fdea0800,rockchip,rk3568-iommu@ N aclkiface Frga@fdeb0000(,rockchip,rk3568-rgarockchip,rk3288-rga NZaclkhclksclk&$% coreaxiahb video-codec@fdee0000,rockchip,rk3568-vepu N@ aclkhclkG iommu@fdee0800,rockchip,rk3568-iommu@ N? aclkiface Gmmc@fe0000000,rockchip,rk3568-dw-mshcrockchip,rk3288-dw-mshc@ Nd biuciuciu-driveciu-sampleрreset =disabledethernet@fe010000&,rockchip,rk3568-gmacsnps,dwmac-4.20aN qmacirqeth_wake_irq@Wstmmacethmac_clk_rxmac_clk_txclk_mac_refoutaclk_macpclk_macclk_mac_speedptp_ref stmmacethy HIJ =okay=bKinput#.rgmiidefaultLMNOPQ 7#G ]N r0{Rmdio,snps,dwmac-mdio ethernet-phy@0,ethernet-phy-ieee802.3-c22Rstmmac-axi-configHrx-queues-configIqueue0tx-queues-configJqueue0vop@fe040000 0@vopgamma-lut N(%aclkhclkdclk_vp0dclk_vp1dclk_vp2S y =okay,rockchip,rk3566-vop=bports port@0 endpoint@2T[port@1 port@2 iommu@fe043e00,rockchip,rk3568-iommu >? N aclkiface =okaySdsi@fe060000*,rockchip,rk3568-mipi-dsisnps,dw-mipi-dsi NDpclkdphyU apby  =disabledports port@0port@1dsi@fe070000*,rockchip,rk3568-mipi-dsisnps,dw-mipi-dsi NEpclkdphyV apby  =disabledports port@0port@1hdmi@fe0a0000,rockchip,rk3568-dw-hdmi  N-((iahbisfrcecrefdefault WXY 4y Y=okayZports port@0endpoint[Tport@1endpoint\qos@fe128000,rockchip,rk3568-qossyscon -qos@fe138080,rockchip,rk3568-qossyscon <qos@fe138100,rockchip,rk3568-qossyscon =qos@fe138180,rockchip,rk3568-qossyscon >qos@fe148000,rockchip,rk3568-qossyscon .qos@fe148080,rockchip,rk3568-qossyscon /qos@fe148100,rockchip,rk3568-qossyscon 0qos@fe150000,rockchip,rk3568-qossyscon :qos@fe158000,rockchip,rk3568-qossyscon 4qos@fe158100,rockchip,rk3568-qossyscon 5qos@fe158180,rockchip,rk3568-qossyscon 6qos@fe158200,rockchip,rk3568-qossyscon 7qos@fe158280,rockchip,rk3568-qossyscon 8qos@fe158300,rockchip,rk3568-qossyscon 9qos@fe180000,rockchip,rk3568-qossyscon qos@fe190000,rockchip,rk3568-qossyscon ?qos@fe190280,rockchip,rk3568-qossyscon @qos@fe190300,rockchip,rk3568-qossyscon Aqos@fe190380,rockchip,rk3568-qossyscon Bqos@fe190400,rockchip,rk3568-qossyscon Cqos@fe198000,rockchip,rk3568-qossyscon ;qos@fe1a8000,rockchip,rk3568-qossyscon 1qos@fe1a8080,rockchip,rk3568-qossyscon 2qos@fe1a8100,rockchip,rk3568-qossyscon 3dfi@fe230000,rockchip,rk3568-dfi# N ]pcie@fe260000,rockchip,rk3568-pcie0@&dbiapbconfig<NKJIHGqsyspmcmsglegacyerr,($aclk_mstaclk_slvaclk_dbipclkauxpcib6`I^^^^Whw_ pcie-phyTl @@pipe =okaydefault` a blegacy-interrupt-controllerbM NH^mmc@fe2b00000,rockchip,rk3568-dw-mshcrockchip,rk3288-dw-mshc+@ Nb biuciuciu-driveciu-sampleрreset=okay #defaultcdef g mmc@fe2c00000,rockchip,rk3568-dw-mshcrockchip,rk3288-dw-mshc,@ Nc biuciuciu-driveciu-sampleрreset=okay  & <h Gdefault ijk l spi@fe300000 ,rockchip,sfc0@ Nexvclk_sfchclk_sfcmdefault =disabled flash@0,jedec,spi-nor Un6 g xmmc@fe310000,rockchip,rk3568-dwcmshc1 N={}M n6(|zy{}corebusaxiblocktimer=okay  G  rng@fe388000,rockchip,rk3568-rng8@po coreahbm =disabledi2s@fe400000,rockchip,rk3568-i2s-tdm@ N4==AMFqFq?C9mclk_txmclk_rxhclk/n txPQ tx-mrx-my Y=okay i2s@fe410000,rockchip,rk3568-i2s-tdmA N5=EIMFqFqGK:mclk_txmclk_rxhclk/nn rxtxRS tx-mrx-my defaultopqrY=okay i2s@fe420000,rockchip,rk3568-i2s-tdmB N6=MMFqOO;mclk_txmclk_rxhclk/nn txrxTtx-my defaultstuvY =disabledi2s@fe430000,rockchip,rk3568-i2s-tdmC N7SW<mclk_txmclk_rxhclk/nn txrxUV tx-mrx-my Y =disabledpdm@fe440000,rockchip,rk3568-pdmD NLZYpdm_clkpdm_hclk/n  rxwxyz{|defaultXpdm-mY =disabledspdif@fe460000,rockchip,rk3568-spdifF Nf mclkhclk_\/n txdefault}Y=okaydma-controller@fe530000,arm,pl330arm,primecellS@N    apb_pclk 'dma-controller@fe550000,arm,pl330arm,primecellU@N   apb_pclk ni2c@fe5a0000(,rockchip,rk3568-i2crockchip,rk3399-i2cZ N/HG i2cpclk~default  =disabledi2c@fe5b0000(,rockchip,rk3568-i2crockchip,rk3399-i2c[ N0JI i2cpclkdefault  =disabledi2c@fe5c0000(,rockchip,rk3568-i2crockchip,rk3399-i2c\ N1LK i2cpclkdefault =okayi2c@fe5d0000(,rockchip,rk3568-i2crockchip,rk3399-i2c] N2NM i2cpclkdefault  =disabledi2c@fe5e0000(,rockchip,rk3568-i2crockchip,rk3399-i2c^ N3PO i2cpclkdefault  =disabledwatchdog@fe600000 ,rockchip,rk3568-wdtsnps,dw-wdt` N tclkpclkspi@fe610000(,rockchip,rk3568-spirockchip,rk3066-spia NgRQspiclkapb_pclk/'' txrxdefault   =disabledspi@fe620000(,rockchip,rk3568-spirockchip,rk3066-spib NhTSspiclkapb_pclk/'' txrxdefault  =disabledspi@fe630000(,rockchip,rk3568-spirockchip,rk3066-spic NiVUspiclkapb_pclk/'' txrxdefault   =disabledspi@fe640000(,rockchip,rk3568-spirockchip,rk3066-spid NjXWspiclkapb_pclk/'' txrxdefault   =disabledserial@fe650000&,rockchip,rk3568-uartsnps,dw-apb-uarte Nubaudclkapb_pclk/'' default4A=okay txrx bluetooth,brcm,bcm43438-btlpo   default  $" 0 =-serial@fe660000&,rockchip,rk3568-uartsnps,dw-apb-uartf Nv# baudclkapb_pclk/''default4A=okayserial@fe670000&,rockchip,rk3568-uartsnps,dw-apb-uartg Nw'$baudclkapb_pclk/''default4A =disabledserial@fe680000&,rockchip,rk3568-uartsnps,dw-apb-uarth Nx+(baudclkapb_pclk/'' default4A =disabledserial@fe690000&,rockchip,rk3568-uartsnps,dw-apb-uarti Ny/,baudclkapb_pclk/' ' default4A =disabledserial@fe6a0000&,rockchip,rk3568-uartsnps,dw-apb-uartj Nz30baudclkapb_pclk/' ' default4A =disabledserial@fe6b0000&,rockchip,rk3568-uartsnps,dw-apb-uartk N{74baudclkapb_pclk/''default4A =disabledserial@fe6c0000&,rockchip,rk3568-uartsnps,dw-apb-uartl N|;8baudclkapb_pclk/''default4A =disabledserial@fe6d0000&,rockchip,rk3568-uartsnps,dw-apb-uartm N}?<baudclkapb_pclk/''default4A =disabledthermal-zonescpu-thermal Gd ] ktripscpu_alert0 {p passivecpu_alert1 {$ passivecpu_crit {s  criticalcpu_hot { activecooling-mapsmap0 0 map1  gpu-thermal G ] ktripsgpu-threshold {p passivegpu-target {$ passivegpu-crit {s  criticalcooling-mapsmap0  tsadc@fe710000,rockchip,rk3568-tsadcq Ns=Mf@ `tsadcapb_pclky  sdefaultsleep  =okay  saradc@fe720000.,rockchip,rk3568-saradcrockchip,rk3399-saradcr N]saradcapb_pclk saradc-apb  =disabledpwm@fe6e0000(,rockchip,rk3568-pwmrockchip,rk3328-pwmnZY pwmpclkdefaultK =disabledpwm@fe6e0010(,rockchip,rk3568-pwmrockchip,rk3328-pwmnZY pwmpclkdefaultK =disabledpwm@fe6e0020(,rockchip,rk3568-pwmrockchip,rk3328-pwmn ZY pwmpclkdefaultK =disabledpwm@fe6e0030(,rockchip,rk3568-pwmrockchip,rk3328-pwmn0ZY pwmpclkdefaultK =disabledpwm@fe6f0000(,rockchip,rk3568-pwmrockchip,rk3328-pwmo]\ pwmpclkdefaultK =disabledpwm@fe6f0010(,rockchip,rk3568-pwmrockchip,rk3328-pwmo]\ pwmpclkdefaultK =disabledpwm@fe6f0020(,rockchip,rk3568-pwmrockchip,rk3328-pwmo ]\ pwmpclkdefaultK =disabledpwm@fe6f0030(,rockchip,rk3568-pwmrockchip,rk3328-pwmo0]\ pwmpclkdefaultK =disabledpwm@fe700000(,rockchip,rk3568-pwmrockchip,rk3328-pwmp`_ pwmpclkdefaultK =disabledpwm@fe700010(,rockchip,rk3568-pwmrockchip,rk3328-pwmp`_ pwmpclkdefaultK =disabledpwm@fe700020(,rockchip,rk3568-pwmrockchip,rk3328-pwmp `_ pwmpclkdefaultK =disabledpwm@fe700030(,rockchip,rk3568-pwmrockchip,rk3328-pwmp0`_ pwmpclkdefaultK =disabledphy@fe830000,rockchip,rk3568-naneng-combphy"} refapbpipe="Mphy ! 3 I=okayphy@fe840000,rockchip,rk3568-naneng-combphy%~ refapbpipe=%Mphy ! 3 I=okayphy@fe870000,rockchip,rk3568-csi-dphyypclk Iapby  =disabledmipi-dphy@fe850000,rockchip,rk3568-dsi-dphy refpclkz I apb =disabledUmipi-dphy@fe860000,rockchip,rk3568-dsi-dphy refpclk{ I apb =disabledVusb2phy@fe8a0000,rockchip,rk3568-usb2phyphyclkclk_usbphy0_480m N T=okayhost-port I=okay#otg-port I=okay#usb2phy@fe8b0000,rockchip,rk3568-usb2phyphyclkclk_usbphy1_480m N T=okayhost-port I=okay#otg-port I=okay#pinctrl,rockchip,rk3568-pinctrly ] lgpio@fdd60000,rockchip,gpio-bank N!.  d t  Mb#gpio@fe740000,rockchip,gpio-bankt N"cd d t  Mbagpio@fe750000,rockchip,gpio-banku N#ef d t@  Mbgpio@fe760000,rockchip,gpio-bankv N$gh d t`  Mbgpio@fe770000,rockchip,gpio-bankw N%ij d t  Mbpcfg-pull-up pcfg-pull-down pcfg-pull-none pcfg-pull-none-drv-level-1  pcfg-pull-none-drv-level-2  pcfg-pull-none-drv-level-3  pcfg-pull-up-drv-level-1  pcfg-pull-up-drv-level-2  pcfg-pull-none-smt  acodecaudiopwmbt656bt1120camcan0can1can2cifclk32kclk32k-out0 cpuebcedpdpemmceth0eth1flashfspifspi-pins` mgmac0gmac1gmac1m0-miim Lgmac1m0-clkinout Pgmac1m0-rx-bus20    Ngmac1m0-tx-bus20  Mgmac1m0-rgmii-clk Ogmac1m0-rgmii-bus@ Qgpuhdmitxhdmitxm0-cec Yhdmitx-scl Whdmitx-sda Xi2c0i2c0-xfer  !i2c1i2c1-xfer  ~i2c2i2c2m0-xfer i2c3i2c3m0-xfer i2c4i2c4m0-xfer   i2c5i2c5m0-xfer   i2s1i2s1m0-lrcktx pi2s1m0-mclk %i2s1m0-sclktx oi2s1m0-sdi0  qi2s1m0-sdo0 ri2s2i2s2m0-lrcktx ti2s2m0-sclktx si2s2m0-sdi ui2s2m0-sdo vi2s3ispjtaglcdcmcunpupcie20pcie30x1pcie30x2pdmpdmm0-clk wpdmm0-clk1 xpdmm0-sdi0  ypdmm0-sdi1  zpdmm0-sdi2  {pdmm0-sdi3 |pmicpmic-int-l $pmupwm0pwm0m0-pins )pwm1pwm1m0-pins *pwm2pwm2m0-pins +pwm3pwm3-pins ,pwm4pwm4-pins pwm5pwm5-pins pwm6pwm6-pins pwm7pwm7-pins pwm8pwm8m0-pins  pwm9pwm9m0-pins  pwm10pwm10m0-pins  pwm11pwm11m0-pins pwm12pwm12m0-pins pwm13pwm13m0-pins pwm14pwm14m0-pins pwm15pwm15m0-pins refclksatasata0sata1sata2scrsdmmc0sdmmc0-bus4@ csdmmc0-clk dsdmmc0-cmd esdmmc0-det fsdmmc1sdmmc1-bus4@ isdmmc1-clk ksdmmc1-cmd jsdmmc2spdifspdifm0-tx }spi0spi0m0-pins0 spi0m0-cs0 spi0m0-cs1 spi1spi1m1-pins0 spi1m1-cs0 spi2spi2m0-pins0 spi2m0-cs0 spi2m0-cs1 spi3spi3m0-pins0   spi3m0-cs0 spi3m0-cs1 tsadctsadc-shutorg tsadc-pin uart0uart0-xfer (uart1uart1m0-xfer   uart1m0-ctsn uart1m0-rtsn  uart2uart2m0-xfer uart3uart3m0-xfer uart4uart4m0-xfer uart5uart5m0-xfer uart6uart6m0-xfer uart7uart7m0-xfer uart8uart8m0-xfer uart9uart9m0-xfer vopspi0-hsspi1-hsspi2-hsspi3-hsgmac-txd-level3gmac-txc-level2btbt-enable-h bt-host-wake-l bt-wake-l fanfan-en-h ledswork-led-enable-h diy-led-enable-h pciepcie-enable-h pcie-reset-h  `usb2vcc5v0-usb20-host-en  sdio-pwrseqwifi-enable-h vcc_sdvcc-sd-h opp-table-0,operating-points-v2 opp-408000000 Q P P0 @opp-600000000 #F P P0 @opp-816000000 0, P P0 @ opp-1104000000 Aʹ 0 @opp-1416000000 Tfr 0 @opp-1608000000 _" 0 @opp-1800000000 kI 000 @opp-table-1,operating-points-v2Dopp-200000000  P PB@opp-300000000  P PB@opp-400000000 ׄ P PB@opp-600000000 #F B@opp-700000000 )' ~~B@opp-800000000 / B@B@B@chosen $serial2:1500000n8external-gmac1-clock ,fixed-clocksY@ gmac1_clkinKgpio_fan ,gpio-fan 0 # ;defaulthdmi-con,hdmi-connectoraportendpoint\leds ,gpio-ledsled-work Nwork-led Toff #default bled-diy Ndiy-led Ton # yheartbeatdefault brk817-sound,simple-audio-card i2s Analog RK817#simple-audio-card,cpuDsimple-audio-card,codecDsdio-pwrseq,mmc-pwrseq-simple ext_clockdefault d LK@ hspdif-dit,linux,spdif-ditYspdif-sound,simple-audio-cardSPDIFsimple-audio-card,cpuDsimple-audio-card,codecDregulator-vcc12v-dcin,regulator-fixed vcc12v_dcin regulator-vbus,regulator-fixedvbus LK@LK@regulator-vcc3v3-pcie-p,regulator-fixed  B#defaultvcc3v3_pcie_p2Z2Zbregulator-vcc5v0-usb,regulator-fixed vcc5v0_usb LK@LK@regulator-vcc5v0-usb20-host,regulator-fixed  B defaultvcc5v0_usb20_hostLK@LK@regulator-vcc5v0-usb20-otg,regulator-fixed  B vcc5v0_usb20_otgLK@LK@&regulator-vcc3v3-sd,regulator-fixed B#default  vcc3v3_sd2Z2Zgregulator-vcc-sys,regulator-fixedvcc_sys C#C#"regulator-vcc-wl,regulator-fixedvcc_wl 2Z2Z"l interrupt-parent#address-cells#size-cellscompatiblemodelgpio0gpio1gpio2gpio3gpio4i2c0i2c1i2c2i2c3i2c4i2c5serial0serial1serial2serial3serial4serial5serial6serial7serial8serial9spi0spi1spi2spi3ethernet0mmc0mmc1device_typeregclocks#cooling-cellsenable-methodi-cache-sizei-cache-line-sizei-cache-setsd-cache-sized-cache-line-sized-cache-setsnext-level-cacheoperating-points-v2cpu-supplyphandlecache-levelcache-unifiedportsarm,smc-idshmem#clock-cellssimple-audio-card,namesimple-audio-card,formatsimple-audio-card,mclk-fsstatussound-daiinterruptsinterrupt-affinityrangesno-maparm,no-tick-in-suspendclock-frequencyclock-output-namespinctrl-0pinctrl-namesclock-namesphysphy-namesports-implementedpower-domainsdr_modephy_typeresetssnps,dis_u2_susphy_quirkextconmaximum-speedinterrupt-controller#interrupt-cellsmbi-aliasmbi-rangesmsi-controllerdma-noncoherent#msi-cellspmuio1-supplypmuio2-supplyvccio1-supplyvccio2-supplyvccio3-supplyvccio4-supplyvccio5-supplyvccio6-supplyvccio7-supply#reset-cellsassigned-clocksassigned-clock-ratesassigned-clock-parentsrockchip,grffcs,suspend-voltage-selectorregulator-nameregulator-min-microvoltregulator-max-microvoltregulator-ramp-delayregulator-always-onregulator-boot-onvin-supplyregulator-off-in-suspendsystem-power-controller#sound-dai-cellswakeup-sourcevcc1-supplyvcc2-supplyvcc3-supplyvcc4-supplyvcc5-supplyvcc6-supplyvcc7-supplyvcc8-supplyvcc9-supplyregulator-initial-moderegulator-on-in-suspendregulator-suspend-microvoltdmasreg-io-widthreg-shift#pwm-cells#power-domain-cellspm_qosinterrupt-namesmali-supplyiommus#iommu-cellsreset-namesfifo-depthmax-frequencysnps,axi-configsnps,mixed-burstsnps,mtl-rx-configsnps,mtl-tx-configsnps,tsoclock_in_outphy-supplyphy-modesnps,reset-gpiosnps,reset-active-lowsnps,reset-delays-ustx_delayrx_delayphy-handlesnps,blensnps,rd_osr_lmtsnps,wr_osr_lmtsnps,rx-queues-to-usesnps,tx-queues-to-usereg-namesremote-endpointavdd-0v9-supplyavdd-1v8-supplyrockchip,pmubus-rangeinterrupt-map-maskinterrupt-maplinux,pci-domainnum-ib-windowsnum-ob-windowsmax-link-speedmsi-mapnum-lanesreset-gpiosvpcie3v3-supplybus-widthcap-sd-highspeedcd-gpiosdisable-wpsd-uhs-sdr104vmmc-supplyvqmmc-supplycap-sdio-irqkeep-power-in-suspendmmc-pwrseqnon-removablespi-max-frequencyspi-rx-bus-widthspi-tx-bus-widthmmc-hs200-1_8vdma-namesrockchip,trcm-sync-tx-onlyarm,pl330-periph-burst#dma-cellsuart-has-rtsctshost-wakeup-gpiosdevice-wakeup-gpiosshutdown-gpiosvbat-supplyvddio-supplymax-speedpolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresistripcooling-devicerockchip,hw-tshut-temppinctrl-1#thermal-sensor-cellsrockchip,hw-tshut-moderockchip,hw-tshut-polarity#io-channel-cellsrockchip,pipe-grfrockchip,pipe-phy-grf#phy-cellsrockchip,usbgrfgpio-controllergpio-ranges#gpio-cellsbias-pull-upbias-pull-downbias-disabledrive-strengthinput-schmitt-enablerockchip,pinsopp-sharedopp-hzopp-microvoltclock-latency-nsopp-suspendstdout-pathfan-supplygpio-fan,speed-maplabeldefault-stateretain-state-suspendedlinux,default-triggerpost-power-on-delay-mspower-off-delay-usenable-active-high