8P(  ),rockchip,rk3568-evb1-v10rockchip,rk3568$7Rockchip RK3568 EVB1 DDR4 V10 Boardaliases=/pinctrl/gpio@fdd60000C/pinctrl/gpio@fe740000I/pinctrl/gpio@fe750000O/pinctrl/gpio@fe760000U/pinctrl/gpio@fe770000[/i2c@fdd40000`/i2c@fe5a0000e/i2c@fe5b0000j/i2c@fe5c0000o/i2c@fe5d0000t/i2c@fe5e0000y/serial@fdd50000/serial@fe650000/serial@fe660000/serial@fe670000/serial@fe680000/serial@fe690000/serial@fe6a0000/serial@fe6b0000/serial@fe6c0000/serial@fe6d0000/spi@fe610000/spi@fe620000/spi@fe630000/spi@fe640000/ethernet@fe2a0000/ethernet@fe010000/mmc@fe2b0000/mmc@fe310000cpus cpu@0cpu,arm,cortex-a55 !psci/<@N[h@z cpu@100cpu,arm,cortex-a55!psci/<@N[h@z cpu@200cpu,arm,cortex-a55!psci/<@N[h@z cpu@300cpu,arm,cortex-a55!psci/<@N[h@z l3-cache,cache1>@Pdisplay-subsystem,rockchip,display-subsystemfirmwarescmi ,arm,scmi-smc߂ protocol@14hdmi-sound,simple-audio-cardHDMIi2s-Gokaysimple-audio-card,codecNsimple-audio-card,cpuN pmu,arm,cortex-a55-pmu0Xc psci ,arm,psci-1.0(smcreserved-memory vshmem@10f000,arm,scmi-shmem}timer,arm,armv8-timer0X   xin24m ,fixed-clockn6xin24mxin32k ,fixed-clockxin32kdefaultsata@fc400000',rockchip,rk3568-dwc-ahcisnps,dwc-ahci@ satapmaliverxoob X_ sata-phy Gdisabledsata@fc800000',rockchip,rk3568-dwc-ahcisnps,dwc-ahci satapmaliverxoob X` sata-phy Gdisabledusb@fcc00000,rockchip,rk3568-dwc3snps,dwc3@ X ref_clksuspend_clkbus_clkotg utmi_wide")Gokay usb2-phyusb3-phyBusb@fd000000,rockchip,rk3568-dwc3snps,dwc3@ X ref_clksuspend_clkbus_clkhost usb2-phyusb3-phy utmi_wide")Gokayinterrupt-controller@fd400000 ,arm,gic-v3 @F X I^oAy(v msi-controller@fd440000,arm,gic-v3-itsDbusb@fd800000 ,generic-ehci X usbGokayusb@fd840000 ,generic-ohci X usbGokayusb@fd880000 ,generic-ehci X usbGokayusb@fd8c0000 ,generic-ohci X usbGokaysyscon@fdc20000),rockchip,rk3568-pmugrfsysconsimple-mfd`io-domains&,rockchip,rk3568-pmu-io-voltage-domainGokaysyscon@fdc50000 ,rockchip,rk3568-pipe-grfsysconsyscon@fdc60000&,rockchip,rk3568-grfsysconsimple-mfd syscon@fdc80000$,rockchip,rk3568-pipe-phy-grfsysconsyscon@fdc90000$,rockchip,rk3568-pipe-phy-grfsysconsyscon@fdca0000#,rockchip,rk3568-usb2phy-grfsysconsyscon@fdca8000#,rockchip,rk3568-usb2phy-grfsysconʀclock-controller@fdd00000,rockchip,rk3568-pmucru,clock-controller@fdd20000,rockchip,rk3568-cru xin24m,9 IG ^u i2c@fdd40000(,rockchip,rk3568-i2crockchip,rk3399-i2c X. - i2cpclk!default Gokayregulator@1c ,tcs,tcs4525vdd_cpu 50"regulator-state-mem$pmic@20,rockchip,rk809 #X9H^mclk Hdefault$%=Uf&r&~&&&&&&&regulatorsDCDC_REG1 vdd_logic pqregulator-state-mem$DCDC_REG2vdd_gpu pqHregulator-state-mem$DCDC_REG3vcc_ddrregulator-state-memDCDC_REG4vdd_npu pqregulator-state-mem$DCDC_REG5vcc_1v8w@w@regulator-state-mem$LDO_REG1vdda0v9_image  \regulator-state-mem$LDO_REG2 vdda_0v9  regulator-state-mem$LDO_REG3 vdda0v9_pmu  regulator-state-mem LDO_REG4 vccio_acodec2Z2Zregulator-state-mem$LDO_REG5 vccio_sdw@2Zregulator-state-mem$LDO_REG6 vcc3v3_pmu2Z2Zregulator-state-mem2ZLDO_REG7 vcca_1v8w@w@regulator-state-mem$LDO_REG8 vcca1v8_pmuw@w@regulator-state-memw@LDO_REG9vcca1v8_imagew@w@]regulator-state-mem$SWITCH_REG1vcc_3v3regulator-state-mem$SWITCH_REG2 vcc3v3_sdgregulator-state-mem$codec+serial@fdd50000&,rockchip,rk3568-uartsnps,dw-apb-uart Xt  ,baudclkapb_pclkH''(defaultMZ Gdisabledpwm@fdd70000(,rockchip,rk3568-pwmrockchip,rk3328-pwm  0 pwmpclk)defaultd Gdisabledpwm@fdd70010(,rockchip,rk3568-pwmrockchip,rk3328-pwm  0 pwmpclk*defaultd Gdisabledpwm@fdd70020(,rockchip,rk3568-pwmrockchip,rk3328-pwm   0 pwmpclk+defaultd Gdisabledpwm@fdd70030(,rockchip,rk3568-pwmrockchip,rk3328-pwm0  0 pwmpclk,defaultd Gdisabledpower-management@fdd90000&,rockchip,rk3568-pmusysconsimple-mfdpower-controller!,rockchip,rk3568-power-controllero power-domain@7 -opower-domain@8  ./0opower-domain@9   123opower-domain@10  456789opower-domain@11  :opower-domain@13  ;opower-domain@14  <=>opower-domain@15  ?@ABCDEFogpu@fde60000&,rockchip,rk3568-maliarm,mali-bifrost@$X()' jobmmugpu gpubusGokayGHvideo-codec@fdea0400,rockchip,rk3568-vpu Xvdpu  aclkhclkI iommu@fdea0800,rockchip,rk3568-iommu@ X aclkiface  Irga@fdeb0000(,rockchip,rk3568-rgarockchip,rk3288-rga XZ aclkhclksclk"&$% coreaxiahb video-codec@fdee0000,rockchip,rk3568-vepu X@  aclkhclkJ iommu@fdee0800,rockchip,rk3568-iommu@ X?  aclkiface Jmmc@fe0000000,rockchip,rk3568-dw-mshcrockchip,rk3288-dw-mshc@ Xd  biuciuciu-driveciu-sampleр"reset Gdisabledethernet@fe010000&,rockchip,rk3568-gmacsnps,dwmac-4.20aX macirqeth_wake_irq@ Wstmmacethmac_clk_rxmac_clk_txclk_mac_refoutaclk_macpclk_macclk_mac_speedptp_ref" stmmacethu KLM&Gokay9^IsY@/output<N Grgmii-iddefaultOPQRSmdio,snps,dwmac-mdio ethernet-phy@0,ethernet-phy-ieee802.3-c22PN ` rTNstmmac-axi-config~Krx-queues-configLqueue0tx-queues-configMqueue0vop@fe040000 0@vopgamma-lut X( %aclkhclkdclk_vp0dclk_vp1dclk_vp2U u Gokay,rockchip,rk3568-vop9^ports port@0 endpoint@2V^port@1 port@2 iommu@fe043e00,rockchip,rk3568-iommu >? X  aclkiface GokayUdsi@fe060000*,rockchip,rk3568-mipi-dsisnps,dw-mipi-dsi XDpclk dphyW apb"u  Gdisabledports port@0port@1dsi@fe070000*,rockchip,rk3568-mipi-dsisnps,dw-mipi-dsi XEpclk dphyX apb"u  Gdisabledports port@0port@1hdmi@fe0a0000,rockchip,rk3568-dw-hdmi  X-( (iahbisfrcecrefdefault YZ[ Mu UGokay\]ports port@0endpoint^Vport@1endpoint_qos@fe128000,rockchip,rk3568-qossyscon -qos@fe138080,rockchip,rk3568-qossyscon <qos@fe138100,rockchip,rk3568-qossyscon =qos@fe138180,rockchip,rk3568-qossyscon >qos@fe148000,rockchip,rk3568-qossyscon .qos@fe148080,rockchip,rk3568-qossyscon /qos@fe148100,rockchip,rk3568-qossyscon 0qos@fe150000,rockchip,rk3568-qossyscon :qos@fe158000,rockchip,rk3568-qossyscon 4qos@fe158100,rockchip,rk3568-qossyscon 5qos@fe158180,rockchip,rk3568-qossyscon 6qos@fe158200,rockchip,rk3568-qossyscon 7qos@fe158280,rockchip,rk3568-qossyscon 8qos@fe158300,rockchip,rk3568-qossyscon 9qos@fe180000,rockchip,rk3568-qossyscon qos@fe190000,rockchip,rk3568-qossyscon ?qos@fe190280,rockchip,rk3568-qossyscon Cqos@fe190300,rockchip,rk3568-qossyscon Dqos@fe190380,rockchip,rk3568-qossyscon Eqos@fe190400,rockchip,rk3568-qossyscon Fqos@fe198000,rockchip,rk3568-qossyscon ;qos@fe1a8000,rockchip,rk3568-qossyscon 1qos@fe1a8080,rockchip,rk3568-qossyscon 2qos@fe1a8100,rockchip,rk3568-qossyscon 3dfi@fe230000,rockchip,rk3568-dfi# X `pcie@fe260000,rockchip,rk3568-pcie0@&dbiapbconfig<XKJIHGsyspmcmsglegacyerr( $aclk_mstaclk_slvaclk_dbipclkauxpci^%`8aaaaFWfub pcie-phyTv @@"pipe  Gdisabledlegacy-interrupt-controller^I XHammc@fe2b00000,rockchip,rk3568-dw-mshcrockchip,rk3288-dw-mshc+@ Xb  biuciuciu-driveciu-sampleр"resetGokay #defaultcdefgmmc@fe2c00000,rockchip,rk3568-dw-mshcrockchip,rk3288-dw-mshc,@ Xc  biuciuciu-driveciu-sampleр"reset Gdisabledspi@fe300000 ,rockchip,sfc0@ Xe xvclk_sfchclk_sfchdefault Gdisabledmmc@fe310000,rockchip,rk3568-dwcmshc1 X9{}I n6( |zy{}corebusaxiblocktimerGokay defaultijklrng@fe388000,rockchip,rk3568-rng8@ po coreahb"mGokayi2s@fe400000,rockchip,rk3568-i2s-tdm@ X49=AIFqFq ?C9mclk_txmclk_rxhclkHmtx"PQ tx-mrx-mu UGokay i2s@fe410000,rockchip,rk3568-i2s-tdmA X59EIIFqFq GK:mclk_txmclk_rxhclkHmmrxtx"RS tx-mrx-mu default0nopqrstuvwxyUGokay i2s@fe420000,rockchip,rk3568-i2s-tdmB X69MIFq OO;mclk_txmclk_rxhclkHmmtxrx"Ttx-mu defaultz{|}U Gdisabledi2s@fe430000,rockchip,rk3568-i2s-tdmC X7 SW<mclk_txmclk_rxhclkHmmtxrx"UV tx-mrx-mu U Gdisabledpdm@fe440000,rockchip,rk3568-pdmD XL ZYpdm_clkpdm_hclkHm rx~default"Xpdm-mU Gdisabledspdif@fe460000,rockchip,rk3568-spdifF Xf mclkhclk _\HmtxdefaultU Gdisableddma-controller@fe530000,arm,pl330arm,primecellS@X     apb_pclk 6'dma-controller@fe550000,arm,pl330arm,primecellU@X    apb_pclk 6mi2c@fe5a0000(,rockchip,rk3568-i2crockchip,rk3399-i2cZ X/ HG i2cpclkdefault Gokaygoodix@14,goodix,gt1151#X  A O# default r# Yi2c@fe5b0000(,rockchip,rk3568-i2crockchip,rk3399-i2c[ X0 JI i2cpclkdefault  Gdisabledi2c@fe5c0000(,rockchip,rk3568-i2crockchip,rk3399-i2c\ X1 LK i2cpclkdefault  Gdisabledi2c@fe5d0000(,rockchip,rk3568-i2crockchip,rk3399-i2c] X2 NM i2cpclkdefault  Gdisabledi2c@fe5e0000(,rockchip,rk3568-i2crockchip,rk3399-i2c^ X3 PO i2cpclkdefault  Gdisabledwatchdog@fe600000 ,rockchip,rk3568-wdtsnps,dw-wdt` X  tclkpclkspi@fe610000(,rockchip,rk3568-spirockchip,rk3066-spia Xg RQspiclkapb_pclkH''txrxdefault   Gdisabledspi@fe620000(,rockchip,rk3568-spirockchip,rk3066-spib Xh TSspiclkapb_pclkH''txrxdefault   Gdisabledspi@fe630000(,rockchip,rk3568-spirockchip,rk3066-spic Xi VUspiclkapb_pclkH''txrxdefault   Gdisabledspi@fe640000(,rockchip,rk3568-spirockchip,rk3066-spid Xj XWspiclkapb_pclkH''txrxdefault   Gdisabledserial@fe650000&,rockchip,rk3568-uartsnps,dw-apb-uarte Xu baudclkapb_pclkH''defaultMZ Gdisabledserial@fe660000&,rockchip,rk3568-uartsnps,dw-apb-uartf Xv # baudclkapb_pclkH''defaultMZGokayserial@fe670000&,rockchip,rk3568-uartsnps,dw-apb-uartg Xw '$baudclkapb_pclkH''defaultMZ Gdisabledserial@fe680000&,rockchip,rk3568-uartsnps,dw-apb-uarth Xx +(baudclkapb_pclkH'' defaultMZ Gdisabledserial@fe690000&,rockchip,rk3568-uartsnps,dw-apb-uarti Xy /,baudclkapb_pclkH' ' defaultMZ Gdisabledserial@fe6a0000&,rockchip,rk3568-uartsnps,dw-apb-uartj Xz 30baudclkapb_pclkH' ' defaultMZ Gdisabledserial@fe6b0000&,rockchip,rk3568-uartsnps,dw-apb-uartk X{ 74baudclkapb_pclkH''defaultMZ Gdisabledserial@fe6c0000&,rockchip,rk3568-uartsnps,dw-apb-uartl X| ;8baudclkapb_pclkH''defaultMZ Gdisabledserial@fe6d0000&,rockchip,rk3568-uartsnps,dw-apb-uartm X} ?<baudclkapb_pclkH''defaultMZ Gdisabledthermal-zonescpu-thermal fd | tripscpu_alert0 p passivecpu_alert1 $ passivecpu_crit s  criticalcooling-mapsmap0 0 gpu-thermal f | tripsgpu-threshold p passivegpu-target $ passivegpu-crit s  criticalcooling-mapsmap0  tsadc@fe710000,rockchip,rk3568-tsadcq Xs9If@ ` tsadcapb_pclk"u  sdefaultsleep  Gokay  saradc@fe720000.,rockchip,rk3568-saradcrockchip,rk3399-saradcr X] saradcapb_pclk" saradc-apb .Gokay @pwm@fe6e0000(,rockchip,rk3568-pwmrockchip,rk3328-pwmn ZY pwmpclkdefaultd Gdisabledpwm@fe6e0010(,rockchip,rk3568-pwmrockchip,rk3328-pwmn ZY pwmpclkdefaultd Gdisabledpwm@fe6e0020(,rockchip,rk3568-pwmrockchip,rk3328-pwmn  ZY pwmpclkdefaultd Gdisabledpwm@fe6e0030(,rockchip,rk3568-pwmrockchip,rk3328-pwmn0 ZY pwmpclkdefaultd Gdisabledpwm@fe6f0000(,rockchip,rk3568-pwmrockchip,rk3328-pwmo ]\ pwmpclkdefaultd Gdisabledpwm@fe6f0010(,rockchip,rk3568-pwmrockchip,rk3328-pwmo ]\ pwmpclkdefaultd Gdisabledpwm@fe6f0020(,rockchip,rk3568-pwmrockchip,rk3328-pwmo  ]\ pwmpclkdefaultd Gdisabledpwm@fe6f0030(,rockchip,rk3568-pwmrockchip,rk3328-pwmo0 ]\ pwmpclkdefaultd Gdisabledpwm@fe700000(,rockchip,rk3568-pwmrockchip,rk3328-pwmp `_ pwmpclkdefaultd Gdisabledpwm@fe700010(,rockchip,rk3568-pwmrockchip,rk3328-pwmp `_ pwmpclkdefaultd Gdisabledpwm@fe700020(,rockchip,rk3568-pwmrockchip,rk3328-pwmp  `_ pwmpclkdefaultd Gdisabledpwm@fe700030(,rockchip,rk3568-pwmrockchip,rk3328-pwmp0 `_ pwmpclkdefaultd Gdisabledphy@fe830000,rockchip,rk3568-naneng-combphy "} refapbpipe9"I"phy L ^ tGokayphy@fe840000,rockchip,rk3568-naneng-combphy %~ refapbpipe9%I"phy L ^ t Gdisabledphy@fe870000,rockchip,rk3568-csi-dphy ypclk t"apbu  Gdisabledmipi-dphy@fe850000,rockchip,rk3568-dsi-dphy refpclk z t apb" GdisabledWmipi-dphy@fe860000,rockchip,rk3568-dsi-dphy refpclk { t apb" GdisabledXusb2phy@fe8a0000,rockchip,rk3568-usb2phy phyclkclk_usbphy0_480m X Gokayhost-port tGokay otg-port tGokay usb2phy@fe8b0000,rockchip,rk3568-usb2phy phyclkclk_usbphy1_480m X Gokayhost-port tGokay otg-port tGokay pinctrl,rockchip,rk3568-pinctrlu ` vgpio@fdd60000,rockchip,gpio-bank X! .    I^#gpio@fe740000,rockchip,gpio-bankt X" cd   I^gpio@fe750000,rockchip,gpio-banku X# ef  @  I^Tgpio@fe760000,rockchip,gpio-bankv X$ gh  `  I^gpio@fe770000,rockchip,gpio-bankw X% ij   I^pcfg-pull-up pcfg-pull-none pcfg-pull-none-drv-level-1  pcfg-pull-none-drv-level-2  pcfg-pull-none-drv-level-3  pcfg-pull-up-drv-level-1  pcfg-pull-up-drv-level-2  pcfg-pull-none-smt  acodecaudiopwmbt656bt1120camcan0can0m0-pins  can1can1m0-pins can2can2m0-pins   cifclk32kclk32k-out0 cpuebcedpdpemmcemmc-bus8   iemmc-clk jemmc-cmd kemmc-datastrobe leth0eth1flashfspifspi-pins` hgmac0gmac0-miim gmac0-rx-bus20 gmac0-tx-bus20    gmac0-rgmii-clk gmac0-rgmii-bus@ gmac1gmac1m1-miim Ogmac1m1-rx-bus20  Qgmac1m1-tx-bus20 Pgmac1m1-rgmii-clk Rgmac1m1-rgmii-bus@ Sgpuhdmitxhdmitxm0-cec [hdmitx-scl Yhdmitx-sda Zi2c0i2c0-xfer  !i2c1i2c1-xfer  i2c2i2c2m0-xfer i2c3i2c3m0-xfer i2c4i2c4m0-xfer   i2c5i2c5m0-xfer   i2s1i2s1m0-lrckrx qi2s1m0-lrcktx pi2s1m0-mclk %i2s1m0-sclkrx oi2s1m0-sclktx ni2s1m0-sdi0  ri2s1m0-sdi1  si2s1m0-sdi2  ti2s1m0-sdi3 ui2s1m0-sdo0 vi2s1m0-sdo1 wi2s1m0-sdo2  xi2s1m0-sdo3  yi2s2i2s2m0-lrcktx {i2s2m0-sclktx zi2s2m0-sdi |i2s2m0-sdo }i2s3ispjtaglcdcmcunpupcie20pcie30x1pcie30x2pdmpdmm0-clk ~pdmm0-clk1 pdmm0-sdi0  pdmm0-sdi1  pdmm0-sdi2  pdmm0-sdi3 pmicpmic_int $pmupwm0pwm0m0-pins )pwm1pwm1m0-pins *pwm2pwm2m0-pins +pwm3pwm3-pins ,pwm4pwm4-pins pwm5pwm5-pins pwm6pwm6-pins pwm7pwm7-pins pwm8pwm8m0-pins  pwm9pwm9m0-pins  pwm10pwm10m0-pins  pwm11pwm11m0-pins pwm12pwm12m0-pins pwm13pwm13m0-pins pwm14pwm14m0-pins pwm15pwm15m0-pins refclksatasata0sata1sata2scrsdmmc0sdmmc0-bus4@ csdmmc0-clk dsdmmc0-cmd esdmmc0-det fsdmmc1sdmmc2spdifspdifm0-tx spi0spi0m0-pins0 spi0m0-cs0 spi0m0-cs1 spi1spi1m0-pins0  spi1m0-cs0 spi1m0-cs1 spi2spi2m0-pins0 spi2m0-cs0 spi2m0-cs1 spi3spi3m0-pins0   spi3m0-cs0 spi3m0-cs1 tsadctsadc-shutorg tsadc-pin uart0uart0-xfer (uart1uart1m0-xfer   uart2uart2m0-xfer uart3uart3m0-xfer uart4uart4m0-xfer uart5uart5m0-xfer uart6uart6m0-xfer uart7uart7m0-xfer uart8uart8m0-xfer uart9uart9m0-xfer vopspi0-hsspi1-hsspi2-hsspi3-hsgmac-txd-level3gmac-txc-level2displayvcc3v3_lcd0_n_en vcc3v3_lcd1_n_en ledsled_work_en touchscreentouch_int touch_rst usbvcc5v0_usb_host_en vcc5v0_usb_otg_en opp-table-0,operating-points-v2 opp-408000000 Q P P0 .@opp-600000000 #F P P0 .@opp-816000000 0, P P0 .@ ?opp-1104000000 Aʹ 0 .@opp-1416000000 Tfr 0 .@opp-1608000000 _" 0 .@opp-1800000000 kI 000 .@opp-1992000000 v 000 .@opp-table-1,operating-points-v2Gopp-200000000   P PB@opp-300000000  P PB@opp-400000000 ׄ P PB@opp-600000000 #F B@opp-700000000 )' ~~B@opp-800000000 / B@B@B@sata@fc000000',rockchip,rk3568-dwc-ahcisnps,dwc-ahci satapmaliverxoob X^ sata-phy Gdisabledsyscon@fdc70000$,rockchip,rk3568-pipe-phy-grfsysconqos@fe190080,rockchip,rk3568-qossyscon @qos@fe190100,rockchip,rk3568-qossyscon Aqos@fe190200,rockchip,rk3568-qossyscon Bsyscon@fdcb8000%,rockchip,rk3568-pcie3-phy-grfsysconˀphy@fe8c0000,rockchip,rk3568-pcie3-phy t &'wrefclk_mrefclk_npclk"phy K Gdisabledpcie@fe270000,rockchip,rk3568-pcie ( $aclk_mstaclk_slvaclk_dbipclkauxpci<Xsyspmcmsglegacyerr^%`8FWfub pcie-phy0@@'Tv @@@dbiapbconfig"pipe Gdisabledlegacy-interrupt-controllerI^ Xpcie@fe280000,rockchip,rk3568-pcie  /( $aclk_mstaclk_slvaclk_dbipclkauxpci<Xsyspmcmsglegacyerr^%`8FWfu b  pcie-phy0@(Tv @@dbiapbconfig"pipe Gdisabledlegacy-interrupt-controllerI^ Xethernet@fe2a0000&,rockchip,rk3568-gmacsnps,dwmac-4.20a*Xmacirqeth_wake_irq@ Wstmmacethmac_clk_rxmac_clk_txclk_mac_refoutaclk_macpclk_macclk_mac_speedptp_ref" stmmacethu &Gokay9^IsY@/output< Grgmii-iddefaultmdio,snps,dwmac-mdio ethernet-phy@0,ethernet-phy-ieee802.3-c22PN ` rTstmmac-axi-config~rx-queues-configqueue0tx-queues-configqueue0can@fe570000,rockchip,rk3568v2-canfdW X A@ baudpclk"UT coreapbdefault Gdisabledcan@fe580000,rockchip,rk3568v2-canfdX X CB baudpclk"WV coreapbdefault Gdisabledcan@fe590000,rockchip,rk3568v2-canfdY X ED baudpclk"YX coreapbdefault Gdisabledphy@fe820000,rockchip,rk3568-naneng-combphy | refapbpipe9I"phy L ^ tGokaychosen \serial2:1500000n8regulator-dc-12v,regulator-fixeddc_12vhdmi-con,hdmi-connectoraportendpoint_leds ,gpio-ledsled-0 x# hheartbeat q wheartbeatdefaultrk809-sound,simple-audio-cardi2s Analog RK809-simple-audio-card,cpuNsimple-audio-card,codecNregulator-vcc3v3-sys,regulator-fixed vcc3v3_sys2Z2Z&regulator-vcc5v0-sys,regulator-fixed vcc5v0_sysLK@LK@"regulator-vcc5v0-usb,regulator-fixed vcc5v0_usbLK@LK@regulator-vcc5v0-usb-host,regulator-fixed  #defaultvcc5v0_usb_hostLK@LK@regulator-vcc5v0-usb-otg,regulator-fixed  #defaultvcc5v0_usb_otgLK@LK@regulator-vcc3v3-lcd0-n,regulator-fixedvcc3v3_lcd0_n2Z2Z  #&defaultregulator-state-mem$regulator-vcc3v3-lcd1-n,regulator-fixedvcc3v3_lcd1_n2Z2Z  #&defaultregulator-state-mem$ interrupt-parent#address-cells#size-cellscompatiblemodelgpio0gpio1gpio2gpio3gpio4i2c0i2c1i2c2i2c3i2c4i2c5serial0serial1serial2serial3serial4serial5serial6serial7serial8serial9spi0spi1spi2spi3ethernet0ethernet1mmc0mmc1device_typeregclocks#cooling-cellsenable-methodi-cache-sizei-cache-line-sizei-cache-setsd-cache-sized-cache-line-sized-cache-setsnext-level-cacheoperating-points-v2cpu-supplyphandlecache-levelcache-unifiedportsarm,smc-idshmem#clock-cellssimple-audio-card,namesimple-audio-card,formatsimple-audio-card,mclk-fsstatussound-daiinterruptsinterrupt-affinityrangesno-maparm,no-tick-in-suspendclock-frequencyclock-output-namespinctrl-0pinctrl-namesclock-namesphysphy-namesports-implementedpower-domainsdr_modephy_typeresetssnps,dis_u2_susphy_quirkextconinterrupt-controller#interrupt-cellsmbi-aliasmbi-rangesmsi-controllerdma-noncoherent#msi-cellspmuio1-supplypmuio2-supplyvccio1-supplyvccio2-supplyvccio3-supplyvccio4-supplyvccio5-supplyvccio6-supplyvccio7-supply#reset-cellsassigned-clocksassigned-clock-ratesassigned-clock-parentsrockchip,grffcs,suspend-voltage-selectorregulator-nameregulator-always-onregulator-boot-onregulator-min-microvoltregulator-max-microvoltregulator-ramp-delayvin-supplyregulator-off-in-suspendsystem-power-controller#sound-dai-cellsvcc1-supplyvcc2-supplyvcc3-supplyvcc4-supplyvcc5-supplyvcc6-supplyvcc7-supplyvcc8-supplyvcc9-supplywakeup-sourceregulator-initial-moderegulator-on-in-suspendregulator-suspend-microvoltrockchip,mic-in-differentialdmasreg-io-widthreg-shift#pwm-cells#power-domain-cellspm_qosinterrupt-namesmali-supplyiommus#iommu-cellsreset-namesfifo-depthmax-frequencysnps,axi-configsnps,mixed-burstsnps,mtl-rx-configsnps,mtl-tx-configsnps,tsoclock_in_outphy-handlephy-modereset-assert-usreset-deassert-usreset-gpiossnps,blensnps,rd_osr_lmtsnps,wr_osr_lmtsnps,rx-queues-to-usesnps,tx-queues-to-usereg-namesremote-endpointavdd-0v9-supplyavdd-1v8-supplyrockchip,pmubus-rangeinterrupt-map-maskinterrupt-maplinux,pci-domainnum-ib-windowsnum-ob-windowsmax-link-speedmsi-mapnum-lanesbus-widthcap-sd-highspeedcd-gpiosdisable-wpsd-uhs-sdr104vmmc-supplyvqmmc-supplynon-removabledma-namesrockchip,trcm-sync-tx-onlyarm,pl330-periph-burst#dma-cellsAVDD28-supplyirq-gpiosVDDIO-supplypolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresistripcooling-devicerockchip,hw-tshut-temppinctrl-1#thermal-sensor-cellsrockchip,hw-tshut-moderockchip,hw-tshut-polarity#io-channel-cellsvref-supplyrockchip,pipe-grfrockchip,pipe-phy-grf#phy-cellsrockchip,usbgrfphy-supplygpio-controllergpio-ranges#gpio-cellsbias-pull-upbias-disabledrive-strengthinput-schmitt-enablerockchip,pinsopp-sharedopp-hzopp-microvoltclock-latency-nsopp-suspendrockchip,phy-grfstdout-pathfunctioncolorlinux,default-triggerenable-active-highgpio