8( Fl ,radxa,rock-3brockchip,rk35687Radxa ROCK 3Baliases=/pinctrl/gpio@fdd60000C/pinctrl/gpio@fe740000I/pinctrl/gpio@fe750000O/pinctrl/gpio@fe760000U/pinctrl/gpio@fe770000[/i2c@fdd40000`/i2c@fe5a0000e/i2c@fe5b0000j/i2c@fe5c0000o/i2c@fe5d0000t/i2c@fe5e0000y/serial@fdd50000/serial@fe650000/serial@fe660000/serial@fe670000/serial@fe680000/serial@fe690000/serial@fe6a0000/serial@fe6b0000/serial@fe6c0000/serial@fe6d0000/spi@fe610000/spi@fe620000/spi@fe630000/spi@fe640000/ethernet@fe2a0000/ethernet@fe010000/mmc@fe310000/mmc@fe2b0000/mmc@fe000000cpus cpu@0cpu,arm,cortex-a55 &psci4A@S`m@ cpu@100cpu,arm,cortex-a55 &psci4A@S`m@ cpu@200cpu,arm,cortex-a55 &psci4A@S`m@ cpu@300cpu,arm,cortex-a55 &psci4A@S`m@ l3-cache,cache6C@Udisplay-subsystem,rockchip,display-subsystemfirmwarescmi ,arm,scmi-smc protocol@14 hdmi-sound,simple-audio-cardHDMIi2s2Lokaysimple-audio-card,codecSsimple-audio-card,cpuS pmu,arm,cortex-a55-pmu0]h psci ,arm,psci-1.0-smcreserved-memory {shmem@10f000,arm,scmi-shmem timer,arm,armv8-timer0]   xin24m ,fixed-clockn6xin24mxin32k ,fixed-clockxin32kdefaultsata@fc400000',rockchip,rk3568-dwc-ahcisnps,dwc-ahci @satapmaliverxoob ]_ sata-phy Ldisabledsata@fc800000',rockchip,rk3568-dwc-ahcisnps,dwc-ahci satapmaliverxoob ]` sata-phy Ldisabledusb@fcc00000,rockchip,rk3568-dwc3snps,dwc3 @ ]ref_clksuspend_clkbus_clkotg utmi_wide'.Lokay usb2-phyusb3-phyGusb@fd000000,rockchip,rk3568-dwc3snps,dwc3 @ ]ref_clksuspend_clkbus_clkhost usb2-phyusb3-phy utmi_wide'.Lokayinterrupt-controller@fd400000 ,arm,gic-v3  @F ] NctA~({ msi-controller@fd440000,arm,gic-v3-its Dhusb@fd800000 ,generic-ehci  ]usbLokayusb@fd840000 ,generic-ohci  ]usbLokayusb@fd880000 ,generic-ehci  ]usb Ldisabledusb@fd8c0000 ,generic-ohci  ]usb Ldisabledsyscon@fdc20000),rockchip,rk3568-pmugrfsysconsimple-mfd fio-domains&,rockchip,rk3568-pmu-io-voltage-domainLokay#syscon@fdc50000  ,rockchip,rk3568-pipe-grfsysconsyscon@fdc60000&,rockchip,rk3568-grfsysconsimple-mfd  syscon@fdc80000$,rockchip,rk3568-pipe-phy-grfsyscon syscon@fdc90000$,rockchip,rk3568-pipe-phy-grfsyscon syscon@fdca0000#,rockchip,rk3568-usb2phy-grfsyscon syscon@fdca8000#,rockchip,rk3568-usb2phy-grfsyscon ʀclock-controller@fdd00000,rockchip,rk3568-pmucru 1clock-controller@fdd20000,rockchip,rk3568-cru xin24m1> NG cz i2c@fdd40000(,rockchip,rk3568-i2crockchip,rk3399-i2c  ].- i2cpclk!default Lokayregulator@1c ,tcs,tcs4525 vdd_cpu 50 "regulator-state-mem)pmic@20,rockchip,rk809 >HcHmclkrk809-clkout1rk809-clkout2#]default$%BSky&&&&&&&&&regulatorsDCDC_REG1 vdd_logic p qregulator-state-mem)DCDC_REG2vdd_gpu p qHregulator-state-mem)DCDC_REG3vcc_ddrregulator-state-memDCDC_REG4vdd_npu p qregulator-state-mem)DCDC_REG5vcc_1v8w@w@regulator-state-mem)LDO_REG1vdda0v9_image  bregulator-state-mem)LDO_REG2 vdda_0v9  regulator-state-mem)LDO_REG3 vdda0v9_pmu  regulator-state-mem LDO_REG4 vccio_acodec2Z2Zregulator-state-mem)LDO_REG5 vccio_sdw@2Zregulator-state-mem)LDO_REG6 vcc3v3_pmu2Z2Zregulator-state-mem2ZLDO_REG7 vcca_1v8w@w@regulator-state-mem)LDO_REG8 vcca1v8_pmuw@w@regulator-state-memw@LDO_REG9vcca1v8_imagew@w@cregulator-state-mem)SWITCH_REG1vcc_3v3regulator-state-mem)SWITCH_REG2 vcc3v3_sdnregulator-state-mem)serial@fdd50000&,rockchip,rk3568-uartsnps,dw-apb-uart  ]t ,baudclkapb_pclk0''(default5B Ldisabledpwm@fdd70000(,rockchip,rk3568-pwmrockchip,rk3328-pwm  0 pwmpclk)defaultL Ldisabledpwm@fdd70010(,rockchip,rk3568-pwmrockchip,rk3328-pwm  0 pwmpclk*defaultL Ldisabledpwm@fdd70020(,rockchip,rk3568-pwmrockchip,rk3328-pwm  0 pwmpclk+defaultL Ldisabledpwm@fdd70030(,rockchip,rk3568-pwmrockchip,rk3328-pwm 0 0 pwmpclk,defaultL Ldisabledpower-management@fdd90000&,rockchip,rk3568-pmusysconsimple-mfd power-controller!,rockchip,rk3568-power-controllerW power-domain@7 k-Wpower-domain@8  k./0Wpower-domain@9  k123Wpower-domain@10 k456789Wpower-domain@11 k:Wpower-domain@13 k;Wpower-domain@14  k<=>Wpower-domain@15  k?@ABCDEFWgpu@fde60000&,rockchip,rk3568-maliarm,mali-bifrost @$]()' rjobmmugpugpubusLokayGHvideo-codec@fdea0400,rockchip,rk3568-vpu  ]rvdpu aclkhclkI iommu@fdea0800,rockchip,rk3568-iommu @ ] aclkiface Irga@fdeb0000(,rockchip,rk3568-rgarockchip,rk3288-rga  ]Zaclkhclksclk'&$% coreaxiahb video-codec@fdee0000,rockchip,rk3568-vepu  ]@ aclkhclkJ iommu@fdee0800,rockchip,rk3568-iommu @ ]? aclkiface Jmmc@fe0000000,rockchip,rk3568-dw-mshcrockchip,rk3288-dw-mshc @ ]d biuciuciu-driveciu-sampleр'reset LdisabledKdefault LMN,O8ethernet@fe010000&,rockchip,rk3568-gmacsnps,dwmac-4.20a ] rmacirqeth_wake_irq@Wstmmacethmac_clk_rxmac_clk_txclk_mac_refoutaclk_macpclk_macclk_mac_speedptp_ref' stmmacethz EPUfQyRLokay>cinputS rgmii-iddefaultTUVWXYmdio,snps,dwmac-mdio ethernet-phy@1,ethernet-phy-ieee802.3-c22 N P ZSstmmac-axi-config Prx-queues-configQqueue0tx-queues-config/Rqueue0vop@fe040000  0@Evopgamma-lut ](%aclkhclkdclk_vp0dclk_vp1dclk_vp2[ z Lokay,rockchip,rk3568-vop>cports port@0  endpoint@2 O\dport@1  port@2  iommu@fe043e00,rockchip,rk3568-iommu  >? ] aclkiface Lokay[dsi@fe060000*,rockchip,rk3568-mipi-dsisnps,dw-mipi-dsi  ]Dpclkdphy] apb'z  Ldisabledports port@0 port@1 dsi@fe070000*,rockchip,rk3568-mipi-dsisnps,dw-mipi-dsi  ]Epclkdphy^ apb'z  Ldisabledports port@0 port@1 hdmi@fe0a0000,rockchip,rk3568-dw-hdmi  ]-((iahbisfrcecrefdefault _`a 5z BLokay_bocports port@0 endpointOd\port@1 endpointOeqos@fe128000,rockchip,rk3568-qossyscon  -qos@fe138080,rockchip,rk3568-qossyscon  <qos@fe138100,rockchip,rk3568-qossyscon  =qos@fe138180,rockchip,rk3568-qossyscon  >qos@fe148000,rockchip,rk3568-qossyscon  .qos@fe148080,rockchip,rk3568-qossyscon  /qos@fe148100,rockchip,rk3568-qossyscon  0qos@fe150000,rockchip,rk3568-qossyscon  :qos@fe158000,rockchip,rk3568-qossyscon  4qos@fe158100,rockchip,rk3568-qossyscon  5qos@fe158180,rockchip,rk3568-qossyscon  6qos@fe158200,rockchip,rk3568-qossyscon  7qos@fe158280,rockchip,rk3568-qossyscon  8qos@fe158300,rockchip,rk3568-qossyscon  9qos@fe180000,rockchip,rk3568-qossyscon  qos@fe190000,rockchip,rk3568-qossyscon  ?qos@fe190280,rockchip,rk3568-qossyscon  Cqos@fe190300,rockchip,rk3568-qossyscon  Dqos@fe190380,rockchip,rk3568-qossyscon  Eqos@fe190400,rockchip,rk3568-qossyscon  Fqos@fe198000,rockchip,rk3568-qossyscon  ;qos@fe1a8000,rockchip,rk3568-qossyscon  1qos@fe1a8080,rockchip,rk3568-qossyscon  2qos@fe1a8100,rockchip,rk3568-qossyscon  3dfi@fe230000,rockchip,rk3568-dfi # ] fpcie@fe260000,rockchip,rk3568-pcie0 @&Edbiapbconfig<]KJIHGrsyspmcmsglegacyerr($aclk_mstaclk_slvaclk_dbipclkauxpcic`ggggh pcie-phyT{ @@'pipe Lokaydefaulti Z Olegacy-interrupt-controllercN ]Hgmmc@fe2b00000,rockchip,rk3568-dw-mshcrockchip,rk3288-dw-mshc +@ ]b biuciuciu-driveciu-sampleр'resetLokay defaultjklm,n8mmc@fe2c00000,rockchip,rk3568-dw-mshcrockchip,rk3288-dw-mshc ,@ ]c biuciuciu-driveciu-sampleр'reset Ldisabledspi@fe300000 ,rockchip,sfc 0@ ]exvclk_sfchclk_sfcodefaultLokay flash@0,jedec,spi-nor  "2 4 Emmc@fe310000,rockchip,rk3568-dwcmshc 1 ]>{}N n6(|zy{}corebusaxiblocktimerLokay V  hdefaultpqrs,8rng@fe388000,rockchip,rk3568-rng 8@po coreahb'mLokayi2s@fe400000,rockchip,rk3568-i2s-tdm @ ]4>=ANFqFq?C9mclk_txmclk_rxhclk0t wtx'PQ tx-mrx-mz BLokay i2s@fe410000,rockchip,rk3568-i2s-tdm A ]5>EINFqFqGK:mclk_txmclk_rxhclk0tt wrxtx'RS tx-mrx-mz defaultuvwxBLokay i2s@fe420000,rockchip,rk3568-i2s-tdm B ]6>MNFqOO;mclk_txmclk_rxhclk0tt wtxrx'Ttx-mz defaultyz{|B Ldisabledi2s@fe430000,rockchip,rk3568-i2s-tdm C ]7SW<mclk_txmclk_rxhclk0tt wtxrx'UV tx-mrx-mz B Ldisabledpdm@fe440000,rockchip,rk3568-pdm D ]LZYpdm_clkpdm_hclk0t  wrx}~default'Xpdm-mB Ldisabledspdif@fe460000,rockchip,rk3568-spdif F ]f mclkhclk_\0t wtxdefaultB Ldisableddma-controller@fe530000,arm,pl330arm,primecell S@]    apb_pclk 'dma-controller@fe550000,arm,pl330arm,primecell U@]   apb_pclk ti2c@fe5a0000(,rockchip,rk3568-i2crockchip,rk3399-i2c Z ]/HG i2cpclkdefault  Ldisabledi2c@fe5b0000(,rockchip,rk3568-i2crockchip,rk3399-i2c [ ]0JI i2cpclkdefault  Ldisabledi2c@fe5c0000(,rockchip,rk3568-i2crockchip,rk3399-i2c \ ]1LK i2cpclkdefault  Ldisabledi2c@fe5d0000(,rockchip,rk3568-i2crockchip,rk3399-i2c ] ]2NM i2cpclkdefault  Ldisabledi2c@fe5e0000(,rockchip,rk3568-i2crockchip,rk3399-i2c ^ ]3PO i2cpclkdefault Lokayrtc@51,haoyu,hym8563 Q#] rtcic_32koutdefaultkwatchdog@fe600000 ,rockchip,rk3568-wdtsnps,dw-wdt ` ] tclkpclkspi@fe610000(,rockchip,rk3568-spirockchip,rk3066-spi a ]gRQspiclkapb_pclk0'' wtxrxdefault   Ldisabledspi@fe620000(,rockchip,rk3568-spirockchip,rk3066-spi b ]hTSspiclkapb_pclk0'' wtxrxdefault   Ldisabledspi@fe630000(,rockchip,rk3568-spirockchip,rk3066-spi c ]iVUspiclkapb_pclk0'' wtxrxdefault   Ldisabledspi@fe640000(,rockchip,rk3568-spirockchip,rk3066-spi d ]jXWspiclkapb_pclk0'' wtxrxdefault   Ldisabledserial@fe650000&,rockchip,rk3568-uartsnps,dw-apb-uart e ]ubaudclkapb_pclk0''default5B Ldisabledserial@fe660000&,rockchip,rk3568-uartsnps,dw-apb-uart f ]v# baudclkapb_pclk0''default5BLokayserial@fe670000&,rockchip,rk3568-uartsnps,dw-apb-uart g ]w'$baudclkapb_pclk0''default5B Ldisabledserial@fe680000&,rockchip,rk3568-uartsnps,dw-apb-uart h ]x+(baudclkapb_pclk0'' default5B Ldisabledserial@fe690000&,rockchip,rk3568-uartsnps,dw-apb-uart i ]y/,baudclkapb_pclk0' ' default5B Ldisabledserial@fe6a0000&,rockchip,rk3568-uartsnps,dw-apb-uart j ]z30baudclkapb_pclk0' ' default5B Ldisabledserial@fe6b0000&,rockchip,rk3568-uartsnps,dw-apb-uart k ]{74baudclkapb_pclk0''default5B Ldisabledserial@fe6c0000&,rockchip,rk3568-uartsnps,dw-apb-uart l ]|;8baudclkapb_pclk0'' default5B Ldisabled serial@fe6d0000&,rockchip,rk3568-uartsnps,dw-apb-uart m ]}?<baudclkapb_pclk0''default5B Ldisabledthermal-zonescpu-thermal d  tripscpu_alert0 p passivecpu_alert1 $ passivecpu_crit s  criticalcooling-mapsmap0 0  gpu-thermal   tripsgpu-threshold p passivegpu-target $ passivegpu-crit s  criticalcooling-mapsmap0  tsadc@fe710000,rockchip,rk3568-tsadc q ]s>Nf@ `tsadcapb_pclk'z  -sdefaultsleep D NLokay d {saradc@fe720000.,rockchip,rk3568-saradcrockchip,rk3399-saradc r ]]saradcapb_pclk' saradc-apb Lokay pwm@fe6e0000(,rockchip,rk3568-pwmrockchip,rk3328-pwm nZY pwmpclkdefaultL Ldisabledpwm@fe6e0010(,rockchip,rk3568-pwmrockchip,rk3328-pwm nZY pwmpclkdefaultL Ldisabledpwm@fe6e0020(,rockchip,rk3568-pwmrockchip,rk3328-pwm n ZY pwmpclkdefaultL Ldisabledpwm@fe6e0030(,rockchip,rk3568-pwmrockchip,rk3328-pwm n0ZY pwmpclkdefaultL Ldisabledpwm@fe6f0000(,rockchip,rk3568-pwmrockchip,rk3328-pwm o]\ pwmpclkdefaultL Ldisabledpwm@fe6f0010(,rockchip,rk3568-pwmrockchip,rk3328-pwm o]\ pwmpclkdefaultL Ldisabledpwm@fe6f0020(,rockchip,rk3568-pwmrockchip,rk3328-pwm o ]\ pwmpclkdefaultL Ldisabledpwm@fe6f0030(,rockchip,rk3568-pwmrockchip,rk3328-pwm o0]\ pwmpclkdefaultL Ldisabledpwm@fe700000(,rockchip,rk3568-pwmrockchip,rk3328-pwm p`_ pwmpclkdefaultL Ldisabledpwm@fe700010(,rockchip,rk3568-pwmrockchip,rk3328-pwm p`_ pwmpclkdefaultL Ldisabledpwm@fe700020(,rockchip,rk3568-pwmrockchip,rk3328-pwm p `_ pwmpclkdefaultL Ldisabledpwm@fe700030(,rockchip,rk3568-pwmrockchip,rk3328-pwm p0`_ pwmpclkdefaultL Ldisabledphy@fe830000,rockchip,rk3568-naneng-combphy "} refapbpipe>"N'phy   Lokayphy@fe840000,rockchip,rk3568-naneng-combphy %~ refapbpipe>%N'phy   Lokayphy@fe870000,rockchip,rk3568-csi-dphy ypclk 'apbz  Ldisabledmipi-dphy@fe850000,rockchip,rk3568-dsi-dphy  refpclkz  apb' Ldisabled]mipi-dphy@fe860000,rockchip,rk3568-dsi-dphy  refpclk{  apb' Ldisabled^usb2phy@fe8a0000,rockchip,rk3568-usb2phy phyclkclk_usbphy0_480m ] Lokayhost-port Lokayotg-port Lokayusb2phy@fe8b0000,rockchip,rk3568-usb2phy phyclkclk_usbphy1_480m ] Lokayhost-port  Ldisabledotg-port Lokaypinctrl,rockchip,rk3568-pinctrlz f {gpio@fdd60000,rockchip,gpio-bank  ]!.     Nc#gpio@fe740000,rockchip,gpio-bank t ]"cd    Ncgpio@fe750000,rockchip,gpio-bank u ]#ef  @  Ncgpio@fe760000,rockchip,gpio-bank v ]$gh  `  NcZgpio@fe770000,rockchip,gpio-bank w ]%ij    Ncpcfg-pull-up pcfg-pull-none ,pcfg-pull-none-drv-level-1 , 9pcfg-pull-none-drv-level-2 , 9pcfg-pull-none-drv-level-3 , 9pcfg-pull-up-drv-level-1  9pcfg-pull-up-drv-level-2  9pcfg-pull-none-smt , Hacodecaudiopwmbt656bt1120camcan0can0m0-pins ]  can1can1m0-pins ]can2can2m0-pins ]  cifclk32kclk32k-out0 ]cpuebcedpdpemmcemmc-bus8 ]  pemmc-clk ]qemmc-cmd ]remmc-datastrobe ]seth0eth1flashfspifspi-pins` ]ogmac0gmac0-miim ]gmac0-clkinout ]gmac0-rx-bus20 ]gmac0-tx-bus20 ]   gmac0-rgmii-clk ]gmac0-rgmii-bus@ ]gmac1gmac1m1-miim ]Tgmac1m1-clkinout ]Ygmac1m1-rx-bus20 ] Vgmac1m1-tx-bus20 ]Ugmac1m1-rgmii-clk ]Wgmac1m1-rgmii-bus@ ]Xgpuhdmitxhdmitxm0-cec ]ahdmitx-scl ]_hdmitx-sda ]`i2c0i2c0-xfer ]  !i2c1i2c1-xfer ]  i2c2i2c2m0-xfer ] i2c3i2c3m0-xfer ]i2c4i2c4m0-xfer ]  i2c5i2c5m0-xfer ]  i2s1i2s1m0-lrcktx ]vi2s1m0-mclk ]%i2s1m0-sclktx ]ui2s1m0-sdi0 ] wi2s1m0-sdo0 ]xi2s2i2s2m0-lrcktx ]zi2s2m0-sclktx ]yi2s2m0-sdi ]{i2s2m0-sdo ]|i2s3ispjtaglcdcmcunpupcie20pcie20m1-pins0 ]ipcie30x1pcie30x2pcie30x2m1-pins0 ]pdmpdmm0-clk ]}pdmm0-clk1 ]~pdmm0-sdi0 ] pdmm0-sdi1 ] pdmm0-sdi2 ] pdmm0-sdi3 ]pmicpmic-int-l ]$pmupwm0pwm0m0-pins ])pwm1pwm1m0-pins ]*pwm2pwm2m0-pins ]+pwm3pwm3-pins ],pwm4pwm4-pins ]pwm5pwm5-pins ]pwm6pwm6-pins ]pwm7pwm7-pins ]pwm8pwm8m0-pins ] pwm9pwm9m0-pins ] pwm10pwm10m0-pins ] pwm11pwm11m0-pins ]pwm12pwm12m0-pins ]pwm13pwm13m0-pins ]pwm14pwm14m0-pins ]pwm15pwm15m0-pins ]refclksatasata0sata1sata2scrsdmmc0sdmmc0-bus4@ ]jsdmmc0-clk ]ksdmmc0-cmd ]lsdmmc0-det ]msdmmc1sdmmc2sdmmc2m0-bus4@ ]Lsdmmc2m0-clk ]Msdmmc2m0-cmd ]Nspdifspdifm0-tx ]spi0spi0m0-pins0 ] spi0m0-cs0 ]spi0m0-cs1 ]spi1spi1m0-pins0 ] spi1m0-cs0 ]spi1m0-cs1 ]spi2spi2m0-pins0 ]spi2m0-cs0 ]spi2m0-cs1 ]spi3spi3m0-pins0 ]  spi3m0-cs0 ]spi3m0-cs1 ]tsadctsadc-shutorg ]tsadc-pin ]uart0uart0-xfer ](uart1uart1m0-xfer ]  uart2uart2m0-xfer ]uart3uart3m0-xfer ]uart4uart4m0-xfer ]uart5uart5m0-xfer ]uart6uart6m0-xfer ]uart7uart7m0-xfer ]uart8uart8m0-xfer ]uart8m0-ctsn ] uart8m0-rtsn ] uart9uart9m0-xfer ]vopspi0-hsspi1-hsspi2-hsspi3-hsgmac-txd-level3gmac-txc-level2bluetoothbt-reg-on-h ] bt-wake-host-h ] host-wake-bt-h ] ir-receiverpwm3-ir ]ledsled ]pciepcie-pwren-h ]rtcrtcic-int-l ]usbusb-host-pwren-h ]usb-otg-pwren-h ]wifiwifi-reg-on-h ]wifi-wake-host-h ]opp-table-0,operating-points-v2 kopp-408000000 vQ } P P0 @opp-600000000 v#F } P P0 @opp-816000000 v0, } P P0 @ opp-1104000000 vAʹ } 0 @opp-1416000000 vTfr }0 @opp-1608000000 v_" }0 @opp-1800000000 vkI }000 @opp-1992000000 vv }000 @opp-table-1,operating-points-v2Gopp-200000000 v  } P PB@opp-300000000 v } P PB@opp-400000000 vׄ } P PB@opp-600000000 v#F } B@opp-700000000 v)' }~~B@opp-800000000 v/ }B@B@B@sata@fc000000',rockchip,rk3568-dwc-ahcisnps,dwc-ahci satapmaliverxoob ]^ sata-phy Ldisabledsyscon@fdc70000$,rockchip,rk3568-pipe-phy-grfsyscon qos@fe190080,rockchip,rk3568-qossyscon  @qos@fe190100,rockchip,rk3568-qossyscon  Aqos@fe190200,rockchip,rk3568-qossyscon  Bsyscon@fdcb8000%,rockchip,rk3568-pcie3-phy-grfsyscon ˀphy@fe8c0000,rockchip,rk3568-pcie3-phy  &'wrefclk_mrefclk_npclk'phy Lokaypcie@fe270000,rockchip,rk3568-pcie ($aclk_mstaclk_slvaclk_dbipclkauxpci<]rsyspmcmsglegacyerrc`h pcie-phy0 @@'T{ @@@Edbiapbconfig'pipe Ldisabledlegacy-interrupt-controllerNc ]pcie@fe280000,rockchip,rk3568-pcie  /($aclk_mstaclk_slvaclk_dbipclkauxpci<]rsyspmcmsglegacyerrc` h  pcie-phy0 @(T{ @@Edbiapbconfig'pipeLokaydefault legacy-interrupt-controllerNc ]ethernet@fe2a0000&,rockchip,rk3568-gmacsnps,dwmac-4.20a *]rmacirqeth_wake_irq@Wstmmacethmac_clk_rxmac_clk_txclk_mac_refoutaclk_macpclk_macclk_mac_speedptp_ref' stmmacethz EUfyLokay>cinput rgmii-iddefaultmdio,snps,dwmac-mdio ethernet-phy@1,ethernet-phy-ieee802.3-c22 N P Zstmmac-axi-config rx-queues-configqueue0tx-queues-config/queue0can@fe570000,rockchip,rk3568v2-canfd W ]A@ baudpclk'UT coreapbdefault Ldisabledcan@fe580000,rockchip,rk3568v2-canfd X ]CB baudpclk'WV coreapbdefault Ldisabledcan@fe590000,rockchip,rk3568v2-canfd Y ]ED baudpclk'YX coreapbdefault Ldisabledphy@fe820000,rockchip,rk3568-naneng-combphy | refapbpipe>N'phy   Lokaychosen serial2:1500000n8hdmi-con,hdmi-connectoraportendpointOeir-receiver,gpio-ir-receiver #defaultleds ,gpio-ledsdefaultled-0  on heartbeat # heartbeatregulator-3v3-vcc-pi6c-03,regulator-fixed  #defaultvcc3v3_pi6c_032Z2Z '"regulator-3v3-vcc-sys,regulator-fixed vcc3v3_sys2Z2Z"&regulator-3v3-vcc-sys2,regulator-fixed vcc3v3_sys22Z2Z"Oregulator-5v0-vcc-sys,regulator-fixed vcc5v0_sysLK@LK@"regulator-5v0-vcc-usb-host,regulator-fixed  #defaultvcc5v0_usb_hostLK@LK@"regulator-5v0-vcc-usb-otg,regulator-fixed  #defaultvcc5v0_usb_otgLK@LK@"sdio-pwrseq,mmc-pwrseq-simple ext_clockdefault d 3LK@ ZKsound,simple-audio-cardi2s Analog RK8092simple-audio-card,cpuSsimple-audio-card,codecS interrupt-parent#address-cells#size-cellscompatiblemodelgpio0gpio1gpio2gpio3gpio4i2c0i2c1i2c2i2c3i2c4i2c5serial0serial1serial2serial3serial4serial5serial6serial7serial8serial9spi0spi1spi2spi3ethernet0ethernet1mmc0mmc1mmc2device_typeregclocks#cooling-cellsenable-methodi-cache-sizei-cache-line-sizei-cache-setsd-cache-sized-cache-line-sized-cache-setsnext-level-cacheoperating-points-v2cpu-supplyphandlecache-levelcache-unifiedportsarm,smc-idshmem#clock-cellssimple-audio-card,namesimple-audio-card,formatsimple-audio-card,mclk-fsstatussound-daiinterruptsinterrupt-affinityrangesno-maparm,no-tick-in-suspendclock-frequencyclock-output-namespinctrl-0pinctrl-namesclock-namesphysphy-namesports-implementedpower-domainsdr_modephy_typeresetssnps,dis_u2_susphy_quirkextconinterrupt-controller#interrupt-cellsmbi-aliasmbi-rangesmsi-controllerdma-noncoherent#msi-cellspmuio1-supplypmuio2-supplyvccio1-supplyvccio2-supplyvccio3-supplyvccio4-supplyvccio5-supplyvccio6-supplyvccio7-supply#reset-cellsassigned-clocksassigned-clock-ratesassigned-clock-parentsrockchip,grffcs,suspend-voltage-selectorregulator-nameregulator-always-onregulator-boot-onregulator-min-microvoltregulator-max-microvoltregulator-ramp-delayvin-supplyregulator-off-in-suspend#sound-dai-cellssystem-power-controllerwakeup-sourcevcc1-supplyvcc2-supplyvcc3-supplyvcc4-supplyvcc5-supplyvcc6-supplyvcc7-supplyvcc8-supplyvcc9-supplyregulator-initial-moderegulator-on-in-suspendregulator-suspend-microvoltdmasreg-io-widthreg-shift#pwm-cells#power-domain-cellspm_qosinterrupt-namesmali-supplyiommus#iommu-cellsreset-namesfifo-depthmax-frequencybus-widthcap-sd-highspeedcap-sdio-irqkeep-power-in-suspendmmc-pwrseqnon-removablesd-uhs-sdr104vmmc-supplyvqmmc-supplysnps,axi-configsnps,mixed-burstsnps,mtl-rx-configsnps,mtl-tx-configsnps,tsoclock_in_outphy-handlephy-modephy-supplyreset-assert-usreset-deassert-usreset-gpiossnps,blensnps,rd_osr_lmtsnps,wr_osr_lmtsnps,rx-queues-to-usesnps,tx-queues-to-usereg-namesremote-endpointavdd-0v9-supplyavdd-1v8-supplyrockchip,pmubus-rangeinterrupt-map-maskinterrupt-maplinux,pci-domainnum-ib-windowsnum-ob-windowsmax-link-speedmsi-mapnum-lanesvpcie3v3-supplydisable-wpspi-max-frequencyspi-rx-bus-widthspi-tx-bus-widthcap-mmc-highspeedmmc-hs200-1_8vdma-namesrockchip,trcm-sync-tx-onlyarm,pl330-periph-burst#dma-cellsuart-has-rtsctspolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresistripcooling-devicerockchip,hw-tshut-temppinctrl-1#thermal-sensor-cellsrockchip,hw-tshut-moderockchip,hw-tshut-polarity#io-channel-cellsvref-supplyrockchip,pipe-grfrockchip,pipe-phy-grf#phy-cellsrockchip,usbgrfgpio-controllergpio-ranges#gpio-cellsbias-pull-upbias-disabledrive-strengthinput-schmitt-enablerockchip,pinsopp-sharedopp-hzopp-microvoltclock-latency-nsopp-suspendrockchip,phy-grfstdout-pathcolordefault-statefunctionlinux,default-triggerenable-active-highstartup-delay-uspost-power-on-delay-mspower-off-delay-us