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(N) $ )pll1-refclk$*N+ $+refclk-dig $ $(*N, $ ,cmn-refclk-dig-div,N.cmn-refclk1-dig-div+N/serdes@5000000ti,sierra-phy-t0%serdesM"1N6- sierra_reset./)+?cmn_refclk_dig_divcmn_refclk1_dig_divpll0_refclkpll1_refclkphy@0Mh6-wiz@5010000ti,j721e-wiz-16g"1 %%% (fckcore_ref_clkext_ref_clk% %%%u[3pll0-refclk% (N0 % 0pll1-refclk%*N1 %1refclk-dig % %(*N2 % 2cmn-refclk-dig-div2N4cmn-refclk1-dig-div1N5serdes@5010000ti,sierra-phy-t0%serdesM"1N63 sierra_reset4501?cmn_refclk_dig_divcmn_refclk1_dig_divpll0_refclkpll1_refclkphy@0Mh633Gwiz@5020000ti,j721e-wiz-16g"1 &&& (fckcore_ref_clkext_ref_clk& &&&u[9pll0-refclk& (N6 & 6pll1-refclk&*N7 &7refclk-dig & &(*N8 & 8cmn-refclk-dig-div8N:cmn-refclk1-dig-div7N;serdes@5020000ti,sierra-phy-t0%serdesM"1N69 sierra_reset:;67?cmn_refclk_dig_divcmn_refclk1_dig_divpll0_refclkpll1_refclkphy@1Mh69Wwiz@5030000ti,j721e-wiz-16g"1 ''' (fckcore_ref_clkext_ref_clk' '' 'u[ <@pll0-refclk' (N= ' =pll1-refclk'*N> '>refclk-dig ' '(*N? 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%mpudat67txrx~Etxrx fck  disabledwatchdog@2200000ti,j7-rti-wdtM     watchdog@2210000ti,j7-rti-wdtM!    r5fss@5c00000ti,j721e-r5fss"1  r5f@5c00000 ti,j721e-r5fM %atcmbtcm & 6=j7-main-r5f0_0-fwKZideufgr5f@5d00000 ti,j721e-r5fM %atcmbtcm & 6=j7-main-r5f0_1-fwKZidhuijr5fss@5e00000ti,j721e-r5fss"1  r5f@5e00000 ti,j721e-r5fM %atcmbtcm & 6=j7-main-r5f1_0-fwKZiklumnr5f@5f00000 ti,j721e-r5fM %atcmbtcm &  6=j7-main-r5f1_1-fwKZikoupqdsp@4d80800000ti,j721e-c66-dsp0MMMM%l2sraml1praml1dram & 6 =j7-c66_0-fwokayrsutudsp@4d81800000ti,j721e-c66-dsp0MMMM%l2sraml1praml1dram & 6 =j7-c66_1-fwokayrvuwxdsp@64800000ti,j721e-c71-dsp Mdd%l2sraml1dram &0 6 =j7-c71_0-fwokayyzu{|icssg@b000000ti,j721e-icssgM  w"1 memories@0M %dram0dram1shrdram2cfg@26000ti,pruss-cfgsysconM`"1 ` clocks"1coreclk-mux@3cM<Nww} w}iepclk-mux@30M0Nw}~}~mii-rt@32000ti,pruss-miisysconM mii-g-rt@33000ti,pruss-mii-gsysconM0interrupt-controller@20000ti,icssg-intcM y`Xhost_intr0host_intr1host_intr2host_intr3host_intr4host_intr5host_intr6host_intr7pru@34000 ti,j721e-pruM@0 $%iramcontroldebug =j7-pru0_0-fwrtu@4000 ti,j721e-rtuM@ 04%iramcontroldebug =j7-rtu0_0-fwtxpru@a000ti,j721e-tx-pruMPT%iramcontroldebug=j7-txpru0_0-fwpru@38000 ti,j721e-pruM0@D%iramcontroldebug =j7-pru0_1-fwrtu@6000 ti,j721e-rtuM` 8<%iramcontroldebug =j7-rtu0_1-fwtxpru@c000ti,j721e-tx-pruMX\%iramcontroldebug=j7-txpru0_1-fwmdio@32400ti,davinci_mdioM$ wfck"1B@ disabledicssg@b100000ti,j721e-icssgM  x"1 memories@b100000M %dram0dram1shrdram2cfg@26000ti,pruss-cfgsysconM`"1 ` clocks"1coreclk-mux@3cM<Nx6x xiepclk-mux@30M0Nx mii-rt@32000ti,pruss-miisysconM mii-g-rt@33000ti,pruss-mii-gsysconM0interrupt-controller@20000ti,icssg-intcM y`     Xhost_intr0host_intr1host_intr2host_intr3host_intr4host_intr5host_intr6host_intr7pru@34000 ti,j721e-pruM@@ $%iramcontroldebug =j7-pru1_0-fwrtu@4000 ti,j721e-rtuM@ 04%iramcontroldebug =j7-rtu1_0-fwtxpru@a000ti,j721e-tx-pruMPT%iramcontroldebug=j7-txpru1_0-fwpru@38000 ti,j721e-pruM@@D%iramcontroldebug =j7-pru1_1-fwrtu@6000 ti,j721e-rtuM` 8<%iramcontroldebug =j7-rtu1_1-fwtxpru@c000ti,j721e-tx-pruMX\%iramcontroldebug=j7-txpru1_1-fwmdio@32400ti,davinci_mdioM$ xfck"1B@ disabledcan@2701000 bosch,m_can Mpp%m_canmessage_ram  hclkcclk|} int0int1 @@@@  disabledcan@2711000 bosch,m_can Mqq%m_canmessage_ram  hclkcclk int0int1 @@@@  disabledcan@2721000 bosch,m_can Mrr%m_canmessage_ram  hclkcclk int0int1 @@@@  disabledcan@2731000 bosch,m_can Mss%m_canmessage_ram  hclkcclk int0int1 @@@@  disabledcan@2741000 bosch,m_can Mtt%m_canmessage_ram  hclkcclk int0int1 @@@@  disabledcan@2751000 bosch,m_can Muu%m_canmessage_ram  hclkcclk int0int1 @@@@  disabledcan@2761000 bosch,m_can Mvv%m_canmessage_ram  hclkcclk int0int1 @@@@  disabledcan@2771000 bosch,m_can Mww%m_canmessage_ram  hclkcclk int0int1 @@@@  disabledcan@2781000 bosch,m_can Mxx%m_canmessage_ram  hclkcclk@A int0int1 @@@@  disabledcan@2791000 bosch,m_can Myy%m_canmessage_ram  hclkcclkCD int0int1 @@@@  disabledcan@27a1000 bosch,m_can Mzz%m_canmessage_ram  hclkcclkFG int0int1 @@@@  disabledcan@27b1000 bosch,m_can M{{%m_canmessage_ram  hclkcclkIJ int0int1 @@@@  disabledcan@27c1000 bosch,m_can M||%m_canmessage_ram  hclkcclkLM int0int1 @@@@  disabledcan@27d1000 bosch,m_can M}}%m_canmessage_ram  hclkcclkOP int0int1 @@@@  disabledspi@2100000ti,am654-mcspiti,omap4-mcspiM "1     disabledspi@2110000ti,am654-mcspiti,omap4-mcspiM "1     disabledspi@2120000ti,am654-mcspiti,omap4-mcspiM "1     disabledspi@2130000ti,am654-mcspiti,omap4-mcspiM "1     disabledspi@2140000ti,am654-mcspiti,omap4-mcspiM "1   disabledspi@2150000ti,am654-mcspiti,omap4-mcspiM "1   disabledspi@2160000ti,am654-mcspiti,omap4-mcspiM "1   disabledspi@2170000ti,am654-mcspiti,omap4-mcspiM "1   disabledesm@700000 ti,j721e-esmMp XYthermal-zoneswkup-thermal   tripswkup-crit H  Xcriticalmpu-thermal   tripsmpu-crit H  Xcriticalc7x-thermal   tripsc7x-crit H  Xcriticalgpu-thermal   tripsgpu-crit H  Xcriticalr5f-thermal   tripsr5f-crit H  Xcriticalclock-cmnrefclkN fixed-clock<(clock-cmnrefclk1N fixed-clock<*aliases) /bus@100000/bus@28380000/serial@42300000 /bus@100000/serial@2800000 /bus@100000/mmc@4f80000 /bus@100000/mmc@4fb0000& /bus@100000/bus@28380000/i2c@42120000 /bus@100000/i2c@2060000 /bus@100000/i2c@2020000 /bus@100000/i2c@2040000memory@80000000Qmemory Mreserved-memory"1optee@9e800000M r5f-dma-memory@a0000000shared-dma-poolM r5f-memory@a0100000shared-dma-poolM r5f-dma-memory@a1000000shared-dma-poolM !r5f-memory@a1100000shared-dma-poolM "r5f-dma-memory@a2000000shared-dma-poolM fr5f-memory@a2100000shared-dma-poolM gr5f-dma-memory@a3000000shared-dma-poolM ir5f-memory@a3100000shared-dma-poolM jr5f-dma-memory@a4000000shared-dma-poolM mr5f-memory@a4100000shared-dma-poolM nr5f-dma-memory@a5000000shared-dma-poolM pr5f-memory@a5100000shared-dma-poolM qc66-dma-memory@a6000000shared-dma-poolM tc66-memory@a6100000shared-dma-poolM uc66-dma-memory@a7000000shared-dma-poolM wc66-memory@a7100000shared-dma-poolM xc71-dma-memory@a8000000shared-dma-poolM {c71-memory@a8100000shared-dma-poolM |ipc-memories@aa000000M " gpio-keys gpio-keysLdefaultZbutton-1hBOOT , button-2hPOWER ,t leds gpio-ledsLdefaultZled-0 H` 7heartbeat @heartbeatled-1 H_ 7disk-activity @mmc0led-2 Ha 7cpu @cpuled-3 Hn 7disk-activity @mmc1led-4 Hm 7wlan Voffregulator-0regulator-fixed devm_12v0 s   regulator-1regulator-fixed dvsys_3v3 s2Z 2Z   regulator-2regulator-fixed dvsys_5v0 sLK@ LK@   regulator-3regulator-fixedLdefaultZ dvdd_mmc1 s2Z 2Z    HRPregulator-4regulator-gpioLdefaultZ dtlv71033 sw@ 2Z   Huw@2ZQregulator-5regulator-fixedLdefaultZ ddp-pwr s2Z 2Z H1 connector dp-connectorhDP0 Xfull-size portendpoint b modelcompatibleinterrupt-parent#address-cells#size-cellsstdout-pathcpuregdevice_typeenable-methodi-cache-sizei-cache-line-sizei-cache-setsd-cache-sized-cache-line-sized-cache-setsnext-level-cachephandlecache-levelcache-unifiedinterruptsrangesti,host-idmbox-namesmboxesreg-names#power-domain-cellsbootph-all#clock-cells#reset-cells#phy-cells#pinctrl-cellspinctrl-single,register-widthpinctrl-single,function-maskpinctrl-single,pinsstatusclocksclock-namesassigned-clocksassigned-clock-parentspower-domainsbootph-pre-ramti,timer-pwmclock-frequencypinctrl-namespinctrl-0ti,intr-trigger-typeinterrupt-controller#interrupt-cellsti,sciti,sci-dev-idti,interrupt-rangesgpio-controller#gpio-cellsti,ngpioti,davinci-gpio-unbanked#mux-control-cellsmux-reg-masksassigned-clock-ratesmux-controlscdns,fifo-depthcdns,fifo-widthcdns,trigger-addressdmasdma-names#io-channel-cellsti,adc-channelsdma-coherentdma-rangesti,num-ringsti,sci-rm-range-gp-ringsmsi-parent#dma-cellsti,ringaccti,sci-rm-range-tchanti,sci-rm-range-rchanti,sci-rm-range-rflow#mbox-cellsti,mac-onlylabelti,syscon-efusephysphy-modephy-handlebus_freqti,rx-internal-delayti,fifo-depthinterrupts-extendedinterrupt-namesti,cpts-ext-ts-inputsti,cpts-periodic-outputsti,cluster-modeti,sci-proc-idsresetsfirmware-nameti,atcm-enableti,btcm-enableti,loczramamemory-regionbosch,mram-cfg#thermal-sensor-cellsti,esm-pinsidle-statesti,qsgmii-main-ports#pwm-cellssocionext,synquacer-pre-itsmsi-controller#msi-cells#iommu-cells#hwlock-cellsti,mbox-num-usersti,mbox-num-fifosti,mbox-rxti,mbox-txphy-namesnum-lanesreset-namescdns,num-lanescdns,phy-typetypec-dir-gpiostypec-dir-debounce-msti,syscon-pcie-ctrlmax-link-speedbus-rangevendor-iddevice-idmsi-mapreset-gpioscdns,max-bit-ratebus-widthmmc-hs200-1_8vmmc-ddr-1_8vti,otap-del-sel-legacyti,otap-del-sel-mmc-hsti,otap-del-sel-ddr52ti,otap-del-sel-hs200ti,otap-del-sel-hs400ti,itap-del-sel-legacyti,itap-del-sel-mmc-hsti,itap-del-sel-ddr52ti,trm-icpnon-removableti,driver-strength-ohmdisable-wpti,otap-del-sel-sd-hsti,otap-del-sel-sdr12ti,otap-del-sel-sdr25ti,otap-del-sel-sdr50ti,otap-del-sel-ddr50ti,otap-del-sel-sdr104ti,itap-del-sel-sd-hsti,itap-del-sel-sdr12ti,itap-del-sel-sdr25ti,itap-del-sel-ddr50ti,clkbuf-selsdhci-caps-maskvmmc-supplyvqmmc-supplyti,vbus-dividermaximum-speeddr_modefreq-table-hzremote-endpointpolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresisserial0serial2mmc0mmc1i2c0i2c1i2c2i2c3no-mapalignmentlinux,codefunctionlinux,default-triggerdefault-stateregulator-nameregulator-min-microvoltregulator-max-microvoltregulator-always-onregulator-boot-onvin-supplyenable-active-highdp-pwr-supply