o(8hP(h (,hardkernel,odroid-c2amlogic,meson-gxbb7Hardkernel ODROID-C2aliases=/soc/apb@d0000000/mmc@72000B/soc/apb@d0000000/mmc@74000G/soc/apb@d0000000/mmc@70000L/soc/bus@c8100000/serial@4c0T/soc/ethernet@c9410000reserved-memory ^hwrom@0eisecmon@10000000e isecmon@5000000e0isecmon@5300000e0ilinux,cma,shared-dma-poolpy~@chosen ^serial0:115200n8framebuffer-cvbs.,amlogic,simple-framebuffersimple-framebuffer vpu-cvbs disabledframebuffer-hdmi.,amlogic,simple-framebuffersimple-framebuffer vpu-hdmi disabled? Mcpus cpu@0cpu,arm,cortex-a53epsci cpu@1cpu,arm,cortex-a53epsci cpu@2cpu,arm,cortex-a53epsci cpu@3cpu,arm,cortex-a53epsci l2-cache0,cache! thermal-zonescpu-thermal/EStripscpu-passivec8opassive cpu-hotc_ohot cpu-criticalco criticalcooling-mapsmap0z0 map1z 0 arm-pmu,arm,cortex-a53-pmu0 psci ,arm,psci-0.2smctimer,arm,armv8-timer0   xtal-clk ,fixed-clockn6xtal firmwaresecure-monitor*,amlogic,meson-gx-smamlogic,meson-gxbb-sm efuse0,amlogic,meson-gx-efuseamlogic,meson-gxbb-efuse  :sn@14eeth-mac@34e4bid@46eF0scpi),amlogic,meson-gxbb-scpiarm,scpi-pre-1.0clocks,arm,scpi-clocks disabledclocks-0,arm,scpi-dvfs-clocksvcpu sensors1,amlogic,meson-gxbb-scpi-sensorsarm,scpi-sensors soc ,simple-bus ^bus@c1100000 ,simple-buse ^interrupt-controller@98805,amlogic,meson-gxbb-gpio-intcamlogic,meson-gpio-intce&; L@ABCDEFGokay !reset-controller@4404,amlogic,meson-gxbb-reseteDg audio-controller@5400,amlogic,aiu-gxbbamlogic,aiutAIUeT02 i2sspdifokayH&(Pk,'Qnq\pclki2s_pclki2s_aoclki2s_mclki2s_mixerspdif_pclkspdif_aoclkspdif_mclkspdif_mclk_sel 9serial@84c0,amlogic,meson-gx-uarte  disabledxtalpclkbaudserial@84dc,amlogic,meson-gx-uarte K disabled0xtalpclkbaudi2c@8500,amlogic,meson-gxbb-i2ce   okaydefaultpwm@8550,,amlogic,meson-gx-pwmamlogic,meson-gxbb-pwmeP disabledpwm@8650,,amlogic,meson-gx-pwmamlogic,meson-gxbb-pwmeP disabledadc@8680/,amlogic,meson-gxbb-saradcamlogic,meson-saradce4 Iokayabclkincoreadc_clkadc_selpwm@86c0,,amlogic,meson-gx-pwmamlogic,meson-gxbb-pwme disabledserial@8700,amlogic,meson-gx-uarte ] disabledDxtalpclkbaudclock-measure@8758,amlogic,meson-gx-clk-measureeXi2c@87c0,amlogic,meson-gxbb-i2ce    disabledi2c@87e0,amlogic,meson-gxbb-i2ce    disabledspi@8d80,amlogic,meson-gx-spicce Q  disabledcorespi@8c80,amlogic,meson-gxbb-spifce  disabled"watchdog@98d0,amlogic,meson-gxbb-wdteinterrupt-controller@c4301000 ,arm,gic-400@e00 0@ 0` &  ; sram@c8000000 ,mmio-srame@ ^@scp-sram@0,amlogic,meson-gxbb-scp-shmeme0 scp-sram@200,amlogic,meson-gxbb-scp-shmeme4 bus@c8100000 ,simple-buse ^sys-ctrl@0.,amlogic,meson-gx-ao-sysctrlsimple-mfdsyscone clock-controller2,amlogic,meson-gxbb-aoclkcamlogic,meson-gx-aoclkcg  xtalmpeg-clk cec@100,amlogic,meson-gx-ao-cece okaycoredefault ao-secure@140",amlogic,meson-gx-ao-securesyscone@@serial@4c0,,amlogic,meson-gx-uartamlogic,meson-ao-uarte okayxtalpclkbauddefaultserial@4e0,,amlogic,meson-gx-uartamlogic,meson-ao-uarte  disabledxtalpclkbaudi2c@500,amlogic,meson-gxbb-i2ce    disabled]pwm@5502,amlogic,meson-gx-ao-pwmamlogic,meson-gxbb-ao-pwmeP disabledir@580*,amlogic,meson-gx-iramlogic,meson-gxbb-ire@ okaydefault -rc-odroidpinctrl@14!,amlogic,meson-gxbb-aobus-pinctrl ^ bank@140e,$?muxpullgpioIYeqUART TXUART RXVCCK EnTF 3V3/1V8 EnUSB HUB nRESETUSB OTG Power EnJ7 Header Pin2IR InJ7 Header Pin4J7 Header Pin6J7 Header Pin5J7 Header Pin7HDMI CECSYS LED 6uart_ao_a muxuart_tx_ao_auart_rx_ao_auart_aouart_ao_a_cts_rtsmuxuart_cts_ao_auart_rts_ao_auart_aouart_ao_bmuxuart_tx_ao_buart_rx_ao_b uart_ao_buart_ao_b_cts_rtsmuxuart_cts_ao_buart_rts_ao_b uart_ao_bremote_input_ao muxremote_input_aoremote_input_aoi2c_aomuxi2c_sck_aoi2c_sda_aoi2c_aopwm_ao_a_3mux pwm_ao_a_3 pwm_ao_a_3pwm_ao_a_6mux pwm_ao_a_6 pwm_ao_a_6pwm_ao_a_12mux pwm_ao_a_12 pwm_ao_a_12pwm_ao_bmux pwm_ao_b pwm_ao_bi2s_am_clkmux i2s_am_clk i2s_out_aoi2s_out_ao_clkmuxi2s_out_ao_clk i2s_out_aoi2s_out_lr_clkmuxi2s_out_lr_clk i2s_out_aoi2s_out_ch01_aomuxi2s_out_ch01_ao i2s_out_aoi2s_out_ch23_aomuxi2s_out_ch23_ao i2s_out_aoi2s_out_ch45_aomuxi2s_out_ch45_ao i2s_out_aospdif_out_ao_6muxspdif_out_ao_6 spdif_out_aospdif_out_ao_13muxspdif_out_ao_13 spdif_out_aoao_cec muxao_ceccec_aoee_cecmuxee_ceccec_aovideo-codec@c8820000",amlogic,gxbb-vdecamlogic,gx-vdec eȂ ?dosesparser, vdecesparser 6 dos_parserdosvdec_1vdec_hevc( esparserbus@c8834000 ,simple-buseȃ@  ^ȃ@ rng@0,amlogic,meson-rngecorepinctrl@4b0#,amlogic,meson-gxbb-periphs-pinctrl ^ bank@4b0@e( 0@?muxpullpull-enablegpioIYewXqEth MDIOEth MDCEth RGMII RX ClkEth RX DVEth RX D0Eth RX D1Eth RX D2Eth RX D3Eth RGMII TX ClkEth TX EnEth TX D0Eth TX D1Eth TX D2Eth TX D3Eth PHY nRESETEth PHY IntcHDMI HPDHDMI DDC SDAHDMI DDC SCLeMMC D0eMMC D1eMMC D2eMMC D3eMMC D4eMMC D5eMMC D6eMMC D7eMMC ClkeMMC ReseteMMC CMDSDCard D1SDCard D0SDCard CLKSDCard CMDSDCard D3SDCard D2SDCard DetI2C A SDAI2C A SCKI2C B SDAI2C B SCKPWM DPWM BRevision Bit0Revision Bit1J2 Header Pin35J2 Header Pin36J2 Header Pin31TF VDD EnJ2 Header Pin32J2 Header Pin26J2 Header Pin29J2 Header Pin24J2 Header Pin23J2 Header Pin22J2 Header Pin21J2 Header Pin18J2 Header Pin33J2 Header Pin19J2 Header Pin16J2 Header Pin15J2 Header Pin12J2 Header Pin13J2 Header Pin8J2 Header Pin10J2 Header Pin11J2 Header Pin7 emmc &mux-0emmc_nand_d07emmc_cmdemmcmux-1 emmc_clkemmcemmc-ds 'muxemmc_dsemmcemmc_clk_gate (muxBOOT_8 gpio_periphsnormuxnor_dnor_qnor_cnor_csnorspi-pinsmuxspi_misospi_mosispi_sclkspispi-idle-high-pinsmux spi_sclkspi-idle-low-pinsmux spi_sclkspi-ss0muxspi_ss0spisdcard "mux-03sdcard_d0sdcard_d1sdcard_d2sdcard_d3sdcard_cmdsdcardmux-1 sdcard_clksdcardsdcard_clk_gate #muxCARD_2 gpio_periphssdiomux-0)sdio_d0sdio_d1sdio_d2sdio_d3sdio_cmdsdiomux-1 sdio_clksdiosdio_clk_gatemuxGPIOX_4 gpio_periphssdio_irqmux sdio_irqsdiouart_amuxuart_tx_auart_rx_auart_auart_a_cts_rtsmuxuart_cts_auart_rts_auart_auart_bmuxuart_tx_buart_rx_buart_buart_b_cts_rtsmuxuart_cts_buart_rts_buart_buart_cmuxuart_tx_cuart_rx_cuart_cuart_c_cts_rtsmuxuart_cts_cuart_rts_cuart_ci2c_a muxi2c_sck_ai2c_sda_ai2c_ai2c_bmuxi2c_sck_bi2c_sda_bi2c_bi2c_cmuxi2c_sck_ci2c_sda_ci2c_ceth-rgmii muxeth_mdioeth_mdceth_clk_rx_clketh_rx_dveth_rxd0eth_rxd1eth_rxd2eth_rxd3eth_rgmii_tx_clketh_tx_eneth_txd0eth_txd1eth_txd2eth_txd3etheth-rmiimuxXeth_mdioeth_mdceth_clk_rx_clketh_rx_dveth_rxd0eth_rxd1eth_tx_eneth_txd0eth_txd1ethpwm_a_xmuxpwm_a_xpwm_a_xpwm_a_ymuxpwm_a_ypwm_a_ypwm_bmuxpwm_bpwm_bpwm_dmuxpwm_dpwm_dpwm_emuxpwm_epwm_epwm_f_xmuxpwm_f_xpwm_f_xpwm_f_ymuxpwm_f_ypwm_f_yhdmi_hpd -mux hdmi_hpd hdmi_hpdhdmi_i2c .muxhdmi_sdahdmi_scl hdmi_i2ci2sout_ch23_ymuxi2sout_ch23_yi2s_outi2sout_ch45_ymuxi2sout_ch45_yi2s_outi2sout_ch67_ymuxi2sout_ch67_yi2s_outspdif_out_ymux spdif_out_y spdif_outbus@c8838000 ,simple-buseȃ ^ȃvideo-lut@48,amlogic,canvaseH bus@c883c000 ,simple-buseȃ  ^ȃ system-controller@0/,amlogic,meson-gx-hhi-sysctrlsimple-mfdsysconepower-controller,amlogic,meson-gxbb-pwrc`  %Dviuvencvcbusbt656dvinrdmavencivencpvdacvdi6venclvid_lock vpuvapb0~( #'沀 clock-controller,amlogic,gxbb-clkcxtal mailbox@404,amlogic,meson-gxbb-mhueL$8 ethernet@c94100005,amlogic,meson-gxbb-dwmacsnps,dwmac-3.70asnps,dwmac eAȃE@ macirqDRokay $*stmmacethclkin0clkin1timing-adjustmentdefault`krgmiitmdio,snps,dwmac-mdio ethernet-phy@0e'8  ! apb@d0000000 ,simple-buse  ^ mmc@70000,,amlogic,meson-gx-mmcamlogic,meson-gxbb-mmce  disabled^wcoreclkin0clkin1,mmc@72000,,amlogic,meson-gx-mmcamlogic,meson-gxbb-mmce  okay_zcoreclkin0clkin1-"#defaultclk-gate ( ,1$=%mmc@74000,,amlogic,meson-gx-mmcamlogic,meson-gxbb-mmce@ okay`}coreclkin0clkin1.&'(defaultclk-gate JXjw)1*=gpu@c0000%,amlogic,meson-gxbb-maliarm,mali-450e x1gpgpmmupppmupp0ppmmu0pp1ppmmu1pp2ppmmu2+ j buscore #,Xvpu@d0100000,,amlogic,meson-gxbb-vpuamlogic,meson-gx-vpu eȃ?vpuhhi  port@0eport@1eendpoint, 0hdmi-tx@c883a0004,amlogic,meson-gxbb-dw-hdmiamlogic,meson-gx-dw-hdmieȃ 9 tHDMITXokayOBhdmitx_apbhdmitxhdmitx_phy?Misfriahbvenci #n6-.default/ port@0eendpoint0 ,port@1eendpoint1 8phy@c0000000,amlogic,meson-gxbb-usb2-phye "72usb_generalusb disabled2 3phy@c0000020,amlogic,meson-gxbb-usb2-phye "73usb_generalusbokay2 4usb@c9000000!,amlogic,meson-gxbb-usbsnps,dwc2e Aotg3 usb2-phyhost disabledusb@c9100000!,amlogic,meson-gxbb-usbsnps,dwc2e @otg4 usb2-phyhostokay hub@1 ,usb5e3,610e5 6opp-table,operating-points-v2 +opp-125000000sY@~opp-250000000沀~opp-285714285m~opp-400000000ׄ~opp-500000000e~opp-666666666'~opp-744000000,X~memory@0memoryeregulator-usb-pwrs,regulator-fixed USB_OTG_PWRLK@5LK@ M6Re5 2leds ,gpio-ledsled-bluepc2:blue:alive 6  vheartbeatoffregulator-p5v0,regulator-fixedP5V0LK@5LK@ 5regulator-hdmi-p5v0,regulator-fixed HDMI_P5V0LK@5LK@e5 /regulator-tflash-vdd,regulator-fixed TFLASH_VDD2Z52Z M WRe7 $gpio-regulator-tf-io,regulator-gpioTF_IOw@52Z 62Zw@e7 %regulator-vcc1v8,regulator-fixedVCC1V8w@5w@e7 regulator-vcc3v3,regulator-fixedVCC3V32Z52Z *regulator-vddio-ao1v8,regulator-fixed VDDIO_AO1V8w@5w@e5regulator-vddio-ao3v3,regulator-fixed VDDIO_AO3V32Z52Ze5 7regulator-ddr3-1v5,regulator-fixed DDR3_1V5`5`e5emmc-pwrseq,mmc-pwrseq-emmc   )hdmi-connector,hdmi-connectoraportendpoint8 1sound,amlogic,gx-sound-card 7ODROID-C2    #&`pdai-link-0 9dai-link-1 9i2scodec-0 9dai-link-2 9codec-0 interrupt-parent#address-cells#size-cellscompatiblemodelmmc0mmc1mmc2serial0ethernet0rangesregno-mapreusablesizealignmentlinux,cma-defaultstdout-pathamlogic,pipelinepower-domainsstatusclocksdevice_typeenable-methodnext-level-cache#cooling-cellsphandlecache-levelcache-unifiedpolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresistripcooling-deviceinterruptsinterrupt-affinityclock-frequencyclock-output-names#clock-cellsread-onlysecure-monitormboxesshmemclock-indices#thermal-sensor-cellsinterrupt-controller#interrupt-cellsamlogic,channel-interrupts#reset-cells#sound-dai-cellssound-name-prefixinterrupt-namesclock-namesresetsfifo-sizepinctrl-0pinctrl-names#pwm-cells#io-channel-cellsvref-supplynum-cshdmi-phandleamlogic,has-chip-idlinux,rc-map-namereg-namesgpio-controller#gpio-cellsgpio-rangesgpio-line-namesgroupsfunctionbias-disableamlogic,ao-sysctrlamlogic,canvasreset-namesbias-pull-upbias-pull-down#power-domain-cellsassigned-clocksassigned-clock-parentsassigned-clock-rates#mbox-cellsrx-fifo-depthtx-fifo-depthphy-handlephy-modeamlogic,tx-delay-nsreset-assert-usreset-deassert-usreset-gpiospinctrl-1bus-widthcap-sd-highspeedsd-uhs-sdr12sd-uhs-sdr25sd-uhs-sdr50sd-uhs-ddr50max-frequencydisable-wpcd-gpiosvmmc-supplyvqmmc-supplynon-removablecap-mmc-highspeedmmc-ddr-1_8vmmc-hs200-1_8vmmc-pwrseqoperating-points-v2remote-endpointhdmi-supply#phy-cellsphy-supplyphysphy-namesdr_modevdd-supplyopp-hzopp-microvoltregulator-nameregulator-min-microvoltregulator-max-microvoltgpioenable-active-highvin-supplylabellinux,default-triggerdefault-stateregulator-always-ongpios-statessound-daidai-formatmclk-fs