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Gaud_pll_div_clk1_lpcg_clk2clock-controller@59d500002fsl,imx8qxp-lpcgYGmclkout0_lpcg_clk2clock-controller@59d600002fsl,imx8qxp-lpcgYGmclkout1_lpcg_clk2Dacm@59e000002fsl,imx8dxl-acmYh2E>?@D&'()*+,-./0aud_rec_clk0_lpcg_clkaud_rec_clk1_lpcg_clkaud_pll_div_clk0_lpcg_clkaud_pll_div_clk1_lpcg_clkext_aud_mclk0ext_aud_mclk1spdif0_rxsai0_rx_bclksai0_tx_bclksai1_rx_bclksai1_tx_bclksai2_rx_bclksai3_rx_bclkclock-controller@59c500002fsl,imx8qxp-lpcgY G!mqs0_lpcg_mclkmqs0_lpcg_ipg_clk2%clock-dma-ipg 2fixed-clock h dma_ipg_clk>bus@5a000000 2simple-bus ZZspi@5a0000002fsl,imx7ulp-spiZ  11peripg  525 @disabledspi@5a0100002fsl,imx7ulp-spiZ  22peripg  626 @disabledspi@5a0200002fsl,imx7ulp-spiZ  33peripg  727 @disabledspi@5a0300002fsl,imx7ulp-spiZ  44peripg  828@okaydefault-5spi@02rohm,dh2228fvÀserial@5a060000Z 66 ipgbaud  9Ĵ29Zrxtx U77 @okay&2fsl,imx8dxl-lpuartfsl,imx8qxp-lpuartdefault-8serial@5a070000Z 99 ipgbaud  :Ĵ2:Zrxtx U7 7 @okay&2fsl,imx8dxl-lpuartfsl,imx8qxp-lpuartdefault-:serial@5a080000Z ;; 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J2 @disabledmailbox@5d280000]( J2$clock-controller@5d4000002fsl,imx8qxp-lpcg]@4xGhpwm0_lpcg_ipg_clkpwm0_lpcg_ipg_hf_clkpwm0_lpcg_ipg_s_clkpwm0_lpcg_ipg_slv_clkpwm0_lpcg_ipg_mstr_clk2rclock-controller@5d4100002fsl,imx8qxp-lpcg]A4xGhpwm1_lpcg_ipg_clkpwm1_lpcg_ipg_hf_clkpwm1_lpcg_ipg_s_clkpwm1_lpcg_ipg_slv_clkpwm1_lpcg_ipg_mstr_clk2sclock-controller@5d4200002fsl,imx8qxp-lpcg]B4xGhpwm2_lpcg_ipg_clkpwm2_lpcg_ipg_hf_clkpwm2_lpcg_ipg_s_clkpwm2_lpcg_ipg_slv_clkpwm2_lpcg_ipg_mstr_clk2tclock-controller@5d4300002fsl,imx8qxp-lpcg]C4xGhpwm3_lpcg_ipg_clkpwm3_lpcg_ipg_hf_clkpwm3_lpcg_ipg_s_clkpwm3_lpcg_ipg_slv_clkpwm3_lpcg_ipg_mstr_clk2uclock-controller@5d4400002fsl,imx8qxp-lpcg]D4xGhpwm4_lpcg_ipg_clkpwm4_lpcg_ipg_hf_clkpwm4_lpcg_ipg_s_clkpwm4_lpcg_ipg_slv_clkpwm4_lpcg_ipg_mstr_clk2clock-controller@5d4500002fsl,imx8qxp-lpcg]E4xGhpwm5_lpcg_ipg_clkpwm5_lpcg_ipg_hf_clkpwm5_lpcg_ipg_s_clkpwm5_lpcg_ipg_slv_clkpwm5_lpcg_ipg_mstr_clk2clock-controller@5d4600002fsl,imx8qxp-lpcg]F4xGhpwm6_lpcg_ipg_clkpwm6_lpcg_ipg_hf_clkpwm6_lpcg_ipg_s_clkpwm6_lpcg_ipg_slv_clkpwm6_lpcg_ipg_mstr_clk2clock-controller@5d4700002fsl,imx8qxp-lpcg]G4xGhpwm7_lpcg_ipg_clkpwm7_lpcg_ipg_hf_clkpwm7_lpcg_ipg_s_clkpwm7_lpcg_ipg_slv_clkpwm7_lpcg_ipg_mstr_clk2clock-conn-enet0-root 2fixed-clock沀conn_enet0_root_clkjclock-dummy 2fixed-clock clk_dummychosenV/bus@5a000000/serial@5a060000imx8dxl-cm42fsl,imx8qxp-cm4 txrxrxdb$yyybz{|}~2)p4memory@80000000memory@regulator-m2uart1sel2regulator-fixeda2Zy2Z m2_uart1_sel _regulator-02regulator-fixeda2Zy2Zmux3_en regulator-12regulator-fixed fec1_supplya2Zy2Z _  @disabledregulator-22regulator-fixedfec1_io_supplyaw@yw@  @disabledregulator-42regulator-fixed mii-selecta2Zy2Z Lregulator-52regulator-fixed can1-stbya2Zy2Z Nregulator-32regulator-fixed SD1_SPWRa-y-  Xregulator-adc-vref2regulator-fixed vref_1v8aw@yw@Iaudio-codec-bt 2linux,bt-scosound-bt-sco2simple-audio-card bt-sco-audiodsp_a 2Qsimple-audio-card,cpus}simple-audio-card,codecssound-wm8960-12fsl,imx-audio-wm8960 ,wm8960-audioHeadphone JackHP_LHeadphone JackHP_RExt SpkSPK_LPExt SpkSPK_LNExt SpkSPK_RPExt SpkSPK_RNLINPUT1Mic JackMic JackMICBsound-wm8960-22fsl,imx-audio-wm8960,wm8960-audio-2Headphone JackHP_LHeadphone JackHP_RExt SpkSPK_LPExt SpkSPK_LNExt SpkSPK_RPExt SpkSPK_RNLINPUT1Mic JackMic JackMICBsound-wm8960-32fsl,imx-audio-wm8960,wm8960-audio-3Headphone JackHP_LHeadphone JackHP_RExt SpkSPK_LPExt SpkSPK_LNExt SpkSPK_RPExt SpkSPK_RNLINPUT1Mic JackMic JackMICB interrupt-parent#address-cells#size-cellsmodelcompatibleethernet0ethernet1gpio0gpio1gpio2gpio3gpio4gpio5gpio6gpio7mu1i2c2mmc0mmc1serial0serial1serial6device_typeregenable-methodnext-level-cacheclocks#cooling-cellsoperating-points-v2phandlecache-levelcache-unifiedopp-sharedopp-hzopp-microvoltclock-latency-nsopp-suspend#interrupt-cellsinterrupt-controllerinterruptsrangesno-mapreusablesizealloc-rangeslinux,cma-defaultmbox-namesmboxes#power-domain-cells#clock-cellsgpio-controller#gpio-cellspinctrl-namespinctrl-0fsl,pinslinux,keycodeswakeup-sourcetimeout-sec#thermal-sensor-cellspolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresistripcooling-deviceclock-frequencyclock-output-namesclock-namesassigned-clocksassigned-clock-ratespower-domainsstatusclock-indicesdmasdma-namesfsl,asrc-ratefsl,asrc-widthfsl,asrc-clk-map#sound-dai-cellsfsl,sai-asynchronous#dma-cellsdma-channelsdma-channel-maskfsl,spi-only-use-cs1-selspi-max-frequency#pwm-cellswlf,shared-lrclkwlf,hp-cfgwlf,gpio-cfg#io-channel-cellsvref-supplyfsl,clk-sourcefsl,scu-indexxceiver-supplyfsl,usbphyfsl,usbmiscahb-burst-configtx-burst-size-dwordrx-burst-size-dwordsrp-disablehnp-disableadp-disablepower-active-highdisable-over-current#index-cellsfsl,tx-d-calbus-widthno-sdno-sdionon-removablefsl,tuning-start-tapfsl,tuning-stepvmmc-supplycd-gpioswp-gpiosfsl,num-tx-queuesfsl,num-rx-queuesphy-modephy-handlefsl,magic-packetrx-internal-delay-psnvmem-cellsnvmem-cell-namesreset-gpiosreset-assert-usqca,disable-smarteeevddio-supplyregulator-min-microvoltregulator-max-microvoltinterrupt-nameseee-broken-1000tqca,disable-hibernation-modereset-deassert-usreg-namesphysphy-namescdns,on-chip-buff-size#phy-cellsgpio-rangesspi-tx-bus-widthspi-rx-bus-width#mbox-cellsstdout-pathmemory-regionfsl,resource-idfsl,entry-addressregulator-namegpioenable-active-highregulator-always-onoff-on-delay-ussimple-audio-card,namesimple-audio-card,formatsimple-audio-card,bitclock-inversionsimple-audio-card,frame-mastersimple-audio-card,bitclock-mastersound-daidai-tdm-slot-numdai-tdm-slot-widthaudio-cpuaudio-codecaudio-asrcaudio-routing