8( 3,Gateworks Venice GW71xx-0x i.MX8MM Development Kit2gw,imx8mm-gw71xx-0xfsl,imx8mmaliases&=/soc@0/bus@30800000/ethernet@30be0000"G/soc@0/bus@30000000/gpio@30200000"M/soc@0/bus@30000000/gpio@30210000"S/soc@0/bus@30000000/gpio@30220000"Y/soc@0/bus@30000000/gpio@30230000"_/soc@0/bus@30000000/gpio@30240000!e/soc@0/bus@30800000/i2c@30a20000!j/soc@0/bus@30800000/i2c@30a30000!o/soc@0/bus@30800000/i2c@30a40000!t/soc@0/bus@30800000/i2c@30a50000!y/soc@0/bus@30800000/mmc@30b40000!~/soc@0/bus@30800000/mmc@30b50000!/soc@0/bus@30800000/mmc@30b600006/soc@0/bus@30800000/spba-bus@30800000/serial@308600006/soc@0/bus@30800000/spba-bus@30800000/serial@308900006/soc@0/bus@30800000/spba-bus@30800000/serial@30880000$/soc@0/bus@30800000/serial@30a600003/soc@0/bus@30800000/spba-bus@30800000/spi@308200003/soc@0/bus@30800000/spba-bus@30800000/spi@308300003/soc@0/bus@30800000/spba-bus@30800000/spi@30840000!/soc@0/bus@32c00000/usb@32e40000!/soc@0/bus@32c00000/usb@32e50000cpus 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interrupt-parent#address-cells#size-cellsmodelcompatibleethernet0gpio0gpio1gpio2gpio3gpio4i2c0i2c1i2c2i2c3mmc0mmc1mmc2serial0serial1serial2serial3spi0spi1spi2usb0usb1entry-methodarm,psci-suspend-paramlocal-timer-stopentry-latency-usexit-latency-usmin-residency-usphandledevice_typeregclock-latencyclocksenable-methodi-cache-sizei-cache-line-sizei-cache-setsd-cache-sized-cache-line-sized-cache-setsnext-level-cacheoperating-points-v2nvmem-cellsnvmem-cell-namescpu-idle-states#cooling-cellscpu-supplycache-levelcache-unifiedopp-sharedopp-hzopp-microvoltopp-supported-hwclock-latency-nsopp-suspend#clock-cellsclock-frequencyclock-output-namesinterruptsarm,no-tick-in-suspendpolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresistripcooling-device#phy-cellsassigned-clocksassigned-clock-parentsclock-namespower-domainsrangesdma-ranges#sound-dai-cellsdmasdma-namesstatusgpio-controller#gpio-cellsinterrupt-controller#interrupt-cellsgpio-rangesgpio-line-names#thermal-sensor-cellspinctrl-namespinctrl-0fsl,ext-reset-output#dma-cellsfsl,sdma-ram-script-namefsl,pinsregmapoffsetlinux,keycodewakeup-sourceassigned-clock-rates#reset-cells#power-domain-cellsresets#pwm-cellscs-gpiosspi-max-frequencypinctrl-1scl-gpiossda-gpiosgw,modelabelgw,voltage-divider-ohmspagesizeregulator-nameregulator-min-microvoltregulator-max-microvoltregulator-min-microampregulator-max-microampregulator-boot-onregulator-always-onst,drdy-int-pin#mbox-cellsfsl,tuning-start-tapfsl,tuning-stepbus-widthpinctrl-2non-removablereg-namesfsl,num-tx-queuesfsl,num-rx-queuesfsl,stop-modephy-modephy-handleti,rx-internal-delayti,tx-internal-delaytx-fifo-depthrx-fifo-depthcolorfunctiondefault-stateremote-endpointpower-domain-namesphysfsl,usbmiscdr_modeover-current-active-low#index-cellsdisable-over-currentreset-namesfsl,refclk-pad-modefsl,clkreq-unsupporteddma-channelsinterrupt-namesbus-rangenum-lanesnum-viewportinterrupt-map-maskinterrupt-mapfsl,max-link-speedlinux,pci-domainphy-namesreset-gpionum-ib-windowsnum-ob-windowslinux,codelinux,default-triggerstdout-path