8( %,Emcraft Systems i.MX8MPlus NavQ+ Kit 2emcraft,imx8mp-navqpfsl,imx8mpaliases&=/soc@0/bus@30800000/ethernet@30be0000&G/soc@0/bus@30800000/ethernet@30bf0000"Q/soc@0/bus@30000000/gpio@30200000"W/soc@0/bus@30000000/gpio@30210000"]/soc@0/bus@30000000/gpio@30220000"c/soc@0/bus@30000000/gpio@30230000"i/soc@0/bus@30000000/gpio@30240000!o/soc@0/bus@30800000/i2c@30a20000!t/soc@0/bus@30800000/i2c@30a30000!y/soc@0/bus@30800000/i2c@30a40000!~/soc@0/bus@30800000/i2c@30a50000!/soc@0/bus@30800000/i2c@30ad0000!/soc@0/bus@30800000/i2c@30ae0000!/soc@0/bus@30800000/mmc@30b40000!/soc@0/bus@30800000/mmc@30b50000!/soc@0/bus@30800000/mmc@30b600006/soc@0/bus@30800000/spba-bus@30800000/serial@308600006/soc@0/bus@30800000/spba-bus@30800000/serial@308900006/soc@0/bus@30800000/spba-bus@30800000/serial@30880000$/soc@0/bus@30800000/serial@30a60000!/soc@0/bus@30800000/spi@30bb0000cpus cpu@0cpu2arm,cortex-a53lpsci@ -@?L] ispeed_gradezcpu@1cpu2arm,cortex-a53lpsci@ -@?Lzcpu@2cpu2arm,cortex-a53lpsci@ -@?Lzcpu@3cpu2arm,cortex-a53lpsci@ -@?Lzl2-cache02cache@opp-table2operating-points-v2opp-1200000000G PI opp-1600000000_^~I opp-1800000000kIB@ I clock-osc-32k 2fixed-clock%5osc_32k!clock-osc-24m 2fixed-clock%n65osc_24m"clock-ext1 2fixed-clock%k@ 5clk_ext1#clock-ext2 2fixed-clock%k@ 5clk_ext2$clock-ext3 2fixed-clock%k@ 5clk_ext3%clock-ext4 2fixed-clock%k@ 5clk_ext4&funnel2arm,coresight-static-funnelin-ports port@0endpointHport@1endpointHport@2endpointH port@3endpointH out-portsportendpointH reserved-memory Xdsp@92400000@_ fdisabledlpmu2arm,cortex-a53-pmu mpsci 2arm,psci-1.0smcthermal-zonescpu-thermalx tripstrip0Lpassive trip1s criticalcooling-mapsmap0 0soc-thermalx tripstrip0Lpassivetrip1s criticalcooling-mapsmap00timer2arm,armv8-timer0m   %zsoc@02fsl,imx8mp-socsimple-bus X>]isoc_unique_idetm@28440000"2arm,coresight-etm4xarm,primecell(D] apb_pclkout-portsportendpointHetm@28540000"2arm,coresight-etm4xarm,primecell(T] apb_pclkout-portsportendpointHetm@28640000"2arm,coresight-etm4xarm,primecell(d] apb_pclkout-portsportendpointH etm@28740000"2arm,coresight-etm4xarm,primecell(t] apb_pclkout-portsportendpointH funnel@28c03000+2arm,coresight-dynamic-funnelarm,primecell(0] apb_pclkin-ports port@0endpointH port@1endpointport@2endpointout-portsportendpointHetf@28c04000 2arm,coresight-tmcarm,primecell(@] apb_pclkin-portsportendpointHout-portsportendpointHetr@28c06000 2arm,coresight-tmcarm,primecell(`] apb_pclkin-portsportendpointHbus@300000002fsl,aips-bussimple-bus0@ Xgpio@302000002fsl,imx8mp-gpiofsl,imx35-gpio0 m@A/@.gpio@302100002fsl,imx8mp-gpiofsl,imx35-gpio0!mBC/@#6gpio@302200002fsl,imx8mp-gpiofsl,imx35-gpio0"mDE/ @8ngpio@302300002fsl,imx8mp-gpiofsl,imx35-gpio0#mFG/@R ?gpio@302400002fsl,imx8mp-gpiofsl,imx35-gpio0$mHI/@rtmu@302600002fsl,imx8mp-tmu0&]icalibL watchdog@302800002fsl,imx8mp-wdtfsl,imx21-wdt0( mNfokaybdefaultpzwatchdog@302900002fsl,imx8mp-wdtfsl,imx21-wdt0) mO fdisabledwatchdog@302a00002fsl,imx8mp-wdtfsl,imx21-wdt0* m  fdisabledtimer@302d00002fsl,imx8mp-gptfsl,imx6dl-gpt0- m7ipgpertimer@302e00002fsl,imx8mp-gptfsl,imx6dl-gpt0. m6ipgpertimer@302f00002fsl,imx8mp-gptfsl,imx6dl-gpt0/ m5ipgperpinctrl@303300002fsl,imx8mp-iomuxc03eqosgrphTX|xthd`\lp=gpioledgrp mi2c1grp0`@d@,i2c2grp0h@ l@/i2c3grp0p@t@0i2c4grp0x@|@1pmicgrp A-regusdhc2vmmcgrp8Aouart2grp0(I,I*usdhc2grp $(,04$2usdhc2-100mhzgrp $(,04$4usdhc2-200mhzgrp $(,04$5usdhc2gpiogrp3usdhc3grp$( h lpt| L$P(T,H08usdhc3-100mhzgrp$( h lpt| L$P(T,H09usdhc3-200mhzgrp$( h lpt| L$P(T,H0:wdoggrp|syscon@303400002fsl,imx8mp-iomuxc-gprsyscon04+efuse@30350000)2fsl,imx8mp-ocotpfsl,imx8mm-ocotpsyscon05 unique-id@8speed-grade@10mac-address@90;mac-address@96<calib@264dclock-controller@30360000$2fsl,imx8mp-anatopfsl,imx8mm-anatop06snvs@30370000#2fsl,sec-v4.0-monsysconsimple-mfd07 snvs-rtc-lp2fsl,sec-v4.0-mon-rtc-lp 4m snvs-rtcsnvs-powerkey2fsl,sec-v4.0-pwrkey  m snvs-pwrkeyt fdisabledsnvs-lpgpr+2fsl,imx8mp-snvs-lpgprfsl,imx7d-snvs-lpgprclock-controller@303800002fsl,imx8mp-ccm08mUV!"#$%&4osc_32kosc_24mclk_ext1clk_ext2clk_ext3clk_ext4(B gh(8,A8@;/ereset-controller@303900002fsl,imx8mp-srcsyscon09 mYRgpc@303a00002fsl,imx8mp-gpc0: mW/pgc power-domain@0 Mpower-domain@1 Wpower-domain@2 Upower-domain@3 Vpower-domain@4 ij 2ij888 //hpower-domain@5 6lH88ׄ#FBpower-domain@6 'cpower-domain@7 fef88/ׄ'power-domain@8 (power-domain@9  4'bpower-domain@10   Lpower-domain@11 ( epower-domain@12 (  fpower-domain@13 (  gpower-domain@14 cdc@3ek@Xpower-domain@15 Ypower-domain@16 Npower-domain@17 7 7@eTpower-domain@18 Obus@304000002fsl,aips-bussimple-bus0@@ Xpwm@306600002fsl,imx8mp-pwmfsl,imx27-pwm0f mQipgper- fdisabledpwm@306700002fsl,imx8mp-pwmfsl,imx27-pwm0g mRipgper- fdisabledpwm@306800002fsl,imx8mp-pwmfsl,imx27-pwm0h mSipgper- fdisabledpwm@306900002fsl,imx8mp-pwmfsl,imx27-pwm0i mTipgper- fdisabledtimer@306a00002nxp,sysctr-timer0j m/"pertimer@306e00002fsl,imx8mp-gptfsl,imx6dl-gpt0n m3ipgpertimer@306f00002fsl,imx8mp-gptfsl,imx6dl-gpt0o m3ipgpertimer@307000002fsl,imx8mp-gptfsl,imx6dl-gpt0p m4ipgperbus@308000002fsl,aips-bussimple-bus0@ Xspba-bus@308000002fsl,spba-bussimple-bus0 Xspi@30820000 "2fsl,imx8mp-ecspifsl,imx6ul-ecspi0 mipgperĴ8 8))=rxtx fdisabledspi@30830000 "2fsl,imx8mp-ecspifsl,imx6ul-ecspi0 m ipgperĴ8 8))=rxtx fdisabledspi@30840000 "2fsl,imx8mp-ecspifsl,imx6ul-ecspi0 m!ipgperĴ8 8))=rxtx fdisabledserial@308600002fsl,imx8mp-uartfsl,imx6q-uart0 mipgper 8))=rxtx fdisabledserial@308800002fsl,imx8mp-uartfsl,imx6q-uart0 mipgper 8))=rxtx fdisabledserial@308900002fsl,imx8mp-uartfsl,imx6q-uart0 mipgper 8))=rxtxfokaybdefaultp*can@308c00002fsl,imx8mp-flexcan0 mnipgpert0bZG V+ fdisabledcan@308d00002fsl,imx8mp-flexcan0 mnipgperu0bZG V+ fdisabledcrypto@30900000 2fsl,sec-v4.0 0 X0 m[kn aclkipgjr@10002fsl,sec-v4.0-job-ring mi fdisabledjr@20002fsl,sec-v4.0-job-ring  mjjr@30002fsl,sec-v4.0-job-ring0 mri2c@30a200002fsl,imx8mp-i2cfsl,imx21-i2c 0 m#fokay%bdefaultp,pmic@25 2nxp,pca9450c%bdefaultp-.mregulatorsBUCK1dBUCK1s '!` 5BUCK2dBUCK2s '!` 5~ PBUCK4dBUCK4s '3@BUCK5dBUCK5s '3@BUCK6dBUCK6s '3@LDO1dLDO1sj2ZLDO2dLDO2s 50LDO3dLDO3s 52ZLDO4dLDO4s 52ZLDO5dLDO5sw@2Zi2c@30a300002fsl,imx8mp-i2cfsl,imx21-i2c 0 m$fokay%bdefaultp/i2c@30a400002fsl,imx8mp-i2cfsl,imx21-i2c 0 m%fokay%bdefaultp0i2c@30a500002fsl,imx8mp-i2cfsl,imx21-i2c 0 m&fokay%bdefaultp1rtc@53 2nxp,pcf2131Sserial@30a600002fsl,imx8mp-uartfsl,imx6q-uart0 mipgper 8))=rxtx fdisabledmailbox@30aa00002fsl,imx8mp-mufsl,imx6sx-mu0 mX mailbox@30e600002fsl,imx8mp-mufsl,imx6sx-mu0 m  fdisabledki2c@30ad00002fsl,imx8mp-i2cfsl,imx21-i2c 0 mL fdisabledi2c@30ae00002fsl,imx8mp-i2cfsl,imx21-i2c 0 mM fdisabledmmc@30b4000022fsl,imx8mp-usdhcfsl,imx8mm-usdhcfsl,imx7d-usdhc0 m_ ipgahbper+; fdisabledmmc@30b5000022fsl,imx8mp-usdhcfsl,imx8mm-usdhcfsl,imx7d-usdhc0 m_ ipgahbper+;fokay"bdefaultstate_100mhzstate_200mhzp23E43O53 Y6 b7mmc@30b6000022fsl,imx8mp-usdhcfsl,imx8mm-usdhcfsl,imx7d-usdhc0 m_ ipgahbper+;fokayׄ"bdefaultstate_100mhzstate_200mhzp8E9O:nspi@30bb00002nxp,imx8mp-fspi0|fspi_basefspi_mmap mk fspi_enfspiĴ  fdisableddma-controller@30bd0000 2fsl,imx8mp-sdmafsl,imx8mq-sdma0 mkipgahbimx/sdma/sdma-imx7d.bin)ethernet@30be0000-2fsl,imx8mp-fecfsl,imx8mq-fecfsl,imx6sx-fec00mvwxy("ipgahbptpenet_clk_refenet_out ^ 6:;9sY@]; imac-address V+ fdisabledethernet@30bf0000'2nxp,imx8mp-dwmac-eqossnps,dwmac-5.10a0mmacirqeth_wake_irq stmmacethpclkptp_reftx^6:; sY@]< imac-address+fokaybdefaultp= rgmii-id>mdio2snps,dwmac-mdio ethernet-phy@02ethernet-phy-ieee802.3-c22 ?'*?>bus@30c000002fsl,aips-bussimple-bus0@ Xspba-bus@30c000002fsl,spba-bussimple-bus0 Xsai@30c100002fsl,imx8mp-saifsl,imx8mq-sai0\(@@@@busmclk0mclk1mclk2mclk3 8AA=rxtx m_ fdisabledsai@30c200002fsl,imx8mp-saifsl,imx8mq-sai0\(@@@@busmclk0mclk1mclk2mclk3 8AA=rxtx m` fdisabledsai@30c300002fsl,imx8mp-saifsl,imx8mq-sai0\(@@ @ @ busmclk0mclk1mclk2mclk3 8AA=rxtx m2 fdisabledsai@30c500002fsl,imx8mp-saifsl,imx8mq-sai0\(@ @ @@busmclk0mclk1mclk2mclk3 8AA =rxtx mZ fdisabledsai@30c600002fsl,imx8mp-saifsl,imx8mq-sai0\(@@@@busmclk0mclk1mclk2mclk3 8A A =rxtx mZ fdisabledsai@30c800002fsl,imx8mp-saifsl,imx8mq-sai0\(@@@@busmclk0mclk1mclk2mclk3 8A A =rxtx mo fdisabledeasrc@30c90000"2fsl,imx8mp-easrcfsl,imx8mn-easrc0 mz@mem8AAAAAAAA@=ctx0_rxctx0_txctx1_rxctx1_txctx2_rxctx2_txctx3_rxctx3_txmimx/easrc/easrc-imx8mn.bin{@ fdisabledaudio-controller@30ca00002fsl,imx8mp-micfil0\0mmn,-(@@6&')ipg_clkipg_clk_apppll8kpll11kclkext38A=rx fdisabledaud2htx@30cb00002fsl,imx8mp-aud2htx0 m@!bus8A=tx fdisabledxcvr@30cc00002fsl,imx8mp-xcvr 000 0|ramregsrxfifotxfifo$m @@&@@#ipgphyspbapll_ipg 8AA=rxtx@ fdisableddma-controller@30e00000 2fsl,imx8mp-sdmafsl,imx8mq-sdma0@ipgahb m"imx/sdma/sdma-imx7d.bindma-controller@30e10000 2fsl,imx8mp-sdmafsl,imx8mq-sdma0@ipgahb mgimx/sdma/sdma-imx7d.binAclock-controller@30e200002fsl,imx8mp-audio-blk-ctrl08{|}"ahbsai1sai2sai3sai5sai6sai7Bp@interconnect@327000002fsl,imx8mp-nocfsl,imx8m-noc2pgzCPopp-table2operating-points-v2Copp-200000000 opp-1000000000;bus@32c000002fsl,aips-bussimple-bus2@ Xisi@32e000002fsl,imx8mp-isi2@m* axiapbDD fdisabledports port@0endpointHEGport@1endpointHFHdwe@32e300002nxp,imx8mp-dw1002 md axiahbDcsi@32e40000*2fsl,imx8mp-mipi-csi2fsl,imx8mm-mipi-csi22 m%ր  pclkwrapphyaxiAրD fdisabledports port@0port@1endpointHGEcsi@32e50000*2fsl,imx8mp-mipi-csi2fsl,imx8mm-mipi-csi22 mP%ր  pclkwrapphyaxiAրD fdisabledports port@0port@1endpointHHFdsi@32e600002fsl,imx8mp-mipi-dsim2 bus_clksclk_mipib8 n6n6 mD fdisabledports port@0endpointHIJport@1endpointdisplay-controller@32e800002fsl,imx8mp-lcdif2 pixaxidisp_axi mD fdisabledportendpointHJIdisplay-controller@32e900002fsl,imx8mp-lcdif2 m pixaxidisp_axiD fdisabledportendpointHKQblk-ctrl@32ec0000!2fsl,imx8mp-media-blk-ctrlsyscon2 (LMMLLNLOONFbusmipi-dsi1mipi-csi1lcdif1isimipi-csi2lcdif2ispdwemipi-dsi2PPPPPPPPP PP!PP"PP#P/lcdif-rdlcdif-wrisi0isi1isi2isp0isp1dwe@ &apbaxicam1cam2disp1disp2ispphy(ab9 A8((e = Dbridge@5c2fsl,imx8mp-ldb\( |ldblvdsIldb( fdisabledports port@0endpointHQKport@1endpointport@2endpointpcie-phy@32f000002fsl,imx8mp-pcie-phy2RRpciephyperstS fdisabledablk-ctrl@32f10000 2fsl,imx8mp-hsio-blk-ctrlsyscon2$ usbpcieTTUVTW(bususbusb-phy1usb-phy2pciepcie-phy@PPPPPPPPnoc-pcieusb1usb2pcie Sblk-ctrl@32fc0000 2fsl,imx8mp-hdmi-blk-ctrlsyscon2(capbaxiref_266mref_24mfdcc(XXXXXXXYXX=busirqsteerlcdifpaipvitrnghdmi-txhdmi-tx-phyhdcphrv Zinterrupt-controller@32fc2000%2fsl,imx8mp-irqsteerfsl,imx-irqsteer2  m+/(4@cipgZ[display-bridge@32fc40002fsl,imx8mp-hdmi-pvi2@[m Z fdisabledports port@0endpointH\_port@1endpointH]`display-controller@32fc60002fsl,imx8mp-lcdif2`[m^cpixaxidisp_axiZ fdisabledportendpointH_\hdmi@32fd80002fsl,imx8mp-hdmi-tx2~[mc^iahbisfrcecpix6ZA fdisabledports port@0endpointH`]port@1phy@32fdff002fsl,imx8mp-hdmi-phy2capbrefZ fdisabled^pcie@338000002fsl,imx8mp-pcie3@ |dbiconfig 7pciepcie_buspcie_auxx9 pciN0XXb mmsi/o~}|{SRR appsturnoffa pcie-phy fdisabledpcie-ep@338000002fsl,imx8mp-pcie-ep3@|dbiaddr_space 7pciepcie_buspcie_auxx9X mdmaSRR appsturnoffa pcie-phy fdisabledgpu@38000000 2vivante,gc8 m 4fcoreshaderbusreg3488//bgpu@38008000 2vivante,gc8 mf corebusreg58/cvideo-codec@383000002nxp,imx8mm-vpu-g180 mr+#Fdvideo-codec@383100002nxp,imx8mq-vpu-g281 m sAedblk-ctrl@383300002fsl,imx8mp-vpu-blk-ctrlsyscon83 (efgbusg1g2vc8000e  g1g2vc8000e`+#F#F0P%P$P&P$P'P$g1g2vc8000ednpu@38500000 2vivante,gc8P  m    ijcoreshaderbusreghinterrupt-controller@38800000 2arm,gic-v388 / m memory-controller@3d4000002snps,ddrc-3.80a=@@ mddr-pmu@3d800000%2fsl,imx8mp-ddr-pmufsl,imx8m-ddr-pmu=@ mbusb-phy@381f00402fsl,imx8mp-usb-phy8@@phyS fdisablediusb@32f101002fsl,imx8mp-dwc328  @ hsiosuspend mS  @@X fdisabledusb@38100000 2snps,dwc38@bus_earlyrefsuspend m(iiusb2-phyusb3-phy usb-phy@382f00402fsl,imx8mp-usb-phy8/@@phyS fdisabledjusb@32f101082fsl,imx8mp-dwc328/  @ hsiosuspend mS  @@X fdisabledusb@38200000 2snps,dwc38 @bus_earlyrefsuspend m)jjusb2-phyusb3-phy dsp@3b6e80002fsl,imx8mp-dsp;n,txdb0txdb1rxdb0rxdb107kkkk>l fdisabledchosen6L/soc@0/bus@30800000/spba-bus@30800000/serial@30890000leds 2gpio-ledsbdefaultpmled-0X^status \ngonregulator-usdhc22regulator-fixedbdefaultpodVSD_3V3s2Z2Z u6zd.7 interrupt-parent#address-cells#size-cellsmodelcompatibleethernet0ethernet1gpio0gpio1gpio2gpio3gpio4i2c0i2c1i2c2i2c3i2c4i2c5mmc0mmc1mmc2serial0serial1serial2serial3spi0device_typeregclock-latencyclocksenable-methodi-cache-sizei-cache-line-sizei-cache-setsd-cache-sized-cache-line-sized-cache-setsnext-level-cachenvmem-cellsnvmem-cell-namesoperating-points-v2#cooling-cellscpu-supplyphandlecache-unifiedcache-levelopp-sharedopp-hzopp-microvoltopp-supported-hwclock-latency-nsopp-suspend#clock-cellsclock-frequencyclock-output-namesremote-endpointrangesno-mapstatusinterruptspolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresistripcooling-devicearm,no-tick-in-suspendcpuclock-namesgpio-controller#gpio-cellsinterrupt-controller#interrupt-cellsgpio-ranges#thermal-sensor-cellspinctrl-namespinctrl-0fsl,ext-reset-outputfsl,pinsregmapoffsetlinux,keycodewakeup-sourceassigned-clocksassigned-clock-parentsassigned-clock-rates#reset-cells#power-domain-cellspower-domains#pwm-cellsdmasdma-namesfsl,clk-sourcefsl,stop-moderegulator-nameregulator-min-microvoltregulator-max-microvoltregulator-boot-onregulator-always-onregulator-ramp-delaynxp,dvs-run-voltagenxp,dvs-standby-voltage#mbox-cellsfsl,tuning-start-tapfsl,tuning-stepbus-widthpinctrl-1pinctrl-2cd-gpiosvmmc-supplynon-removablereg-names#dma-cellsfsl,sdma-ram-script-namefsl,num-tx-queuesfsl,num-rx-queuesinterrupt-namesintf_modephy-modephy-handlereset-gpiosreset-assert-usreset-deassert-usqca,disable-smarteeeqca,disable-hibernation-mode#sound-dai-cellsfirmware-namefsl,asrc-ratefsl,asrc-formatresets#interconnect-cellsfsl,blk-ctrlsamsung,pll-clock-frequencypower-domain-namesinterconnectsinterconnect-namesreset-names#phy-cellsfsl,channelfsl,num-irqsreg-io-widthbus-rangenum-lanesnum-viewportinterrupt-map-maskinterrupt-mapfsl,max-link-speedlinux,pci-domainphysphy-namesnum-ib-windowsnum-ob-windowsdma-rangessnps,gfladj-refclk-lpm-sel-quirksnps,parkmode-disable-ss-quirkmbox-namesmboxesmemory-regionstdout-pathcolorfunctiondefault-stategpioenable-active-highstartup-delay-usoff-on-delay-us