dv8_p(_8 ,NXP i.MX95 19X19 board2fsl,imx95-19x19-evkfsl,imx95cpus cpu@0=cpu2arm,cortex-a55IMpsci[jxperf@@ cpu@100=cpu2arm,cortex-a55IMpsci[jxperf@@ cpu@200=cpu2arm,cortex-a55IMpsci[jxperf@@ cpu@300=cpu2arm,cortex-a55IMpsci[jxperf@@ cpu@400=cpu2arm,cortex-a55IjxperfMpsci[@@cpu@500=cpu2arm,cortex-a55IjxperfMpsci[@@l2-cache-l02cache@ l2-cache-l12cache@ l2-cache-l22cache@ l2-cache-l32cache@ l2-cache-l42cache@ l2-cache-l52cache@ l3-cache2cache@ cpu-mapcluster0core0 core1 core2 core3 core4core5clock-ext1 2fixed-clock'k@ 7clk_ext1clock-sai-mclk1 2fixed-clock' 7sai1_mclkclock-sai-mclk2 2fixed-clock' 7sai2_mclkclock-sai-mclk3 2fixed-clock' 7sai3_mclkclock-sai-mclk4 2fixed-clock' 7sai4_mclkclock-sai-mclk5 2fixed-clock' 7sai5_mclkclock-24m 2fixed-clock'n67osc_24msram@204c0000 2mmio-sramI LJ L firmwarescmi 2arm,scmi$QX protocol@11I^$protocol@13I^protocol@14Iprotocol@15Irprotocol@19I"i2c7pcal6524grplpi2c7grp004$@ 48 @ pcie0grp@%pcie1grp@(uart1grp0#usdhc1grp(,,004488<<@@DDHHLLPPTusdhc1-100mhzgrp(,,004488<<@@DDHHLLPPTusdhc1-200mhzgrp(,,004488<<@@DDHHLLPPTregusdhc2vmmcgrp+usdhc2gpiogrpusdhc2grpTXusdhc2-100mhzgrpTXusdhc2-200mhzgrpTXpmu2arm,cortex-a55-pmu ?thermal-zonesa55-thermaltripstrip0LDpassivetrip1s Dcriticalcooling-mapsmap0H psci 2arm,psci-1.0Tsmctimer2arm,armv8-timer0 ?? ? ?'n6interrupt-controller@48000000 2arm,gic-v3 IHH  #  8Jmsi-controller@480400002arm,gic-v3-itsIHHW8soc 2simple-bus Jbus@420000002fsl,aips-bussimple-busIB JBB(( mailbox@42430000 2fsl,imx95-muIBC bwiuokaywatchdog@424900002fsl,imx93-wdtIBI Mbw|(uokaypwm@424e00002fsl,imx7ulp-pwmIBNbw udisabledpwm@424f00002fsl,imx7ulp-pwmIBOb udisabledpwm@425000002fsl,imx7ulp-pwmIBPb udisabledpwm@425100002fsl,imx7ulp-pwmIBQb udisabledi2c@42530000"2fsl,imx95-lpi2cfsl,imx7ulp-lpi2cIBS :bwperipg  udisabledi2c@42540000"2fsl,imx95-lpi2cfsl,imx7ulp-lpi2cIBT ;bwperipg  udisabledspi@42550000 2fsl,imx95-spifsl,imx7ulp-spiIBU =bwperipg udisabledspi@42560000 2fsl,imx95-spifsl,imx7ulp-spiIBV >bwperipg udisabledserial@4257000072fsl,imx95-lpuartfsl,imx8ulp-lpuartfsl,imx7ulp-lpuartIBW @bipg udisabledserial@4258000072fsl,imx95-lpuartfsl,imx8ulp-lpuartfsl,imx7ulp-lpuartIBX Abipg udisabledserial@4259000072fsl,imx95-lpuartfsl,imx8ulp-lpuartfsl,imx7ulp-lpuartIBY Bbipg udisabledserial@425a000072fsl,imx95-lpuartfsl,imx8ulp-lpuartfsl,imx7ulp-lpuartIBZ Cbipg udisabledserial@4269000072fsl,imx95-lpuartfsl,imx8ulp-lpuartfsl,imx7ulp-lpuartIBi Dbipg udisabledserial@426a000072fsl,imx95-lpuartfsl,imx8ulp-lpuartfsl,imx7ulp-lpuartIBj Ebipg udisabledi2c@426b0000"2fsl,imx95-lpi2cfsl,imx7ulp-lpi2cIBk bwperipg  udisabledi2c@426c0000"2fsl,imx95-lpi2cfsl,imx7ulp-lpi2cIBl bwperipg  udisabledi2c@426d0000"2fsl,imx95-lpi2cfsl,imx7ulp-lpi2cIBm bwperipg uokay'B@defaulti2c7-gpio@22 2nxp,pcal6524I"default#&i2c@426e0000"2fsl,imx95-lpi2cfsl,imx7ulp-lpi2cIBn bwperipg  udisabledspi@426f0000 2fsl,imx95-spifsl,imx7ulp-spiIBo bwperipg udisabledspi@42700000 2fsl,imx95-spifsl,imx7ulp-spiIBp bwperipg udisabledspi@42710000 2fsl,imx95-spifsl,imx7ulp-spiIBq bwperipg udisabledspi@42720000 2fsl,imx95-spifsl,imx7ulp-spiIBr bwperipg udisabledmailbox@42730000 2fsl,imx95-muIBs bwi udisabledbus@428000002fsl,aips-bussimple-busIB JBBmmc@42850000!2fsl,imx95-usdhcfsl,imx8mm-usdhcIB Vbw ipgahbper ׄ$.Cuokay(defaultstate_100mhzstate_200mhzsleepS]gqmmc@42860000!2fsl,imx95-usdhcfsl,imx8mm-usdhcIB Wbw ipgahbper ׄ$.Cuokay(defaultstate_100mhzstate_200mhzsleepS]g  !mmc@428b0000!2fsl,imx95-usdhcfsl,imx8mm-usdhcIB bw ipgahbper ׄ$.C udisabledgpio@43810000 2fsl,imx95-gpiofsl,imx8ulp-gpioIC12#bww gpioport" gpio@43820000 2fsl,imx95-gpiofsl,imx8ulp-gpioIC34#bww gpioport@"h"J"*" gpio@43840000 2fsl,imx95-gpiofsl,imx8ulp-gpioIC56#bww gpioport ".",gpio@43850000 2fsl,imx95-gpiofsl,imx8ulp-gpioIC78#bww gpioport "\ " $bus@440000002fsl,aips-bussimple-busIDJDD mailbox@44220000 2fsl,imx95-muID" b+i udisabledpwm@443100002fsl,imx7ulp-pwmID1b+ udisabledpwm@443200002fsl,imx7ulp-pwmID2b< udisabledi2c@44340000"2fsl,imx95-lpi2cfsl,imx7ulp-lpi2cID4  b/+peripg  udisabledi2c@44350000"2fsl,imx95-lpi2cfsl,imx7ulp-lpi2cID5 b0+peripg  udisabledspi@44360000 2fsl,imx95-spifsl,imx7ulp-spiID6 b1+peripg udisabledspi@44370000 2fsl,imx95-spifsl,imx7ulp-spiID7 b2+peripg udisabledserial@4438000072fsl,imx95-lpuartfsl,imx8ulp-lpuartfsl,imx7ulp-lpuartID8 b4ipguokaydefault#serial@4439000072fsl,imx95-lpuartfsl,imx8ulp-lpuartfsl,imx7ulp-lpuartID9 b5ipg udisabledadc@445300002nxp,imx93-adcIDS$b)ipg udisabledmailbox@445b0000 2fsl,imx95-muID[J  isram@445b1000 2mmio-sramID[ JD[ scmi-sram-section@02arm,scmi-shmemIscmi-sram-section@802arm,scmi-shmemImailbox@445d0000 2fsl,imx95-muID] b+i udisabledmailbox@445f0000 2fsl,imx95-muID_ b+i udisabledmailbox@44630000 2fsl,imx95-muIDc b+i udisabledmailbox@473200002fsl,imx95-mu-v2xIG2 imailbox@473500002fsl,imx95-mu-v2xIG5 igpio@47400000 2fsl,imx95-gpiofsl,imx8ulp-gpioIG@  #b66 gpioport"p udisabledmailbox@475200002fsl,imx95-mu-eleIGR i udisabledmailbox@475300002fsl,imx95-mu-eleIGS i udisabledmailbox@475400002fsl,imx95-mu-eleIGT i udisabledmailbox@475500002fsl,imx95-mu-eleIGU imailbox@475600002fsl,imx95-mu-eleIGV i udisabledmailbox@475700002fsl,imx95-mu-eleIGW i udisabledbus@490000002fsl,aips-bussimple-busIIJII iommu@490d0000 2arm,smmu-v3II 0EHNFeventqgerrorpriqcmdq-sync udisabledpcie@4c3000002fsl,imx95-pcie@IL0`L6L4 dbiconfigatuapp8Jo  =pci 6msi2345 bW$#X pciepcie_buspcie_phypcie_aux#$X ֓ j$(uokay%default ;&F'pcie-ep@4c3000002fsl,imx95-pcie-ep`IL0L6L2L4 L7  dbiatudbi2appdmaaddr_space =dma bW$#X pciepcie_buspcie_phypcie_aux#$X ֓ j$ udisabledpcie@4c3800002fsl,imx95-pcie@IL8L>L< dbiconfigatuapp8J  =pci <msi89:; bW$#X pciepcie_buspcie_phypcie_aux#$X ֓ j$(uokay(default ;&F)pcie-ep@4c3800002fsl,imx95-pcie-ep`IL8L>L:L< L?  dbiatudbi2appdmaaddr_space =dma bW$#X pciepcie_buspcie_phypcie_aux#$X ֓ j$ udisabledaliasesS/soc/bus@42800000/mmc@42850000X/soc/bus@42800000/mmc@42860000"]/soc/bus@44000000/serial@44380000chosen"e/soc/bus@44000000/serial@44380000memory@80000000=memoryIreserved-memory Jlinux,cma2shared-dma-poolq<~regulator-m2-pwr2regulator-fixed M.2-power2Z2Z A&*regulator-pcie2regulator-fixed PCIE_WLAN_EN2Z2Z* A&'regulator-slot-pwr2regulator-fixedPCIe slot-power2Z2Z A&)regulator-usdhc22regulator-fixeddefault+ VDD_SD2_3V32Z2Z A .! interrupt-parent#address-cells#size-cellsmodelcompatibledevice_typeregenable-method#cooling-cellspower-domainspower-domain-namesi-cache-sizei-cache-line-sizei-cache-setsd-cache-sized-cache-line-sized-cache-setsnext-level-cachephandlecache-levelcache-unifiedcpu#clock-cellsclock-frequencyclock-output-namesrangesmboxesshmem#power-domain-cells#thermal-sensor-cellsfsl,pinsinterruptspolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresistripcooling-devicearm,no-tick-in-suspend#interrupt-cellsinterrupt-controllerdma-noncoherentmsi-controller#msi-cellsclocks#mbox-cellsstatustimeout-secfsl,ext-reset-output#pwm-cellsclock-namespinctrl-namespinctrl-0gpio-controller#gpio-cellsassigned-clocksassigned-clock-parentsassigned-clock-ratesbus-widthfsl,tuning-start-tapfsl,tuning-steppinctrl-1pinctrl-2pinctrl-3non-removableno-sdiono-sdcd-gpiosvmmc-supplygpio-rangesinterrupt-names#iommu-cellsreg-nameslinux,pci-domainbus-rangenum-lanesnum-viewportinterrupt-map-maskinterrupt-mapfsl,max-link-speedreset-gpiovpcie-supplymmc0mmc1serial0stdout-pathalloc-rangeslinux,cma-defaultreusableregulator-nameregulator-min-microvoltregulator-max-microvoltenable-active-highvin-supplyoff-on-delay-us