8(h\ cudy,wr3000-v1mediatek,mt7981b +7Cudy WR3000 V1cpus+cpu@0arm,cortex-a53=AcpuMpscicpu@1arm,cortex-a53=AcpuMpscioscillator-40m fixed-clock[bZkclkxtal~psci arm,psci-1.0Tsmcsoc simple-bus+interrupt-controller@c000000 arm,gic-v3 =      clock-controller@10001000 mediatek,mt7981-infracfgsyscon=~clock-controller@1001b000 mediatek,mt7981-topckgensyscon=~watchdog@1001c000mediatek,mt7986-wdt= nclock-controller@1001e000mediatek,mt7981-apmixedsys=~pwm@10048000mediatek,mt7981-pwm=( topmainpwm1pwm2pwm3i2c@11007000mediatek,mt7981-i2c =p!p  34maindmaarbpmic+ disabledpinctrl@11d00000mediatek,mt7981-pinctrl=Igpioiocfg_rtiocfg_rmiocfg_rbiocfg_lbiocfg_bliocfg_tmiocfg_tleint  8#efuse@11f20000%mediatek,mt7981-efusemediatek,efuse=+clock-controller@15000000mediatek,mt7981-ethsyssyscon=~wifi@18000000mediatek,mt7981-wmac0=00_\ mcuap2conn/6consystimerarm,armv8-timer 0   memory@40000000=@Amemorykeys gpio-keyskey-wpsBWPS HNkey-resetBRESET HNleds gpio-ledsled-0Y_wan Hled-1Y _wlan-2ghz Hled-2Y _wlan-5ghz Hled-3Y_lan H led-4Y_status H led-5Y _wan-online H  compatibleinterrupt-parent#address-cells#size-cellsmodelregdevice_typeenable-methodclock-frequencyclock-output-names#clock-cellsrangesinterruptsinterrupt-controller#interrupt-cellsphandle#reset-cellsclocksclock-names#pwm-cellsstatusreg-namesgpio-rangesgpio-controller#gpio-cellsresetsreset-nameslabelgpioslinux,codecolorfunction