8( google,tentacruel-sku262147google,tentacruel-sku262146google,tentacruel-sku262145google,tentacruel-sku262144google,tentacruelmediatek,mt8186 +7Google Tentacruel board =convertiblealiasesJ/soc/ovl@14005000O/soc/ovl@14006000W/soc/rdma@14007000]/soc/rdma@1401f000c/soc/i2c@11007000h/soc/i2c@11008000m/soc/i2c@11009000r/soc/i2c@1100f000w/soc/i2c@11016000|/soc/mmc@11230000/soc/mmc@11240000/soc/serial@11002000/soc/i2c@11011000ccimediatek,mt8186-ccicciintermediate"opp-table-ccioperating-points-v2opp-500000000e 'opp-560000000!` Lopp-612000000$za opp-682000000(~  opp-752000000,Ҝ YF opp-8220000000  opp-8750000004'p  opp-9270000007@ 5 opp-980000000:i ~>opp-1050000000> opp-1120000000B )$opp-1155000000D opp-1190000000F opp-1260000000K~opp-1330000000OF0)opp-1400000000SrNRopp-table-cluster0operating-points-v2opp-500000000e 'opp-774000000."M Lopp-8750000004'p `opp-975000000:Q  opp-1075000000@2 q opp-1175000000F  X opp-1275000000K 5 opp-1375000000Q  opp-1500000000Yh/ opp-1618000000`p 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mipi_tx0_pllokay{clock-controller@13000000mediatek,mt8186-mfgsys qrgpu@13040000&mediatek,mt8186-maliarm,mali-bifrost @r0 jobmmugpu BB #core0core1 6s Bspeed-bint.Ookay S0syscon@14000000mediatek,mt8186-mmsyssyscon q3uu _u1mutex@14001000mediatek,mt8186-disp-mutex 1' _u w Bsmi@14002000mediatek,mt8186-smi-common   1111apbsmigals0gals1 Bvsmi@14003000mediatek,mt8186-smi-larb 011apbsmi  v B}smi@14004000mediatek,mt8186-smi-larb @11apbsmi  v B~ovl@140050002mediatek,mt8186-disp-ovlmediatek,mt8192-disp-ovl P1) w _uP Bovl@140060008mediatek,mt8186-disp-ovl-2lmediatek,mt8192-disp-ovl-2l `1* w! _u` Brdma@140070004mediatek,mt8186-disp-rdmamediatek,mt8183-disp-rdma p1+ w" _up Bcolor@140090006mediatek,mt8186-disp-colormediatek,mt8173-disp-color 1 - _u Bdpi@1400a000mediatek,mt8186-dpi -;1 pixelenginepllv-;-j5 disableddefaultsleepx yportendpointrzYccorr@1400b0006mediatek,mt8186-disp-ccorrmediatek,mt8192-disp-ccorr 1. _u Baal@1400c0002mediatek,mt8186-disp-aalmediatek,mt8183-disp-aal 10 _u Bgamma@1400d0006mediatek,mt8186-disp-gammamediatek,mt8183-disp-gamma 1 1 _u Bpostmask@1400e000<mediatek,mt8186-disp-postmaskmediatek,mt8192-disp-postmask 1 2 _u Bdither@1400f0008mediatek,mt8186-disp-dithermediatek,mt8183-disp-dither 13 _u Bdsi@14013000mediatek,mt8186-dsi 011{enginedigitalhs7 B 1 { dphyokayportendpointr|Kiommu@14016000mediatek,mt8186-iommu-mm `1bclk98 }~ B wrdma@1401f0004mediatek,mt8186-disp-rdmamediatek,mt8183-disp-rdma 14 w  _u Bclock-controller@14020000mediatek,mt8186-wpesys q7smi@14023000mediatek,mt8186-smi-larb 077apbsmi  v Bclock-controller@15020000mediatek,mt8186-imgsys1 q4smi@1502e000mediatek,mt8186-smi-larb 44apbsmi  v Bclock-controller@15820000mediatek,mt8186-imgsys2 qsmi@1582e000mediatek,mt8186-smi-larb 4apbsmi  v Bvideo-decoder@16000000mediatek,mt8186-vcodec-dec +@ w video-codec@16025000mediatek,mtk-vcodec-core PW` wwwwwwwwwwww -)22-U%vdec-selvdec-soc-vdecvdecvdec-topv-)-U Bsmi@1602e000mediatek,mt8186-smi-larb 22apbsmi  v Bclock-controller@1602f000mediatek,mt8186-vdecsys q2clock-controller@17000000mediatek,mt8186-vencsys q6smi@17010000mediatek,mt8186-smi-larb 66apbsmi  v B video-encoder@170200006mediatek,mt8186-vcodec-encmediatek,mt8183-vcodec-enc  H wwwwwwwww6 venc_selv-$-U B  jpeg-encoder@17030000+mediatek,mt8186-jpgencmediatek,mtk-jpgenc 6jpgenc wwww B clock-controller@1a000000mediatek,mt8186-camsys q3smi@1a001000mediatek,mt8186-smi-larb 33apbsmi  v B smi@1a002000mediatek,mt8186-smi-larb  33apbsmi  v B smi@1a00f000mediatek,mt8186-smi-larb 3apbsmi  v B smi@1a010000mediatek,mt8186-smi-larb 3apbsmi  v B clock-controller@1a04f000mediatek,mt8186-camsys_rawa qclock-controller@1a06f000mediatek,mt8186-camsys_rawb qclock-controller@1b000000mediatek,mt8186-mdpsys qsmi@1b002000mediatek,mt8186-smi-larb  apbsmi  v Bclock-controller@1c000000mediatek,mt8186-ipesys q5smi@1c00f000mediatek,mt8186-smi-larb 55apbsmi  v B smi@1c10f000mediatek,mt8186-smi-larb 55apbsmi  v B chosen serial0:115200n8memory@40000000memory @backlight-lcd0pwm-backlight   ,   *@Nbt-sco linux,bt-scodmic-codec dmic-codec C P2gpio-keys gpio-keysdefaultpen-insert-switch Pen Insert F, ` t regulator-pp1800-dpbrdg-dxregulator-fixeddefault F,'pp1800_dpbrdg_dx  \Xregulator-pp3300-disp-xregulator-fixeddefault F,pp3300_disp_x   ^Mregulator-pp3300-ldo-z5regulator-fixedpp3300_ldo_z5. 2Z2Z regulator-pp3300-s3regulator-fixed pp3300_s3.  ^Rregulator-pp3300-z2regulator-fixed pp3300_z2. 2Z2Z ^regulator-pp4200-z2regulator-fixed pp4200_z2. @@@@ 9regulator-pp5000-z2regulator-fixed pp5000_z2. LK@LK@ regulator-ppvar-sysregulator-fixed ppvar_sys. reserved-memory+memory@61000000shared-dma-pool a Cmemory@60000000shared-dma-pool ` Dmemory@50000000shared-dma-pool P  ?sound,mediatek,mt8186-mt6366-rt1019-rt5682s-soundCaud_clk_mosi_offaud_clk_mosi_onaud_clk_miso_offaud_clk_miso_onaud_dat_miso_offaud_dat_miso_onaud_dat_mosi_offaud_dat_mosi_onaud_gpio_i2s0_offaud_gpio_i2s0_onaud_gpio_i2s1_offaud_gpio_i2s1_onaud_gpio_i2s2_offaud_gpio_i2s2_onaud_gpio_i2s3_offaud_gpio_i2s3_onaud_gpio_pcm_offaud_gpio_pcm_onaud_gpio_dmic_sec            # . 9 D O Z e p ~I HeadphoneHPOLHeadphoneHPORIN1PHeadset MicSpeakersSpeakerHDMI1TXhs-playback-dai-link I2S0 i2s cpucodec hs-capture-dai-link I2S1 i2s cpucodec spk-share-dai-link I2S2 cpuspk-hdmi-playback-dai-link I2S3 i2s cpucodec speaker-codecrealtek,rt1019pdefault ,regulator-usb-p1-vbusregulator-fixed ,vbus1LK@LK@  qwifi-pwrseqmmc-pwrseq-simpledefault2 L,6mwifi-wakeup gpio-keysdefaultwowlan-event Wake on WiFi F, t compatibleinterrupt-parent#address-cells#size-cellsmodelchassis-typeovl0ovl-2l0rdma0rdma1i2c0i2c1i2c2i2c3i2c5mmc0mmc1serial0i2c4clocksclock-namesoperating-points-v2proc-supplyphandleopp-sharedopp-hzopp-microvoltrequired-oppscpudevice_typeregenable-methodclock-frequencydynamic-power-coefficientcapacity-dmips-mhzcpu-idle-statesi-cache-sizei-cache-line-sizei-cache-setsd-cache-sized-cache-line-sized-cache-setsnext-level-cache#cooling-cellsmediatek,ccientry-methodarm,psci-suspend-paramlocal-timer-stopentry-latency-usexit-latency-usmin-residency-uscache-levelcache-unified#clock-cellsclock-divclock-multclock-output-namesopp-supported-hwinterruptsdma-ranges#interrupt-cells#redistributor-regionsinterrupt-controllermediatek,broken-save-restore-fwaffinity#reset-cellsreg-namesgpio-controller#gpio-cellsgpio-rangesgpio-line-namespinmuxinput-enablebias-pull-downinput-schmitt-enablebias-disableoutput-lowdrive-strengthoutput-highbias-pull-up#power-domain-cellsdomain-supplymediatek,infracfgmediatek,disable-extrstmediatek,reset-by-toprguinterrupts-extendedAvdd-supplymediatek,dmic-modevsys-ldo1-supplyvsys-ldo2-supplyvsys-ldo3-supplyvsys-vcore-supplyvsys-vdram1-supplyvsys-vgpu-supplyvsys-vmodem-supplyvsys-vpa-supplyvsys-vproc11-supplyvsys-vproc12-supplyvsys-vs1-supplyvsys-vs2-supplyvs1-ldo1-supplyvs2-ldo1-supplyvs2-ldo2-supplyvs2-ldo3-supplyregulator-nameregulator-min-microvoltregulator-max-microvoltregulator-ramp-delayregulator-enable-ramp-delayregulator-allowed-modesregulator-always-onregulator-coupled-withregulator-coupled-max-spreadassigned-clocksassigned-clock-parentsstatus#mbox-cellspinctrl-namespinctrl-0firmware-namememory-regionmediatek,rpmsg-namembox-namesmboxespower-domainsspi-max-frequency#io-channel-cellspowerdown-gpiosreset-gpiosvdd12-supplyvdd33-supplyremote-endpointpower-supplybacklighti2c-scl-internal-delay-nspost-power-on-delay-mshid-descr-addrvcc-supplywakeup-source#sound-dai-cellsovdd-supplypwr18-supplylink-frequenciessvdd-supplyAVDD-supplyDBVDD-supplyLDO1-IN-supplyMICVDD-supplyrealtek,jd-src#pwm-cellsmediatek,pad-selectgoogle,remote-bussbs,i2c-retry-countsbs,poll-retry-countlabelpower-roledata-roletry-power-rolekeypad,num-rowskeypad,num-columnsgoogle,needs-ghost-filterlinux,keymapfunction-row-physmapcs-gpiosmediatek,apmixedsysmediatek,topckgenresetsreset-namesphysmediatek,syscon-wakeupvbus-supplypinctrl-1bus-widthnon-removablecap-mmc-highspeedmmc-hs200-1_8vmmc-hs400-1_8vsupports-cqeno-sdno-sdiocap-mmc-hw-reseths400-ds-delaymediatek,hs400-ds-dly3vmmc-supplyvqmmc-supplypinctrl-2interrupt-namescap-sd-highspeedsd-uhs-sdr104sd-uhs-sdr50keep-power-in-suspendcap-sdio-irqno-mmcmmc-pwrseq#phy-cellsmediatek,discthbitspower-domain-namesnvmem-cellsnvmem-cell-namesmali-supplymediatek,gce-client-regmediatek,gce-eventsmediatek,larb-idmediatek,smiiommusphy-namesmediatek,larbs#iommu-cellsmediatek,scpstdout-pathpwmsenable-gpiosbrightness-levelsnum-interpolated-stepsdefault-brightness-levelnum-channelswakeup-delay-mswakeup-event-actionlinux,codelinux,input-typeenable-active-highvin-supplyregulator-boot-onno-mappinctrl-3pinctrl-4pinctrl-5pinctrl-6pinctrl-7pinctrl-8pinctrl-9pinctrl-10pinctrl-11pinctrl-12pinctrl-13pinctrl-14pinctrl-15pinctrl-16pinctrl-17pinctrl-18mediatek,adspmediatek,platformaudio-routinglink-namedai-formatmediatek,clk-providersound-daisdb-gpiosgpio