!D8(X$mediatek,mt8195-evbmediatek,mt8195 +!7MediaTek MT8195 evaluation boardaliases=/soc/dp-intf@1c015000F/soc/dp-intf@1c113000O/soc/mailbox@10320000T/soc/mailbox@10330000Y/soc/hdr-engine@1c114000`/soc/mutex@1c016000g/soc/mutex@1c101000n/soc/vpp-merge@1c10c000u/soc/vpp-merge@1c10d000|/soc/vpp-merge@1c10e000/soc/vpp-merge@1c10f000/soc/vpp-merge@1c110000/soc/dma-controller@1c104000/soc/dma-controller@1c105000/soc/dma-controller@1c106000/soc/dma-controller@1c107000/soc/dma-controller@1c108000/soc/dma-controller@1c109000/soc/dma-controller@1c10a000/soc/dma-controller@1c10b000/soc/serial@11001100cpus+cpu@0cpuarm,cortex-a55psci#ec3@34FVc@u@ cpu@100cpuarm,cortex-a55psci#ec3@34FVc@u@ cpu@200cpuarm,cortex-a55psci#ec3@34FVc@u@ cpu@300cpuarm,cortex-a55psci#ec3@34FVc@u@ cpu@400cpuarm,cortex-a78psci#f3FVc@u@ cpu@500cpuarm,cortex-a78psci#f3FVc@u@cpu@600cpuarm,cortex-a78psci#f3FVc@u@cpu@700cpuarm,cortex-a78psci#f3FVc@u@cpu-mapcluster0core0 core1 core2 core3 core4 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kdisabledzi2c@11d00000(mediatek,mt8195-i2cmediatek,mt8192-i2c "[A;  maindma+ kdisabledi2c@11d01000(mediatek,mt8195-i2cmediatek,mt8192-i2c "[A;  maindma+kokaydefaultB#i2c@11d02000(mediatek,mt8195-i2cmediatek,mt8192-i2c  "[A;  maindma+ kdisabledclock-controller@11d03000mediatek,mt8195-imp_iic_wrap_s0Ai2c@11e00000(mediatek,mt8195-i2cmediatek,mt8192-i2c "[C;  maindma+kokaydefaultD#i2c@11e01000(mediatek,mt8195-i2cmediatek,mt8192-i2c "[C;  maindma+kokaydefaultE#i2c@11e02000(mediatek,mt8195-i2cmediatek,mt8192-i2c  "[C;  maindma+ kdisabledi2c@11e03000(mediatek,mt8195-i2cmediatek,mt8192-i2c 0"[C;  maindma+ kdisabledi2c@11e04000(mediatek,mt8195-i2cmediatek,mt8192-i2c @"[C;  maindma+kokaydefaultF#clock-controller@11e05000mediatek,mt8195-imp_iic_wrap_wPCt-phy@11e30000.mediatek,mt8195-tphymediatek,generic-tphy-v3+*kokayusb-phy@0   refda_ref8usb-phy@700  refda_ref GHIintrrx_imptx_imp>t-phy@11e40000.mediatek,mt8195-tphymediatek,generic-tphy-v3+kokayusb-phy@0   refda_ref5usb-phy@700  refda_ref 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apbsmigals*Zsyscon@1c100000mediatek,mt8195-vdosys1syscon x9xo#smi@1c01b000mediatek,mt8195-smi-common-vdo %&)$ apbsmigals0gals1*hiommu@1c01f000mediatek,mt8195-iommu-vdo8{|}~[i' bclk*imutex@1c101000mediatek,mt8195-disp-mutex |vdo1_mutex[*#  vdo1_mutex9xQlarb@1c102000mediatek,mt8195-smi-larb wh###  apbsmigals*|larb@1c103000mediatek,mt8195-smi-larb0wX##   apbsmigals*[dma-controller@1c104000mediatek,mt8195-vdo1-rdma@[#*ei@9x@ldma-controller@1c105000mediatek,mt8195-vdo1-rdmaP[#*eW`9xPldma-controller@1c106000mediatek,mt8195-vdo1-rdma`[#*eiA9x`ldma-controller@1c107000mediatek,mt8195-vdo1-rdmap[#*eWa9xpldma-controller@1c108000mediatek,mt8195-vdo1-rdma[#*eiB9xldma-controller@1c109000mediatek,mt8195-vdo1-rdma[#*eWb9xldma-controller@1c10a000mediatek,mt8195-vdo1-rdma[#*eiC9xldma-controller@1c10b000mediatek,mt8195-vdo1-rdma[#*eWc9xlvpp-merge@1c10c000mediatek,mt8195-disp-merge[# # mergemerge_async*9x#vpp-merge@1c10d000mediatek,mt8195-disp-merge[# # mergemerge_async*9x#vpp-merge@1c10e000mediatek,mt8195-disp-merge[# # mergemerge_async*9x#vpp-merge@1c10f000mediatek,mt8195-disp-merge[# # mergemerge_async*9x#vpp-merge@1c110000mediatek,mt8195-disp-merge[# # mergemerge_async*9x#dp-intf@1c113000mediatek,mt8195-dp-intf0[*#/# pixelenginepll kdisabledhdr-engine@1c114000mediatek,mt8195-disp-ethdrp@Pp4|mixervdo_fe0vdo_fe1gfx_fe0gfx_fe1vdo_beadl_dsp9x@xPxpxxxxh#%# ###!#$#"#1#&#'#(#)#* mixervdo_fe0vdo_fe1gfx_fe0gfx_fe1vdo_beadl_dsvdo_fe0_asyncvdo_fe1_asyncgfx_fe0_asyncgfx_fe1_asyncvdo_be_asyncethdr_top*eWdWe[(#3#4#5#6#7Evdo_fe0_asyncvdo_fe1_asyncgfx_fe0_asyncgfx_fe1_asyncvdo_be_asyncedp-tx@1c500000mediatek,mt8195-edp-txPdp_calibration_data*[ kdisableddp-tx@1c600000mediatek,mt8195-dp-tx`dp_calibration_data*[ kdisabledthermal-zonescpu0-thermaltripstrip-alert!L-passivetrip-crit!- criticalcooling-mapsmap080= cpu1-thermaltripstrip-alert!L-passivetrip-crit!- criticalcooling-mapsmap080= cpu2-thermaltripstrip-alert!L-passivetrip-crit!- criticalcooling-mapsmap080= cpu3-thermaltripstrip-alert!L-passivetrip-crit!- criticalcooling-mapsmap080= cpu4-thermaltripstrip-alert!L-passivetrip-crit!- criticalcooling-mapsmap080= cpu5-thermaltripstrip-alert!L-passivetrip-crit!- criticalcooling-mapsmap080= cpu6-thermaltripstrip-alert!L-passivetrip-crit!- criticalcooling-mapsmap080= cpu7-thermaltripstrip-alert!L-passivetrip-crit!- criticalcooling-mapsmap080= vpu0-thermaltripstrip-alert!L-passivetrip-crit!- criticalvpu1-thermal tripstrip-alert!L-passivetrip-crit!- criticalgpu-thermal tripstrip-alert!L-passivetrip-crit!- criticalgpu1-thermal tripstrip-alert!L-passivetrip-crit!- criticalvdec-thermal tripstrip-alert!L-passivetrip-crit!- criticalimg-thermal tripstrip-alert!L-passivetrip-crit!- criticalinfra-thermaltripstrip-alert!L-passivetrip-crit!- criticalcam0-thermaltripstrip-alert!L-passivetrip-crit!- criticalcam1-thermaltripstrip-alert!L-passivetrip-crit!- criticalchosenLserial0:921600n8memory@40000000memory@ compatibleinterrupt-parent#address-cells#size-cellsmodeldp-intf0dp-intf1gce0gce1ethdr0mutex0mutex1merge1merge2merge3merge4merge5vdo1-rdma0vdo1-rdma1vdo1-rdma2vdo1-rdma3vdo1-rdma4vdo1-rdma5vdo1-rdma6vdo1-rdma7serial0device_typeregenable-methodperformance-domainsclock-frequencycapacity-dmips-mhzcpu-idle-statesi-cache-sizei-cache-line-sizei-cache-setsd-cache-sized-cache-line-sized-cache-setsnext-level-cache#cooling-cellsphandlecpuentry-methodarm,psci-suspend-paramlocal-timer-stopentry-latency-usexit-latency-usmin-residency-uscache-levelcache-unifiedinterruptscpusstatusnum-channelswakeup-delay-msmediatek,platform#clock-cellsclocksclock-divclock-multclock-output-names#performance-domain-cellsopp-sharedopp-hzopp-microvoltrangesdma-ranges#interrupt-cells#redistributor-regionsinterrupt-controlleraffinity#reset-cellsreg-namesgpio-controller#gpio-cellsgpio-rangespinmuxbias-pull-updrive-strengthdrive-strength-microampbias-pull-down#power-domain-cellsclock-namesmediatek,infracfgmediatek,disable-extrstassigned-clocksassigned-clock-parents#iommu-cells#mbox-cellspower-domainsmbox-namesmboxesmediatek,topckgenresetsreset-namespinctrl-namespinctrl-0#io-channel-cellsnvmem-cellsnvmem-cell-names#thermal-sensor-cells#pwm-cellsinterrupt-namesmediatek,pericfgsnps,axi-configsnps,mtl-rx-configsnps,mtl-tx-configsnps,txpblsnps,rxpblsnps,clk-csrsnps,wr_osr_lmtsnps,rd_osr_lmtsnps,blensnps,rx-queues-to-usesnps,rx-sched-spsnps,dcb-algorithmsnps,map-to-dma-channelsnps,tx-queues-to-usesnps,tx-sched-wrrsnps,weightsnps,priorityphyswakeup-sourcemediatek,syscon-wakeupusb2-lpm-disablebus-rangeiommu-mapiommu-map-maskphy-namesinterrupt-map-maskinterrupt-mapspi-max-frequencybits#phy-cellsoperating-points-v2power-domain-namesmediatek,gce-client-regmediatek,gce-eventsiommus#dma-cellsmediatek,smimediatek,larb-idmediatek,larbsmediatek,scpmediatek,merge-mutemediatek,merge-fifo-enmax-linkrate-mhzpolling-delaypolling-delay-passivethermal-sensorstemperaturehysteresistripcooling-devicestdout-path