b8[ (Z  ,Xiaomi Mi 4C2xiaomi,libraqcom,msm8992=handsetJV  c aliasesq/soc@0/mmc@f9824900v/soc@0/mmc@f98a4900chosen%{earlycon=tty0 console=tty0 maxcpus=1 framebuffer@34000002simple-framebuffer@^8 r8g8b88jnclocksxo-board 2fixed-clock$ xo_boardsleep-clk 2fixed-clock sleep_clkcpus cpu@0cpu2arm,cortex-a53pscil2-cache2cache".cpu@1cpu2arm,cortex-a53pscicpu@2cpu2arm,cortex-a53pscicpu@3cpu2arm,cortex-a53pscicpu@100cpu2arm,cortex-a57psci l2-cache2cache".cpu@101cpu2arm,cortex-a57psci cpu-mapcluster0core0<core1<core2<core3<cluster1core0< core1< firmwarescm2qcom,scm-msm8994qcom,scmmemory@80000000memorypmu2arm,cortex-a53-pmu @psci 2arm,psci-0.2 hvcremoteproc$2qcom,msm8994-rpm-procqcom,rpm-procsmd-edge @K R`rpm-requests2qcom,rpm-msm8994 prpm_requestsclock-controller2qcom,rpmcc-msm8992qcom,rpmccEpower-controller2qcom,msm8994-rpmpd opp-table2operating-points-v2 opp1opp2opp3opp4opp5opp6regulators-02qcom,rpm-pm8994-regulators  3Jbts3  s4w@w@s5 p ps7B@B@ l1B@B@l2l3OOl4((l6w@w@l8w@w@l9w@w@l10w@w@l11OOl12w@w@l13w@-pl14w@w@l15w@w@l16)2)2l17)2)2l18+|+|l19**l20-p-p, l21-p-pl22--l23**l24.0l25B@B@l26lll27l28B@B@l29**l30w@w@l31CCl32w@w@lvs1lvs2regulators-12qcom,rpm-pmi8994-regulators>Ls1boost-bypass06reserved-memory dfps-data@3400000@_memory@3401000@ _smem@6a00000 _memory@c6700000p_hole@6400000@`_hole2@6c00000@_mpss@9000000 _tzapp@ea00000_mdm-rfsa@ca0b0000 _rmtfs@ca1000002qcom,rmtfs-mem_fqseecom@cb400000@uadsp-rfsa@cd000000_sensor-rfsa@cd010000_ramoops@dfc000002ramoops|smem 2qcom,smemsmp2p-lpass 2qcom,smp2p @K `master-kernelmaster-kernelslave-kernel slave-kernel'smp2p-modem 2qcom,smp2p @K `master-kernelmaster-kernelslave-kernel slave-kernel'soc@0  2simple-businterrupt-controller@f90000002qcom,msm-qgic2' mailbox@f900d000%2qcom,msm8994-apcs-kpss-globalsyscon 8 watchdog@f9017000$2qcom,apss-wdt-msm8994qcom,kpss-wdtp@D timer@f9020000 2arm,armv7-timer-memframe@f9021000P@  frame@f9023000P @ 0 ]disabledframe@f9024000P @ @ ]disabledframe@f9025000P @ P ]disabledframe@f9026000P @ ` ]disabledframe@f9027000P @p ]disabledframe@f9028000P @ ]disabledusb@f92f88002qcom,msm8994-dwc3qcom,dwc3/  rmsdcoreifacesleepmock_utmipsr$'usb@f9200000 2snps,dwc3  @ high-speed peripheralmmc@f9824900%2qcom,msm8994-sdhciqcom,sdhci-msm-v4I@hccore@{hc_irqpwr_irqvhdifacecorexodefaultsleep!+5?]okayM\ hmmc@f98a4900%2qcom,msm8994-sdhciqcom,sdhci-msm-v4I@hccore@}hc_irqpwr_irqidifacecorexodefaultsleep !!"# +$%& u'd5 ]disableddma-controller@f99040002qcom,bam-v1.7.0@ @:dbam_clk~*serial@f991e000%2qcom,msm-uartdm-v1.4qcom,msm-uartdm @l dcoreifaceH:defaultsleep!(+) ]disabledi2c@f99230002qcom,i2c-qup-v2.2.10 @_;: dcoreiface* * txrxdefaultsleep!++,  ]disabledspi@f99230002qcom,spi-qup-v2.2.10 @_<: dcoreiface* * txrxdefaultsleep!-+.  ]disabledi2c@f99240002qcom,i2c-qup-v2.2.1@ @`=: dcoreiface**txrxdefaultsleep!/+0 ]okayi2c@f99260002qcom,i2c-qup-v2.2.1` @bA: dcoreiface**txrxdefaultsleep!1+2  ]disabledi2c@f99270002qcom,i2c-qup-v2.2.1p @cC: dcoreiface33txrxdefaultsleep!4+5 ]okayi2c@f99280002qcom,i2c-qup-v2.2.1 @dE: dcoreiface**txrxdefaultsleep!6+7 ]okaydma-controller@f99440002qcom,bam-v1.7.0@ @Mdbam_clk~3serial@f995e000%2qcom,msm-uartdm-v1.4qcom,msm-uartdm @r dcoreiface[M33txrxdefaultsleep!8+9]okayi2c@f99630002qcom,i2c-qup-v2.2.10 @eNM dcoreiface3 3 txrxdefaultsleep!:+; ]okayspi@f99660002qcom,spi-qup-v2.2.1` @hUM dcoreiface33txrxdefaultsleep!<+=  ]disabledi2c@f99670002qcom,i2c-qup-v2.2.1p @iVM dcoreifacej33txrxdefaultsleep!>+? ]okayclock-controller@fc4000002qcom,gcc-msm8992@  dxosleepsram@fc4280002qcom,rpm-msg-ramB@restart@fc4ab000 2qcom,psholdJspmi@fc4cf0002qcom,spmi-pmic-arbLLLcoreintrcnfg periph_irq @ 'pmic@02qcom,pm8994qcom,spmi-pmic rtc@60002qcom,pm8941-rtc`a rtcalarm@apon@8002qcom,pm8916-ponpwrkey2qcom,pm8941-pwrkey@ = !tresin2qcom,pm8941-resin@ =  ]disabledtemp-alarm@24002qcom,spmi-temp-alarm$@$,@8thermalIFadc@31002qcom,spmi-vadc1@1 _@channel@7qvph_pwrchannel@8 die_tempchannel@9  ref_625mvchannel@a  ref_1250mvchannel@echannel@fgpio@c000 2qcom,pm8994-gpioqcom,spmi-gpioA'Ampps@a0002qcom,pm8994-mppqcom,spmi-mppB'Bpmic@12qcom,pm8994qcom,spmi-pmic pwm2qcom,pm8994-lpg  ]disabledregulators2qcom,pm8994-regulatorss8 `@`,s11 `(,pmic@22qcom,pmi8994qcom,spmi-pmic gpio@c000!2qcom,pmi8994-gpioqcom,spmi-gpioC 'Cmpps@a0002qcom,pmi8994-mppqcom,spmi-mppD'Dpmic@32qcom,pmi8994qcom,spmi-pmic pwm2qcom,pmi8994-lpg  ]disabledregulators2qcom,pmi8994-regulatorswled@d8002qcom,pmi8994-wled @ ovpshort ]disabledhwlock@fd484000(2qcom,msm8994-tcsr-mutexqcom,tcsr-mutexH@pinctrl@fd5100002qcom,msm8992-pinctrlQ@ @'''blsp1-uart2-default-state gpio4gpio5 blsp_uart2(blsp1-uart2-sleep-state gpio4gpio5gpio)blsp2-uart2-default-stategpio45gpio46gpio47gpio48 blsp_uart88blsp2-uart2-sleep-stategpio45gpio46gpio47gpio48gpio9i2c1-default-state gpio2gpio3 blsp_i2c1+i2c1-sleep-state gpio2gpio3gpio,i2c2-default-state gpio6gpio7 blsp_i2c2/i2c2-sleep-state gpio6gpio7gpio0i2c4-default-stategpio19gpio20 blsp_i2c41i2c4-sleep-stategpio19gpio20gpio2i2c5-default-stategpio23gpio24 blsp_i2c54i2c5-sleep-stategpio23gpio24gpio5i2c6-default-stategpio28gpio27 blsp_i2c66i2c6-sleep-stategpio28gpio27gpio7i2c7-default-stategpio44gpio43 blsp_i2c7:i2c7-sleep-stategpio44gpio43gpio;blsp2-spi10-default-state<default-pinsgpio53gpio54gpio55 blsp_spi10 cs-pinsgpio67gpioblsp2-spi10-sleep-stategpio53gpio54gpio55gpio=i2c11-default-stategpio83gpio84 blsp_i2c11>i2c11-sleep-stategpio83gpio84gpio?blsp1-spi1-default-state-default-pinsgpio0gpio1gpio3 blsp_spi1 cs-pinsgpio8gpioblsp1-spi1-sleep-stategpio0gpio1gpio3gpio.clk-on-state sdc1_clkclk-off-state sdc1_clkcmd-on-state sdc1_cmdcmd-off-state sdc1_cmddata-on-state sdc1_datadata-off-state sdc1_datarclk-on-state sdc1_rclkrclk-off-state sdc1_rclksdc2-clk-on-state sdc2_clk !sdc2-clk-off-state sdc2_clk$sdc2-cmd-on-state sdc2_cmd "sdc2-cmd-off-state sdc2_cmd%sdc2-data-on-state sdc2_data #sdc2-data-off-state sdc2_data&clock-controller@fd8c00002qcom,mmcc-msm8992RYdxogpll0mmssnoc_ahboxili_gfx3d_clk_srcdsi0plldsi0pllbytedsi1plldsi1pllbytehdmipll0EE (p /0)<98p/sram@fdd000002qcom,msm8974-ocmem  ctrlmem E"r dcoreiface gmu-sram@0timer2arm,armv8-timer0@vph-pwr-regulator2regulator-fixedvph_pwr66thermal-zonespm8994-thermal.DFtripspm8994-alert0Ts`Epassivepm8994-critTH` Ecriticalgpio-keys 2gpio-keyskbutton Volume Up xAv!s interrupt-parent#address-cells#size-cellsmodelcompatiblechassis-typeqcom,msm-idqcom,pmic-idqcom,board-idmmc1mmc2bootargsrangesregwidthheightstrideformatclockspower-domains#clock-cellsclock-frequencyclock-output-namesphandledevice_typeenable-methodnext-level-cachecache-levelcache-unifiedcpuinterruptsmboxesqcom,smd-edgeqcom,remote-pidqcom,smd-channels#power-domain-cellsoperating-points-v2opp-levelvdd_l1-supplyvdd_l2_26_28-supplyvdd_l3_11-supplyvdd_l4_27_31-supplyvdd_l5_7-supplyvdd_l6_12_32-supplyvdd_l8_16_30-supplyvdd_l9_10_18_22-supplyvdd_l13_19_23_24-supplyvdd_l14_15-supplyvdd_l17_29-supplyvdd_l20_21-supplyvdd_l25-supplyvdd_lvs1_2-supplyregulator-min-microvoltregulator-max-microvoltregulator-allow-set-loadregulator-always-onregulator-system-loadregulator-boot-onvdd_s1-supplyvdd_bst_byp-supplyno-mapqcom,client-idno-memconsole-sizerecord-sizeftrace-sizepmsg-sizememory-regionqcom,rpm-msg-ramhwlocksqcom,smemqcom,local-pidqcom,entry-name#qcom,smem-state-cellsinterrupt-controller#interrupt-cells#mbox-cellstimeout-secframe-numberstatusclock-namesassigned-clocksassigned-clock-ratesqcom,select-utmi-as-pipe-clksnps,dis_u2_susphy_quirksnps,dis_enblslpm_quirkmaximum-speeddr_modereg-namesinterrupt-namespinctrl-namespinctrl-0pinctrl-1bus-widthnon-removablemmc-hs400-1_8vvmmc-supplyvqmmc-supplycd-gpios#dma-cellsqcom,eeqcom,controlled-remotelynum-channelsqcom,num-eesdmasdma-names#reset-cellsqcom,channelmode-bootloadermode-recoverydebouncebias-pull-uplinux,codeio-channelsio-channel-names#thermal-sensor-cells#io-channel-cellsqcom,pre-scalinglabelgpio-controllergpio-ranges#gpio-cells#pwm-cellsqcom,cabcqcom,external-pfet#hwlock-cellspinsfunctiondrive-strengthbias-disablebias-pull-downregulator-namepolling-delay-passivethermal-sensorstemperaturehysteresisautorepeatlinux,input-typewakeup-sourcedebounce-interval