8<( $,+8Qualcomm Technologies, Inc. MSM8998 v1 MTP>qcom,msm8998-mtpqcom,msm8998IhandsetVchosendserial0:115200n8memory@80000000pmemory|reserved-memory,memory@85800000|`memory@85e00000|smem-mem@86000000| memory@86200000| memory@88f00000>qcom,rmtfs-mem| memory@8ab00000|pmemory@8b200000| memory@8cc00000|3memory@93c00000|Pmemory@94100000| 2memory@94300000|0:memory@95200000| memory@95210000|!Pmemory@95600000|`memory@95700000|pmpss-metadata @4clocksxo-board >fixed-clock$ xo_boardsleep-clk >fixed-clock#cpus,cpu@0pcpu >qcom,kryo280|psci"l2-cache>cache3?cpu@1pcpu >qcom,kryo280|psci" cpu@2pcpu >qcom,kryo280|psci" cpu@3pcpu >qcom,kryo280|psci" cpu@100pcpu >qcom,kryo280|psci" l2-cache>cache3?cpu@101pcpu >qcom,kryo280|psci" cpu@102pcpu >qcom,kryo280|psci"cpu@103pcpu >qcom,kryo280|psci"cpu-mapcluster0core0Mcore1M core2M core3M cluster1core0M core1M core2Mcore3Midle-statesQpscicpu-sleep-0-0>arm,idle-state^little-retentionnQVcpu-sleep-0-1>arm,idle-state^little-power-collapsen@.#cpu-sleep-1-0>arm,idle-state^big-retentionnORcpu-sleep-1-1>arm,idle-state^big-power-collapsen@$firmwarescm>qcom,scm-msm8998qcom,scmopp-table-dsi>operating-points-v2opp-131250000ҷPopp-210000000 Xopp-312500000_ psci >arm,psci-1.0smcremoteproc$>qcom,msm8998-rpm-procqcom,rpm-procglink-edge>qcom,glink-rpm rpm-requests>qcom,rpm-msm8998 rpm_requestsclock-controller>qcom,rpmcc-msm8998qcom,rpmccxo"power-controller>qcom,msm8998-rpmpd';1opp-table>operating-points-v2opp1Oopp2O opp3O0opp4O@opp5Oopp6Oopp7Oopp8O@opp9Oopp10Oregulators-0>qcom,rpm-pm8998-regulatorsYgu%:L]k s3@6@s4w@6w@Ns5 6 s7 6l1 m6 m(l2O6O)l3B@6B@l5 56 5l66l7w@6w@nl8O6Ol96-*l106-*l11B@6B@l12w@6w@el136-*hl146l15w@6w@l16)B6)Bl176ol18)B6)Bl19-6-l20-*6-*N+l21-*6-*g 5Ngl22+6+l23262l24/6/fl25/]62pl26O6ON,l28-6-lvs1w@6w@lvs2w@6w@9regulators-1>qcom,rpm-pmi8998-regulators}bob266smem >qcom,smemsmp2p-lpass >qcom,smp2p  master-kernelmaster-kernelslave-kernel slave-kernelsmp2p-mpss >qcom,smp2p master-kernelmaster-kernel/slave-kernel slave-kernel.smp2p-slpi >qcom,smp2p master-kernelmaster-kernel;slave-kernel slave-kernel8thermal-zonescpu0-thermal.tripstrip-point0>$JQpassivecpu-crit>J Qcriticalcpu1-thermal.tripstrip-point0>$JQpassivecpu-crit>J Qcriticalcpu2-thermal.tripstrip-point0>$JQpassivecpu-crit>J Qcriticalcpu3-thermal.tripstrip-point0>$JQpassivecpu-crit>J Qcriticalcpu4-thermal.tripstrip-point0>$JQpassivecpu-crit>J Qcriticalcpu5-thermal.tripstrip-point0>$JQpassivecpu-crit>J Qcriticalcpu6-thermal. tripstrip-point0>$JQpassivecpu-crit>J Qcriticalcpu7-thermal. tripstrip-point0>$JQpassivecpu-crit>J Qcriticalgpu-bottom-thermal. tripstrip-point0>_JQhotgpu-top-thermal. tripstrip-point0>_JQhotclust0-mhm-thermal.tripstrip-point0>_JQhotclust1-mhm-thermal.tripstrip-point0>_JQhotcluster1-l2-thermal. tripstrip-point0>_JQhotmodem-thermal. tripstrip-point0>_JQhotmem-thermal. tripstrip-point0>_JQhotwlan-thermal. tripstrip-point0>_JQhotq6-dsp-thermal. tripstrip-point0>_JQhotcamera-thermal. tripstrip-point0>_JQhotmultimedia-thermal. tripstrip-point0>_JQhotpm8998-thermal.!tripspm8998-alert0>(JQpassivepm8998-crit>HJ Qcriticaltimer>arm,armv8-timer0soc@0, >simple-busclock-controller@100000>qcom,gcc-msm8998U'|  xosleep_clk "# b%sram@778000>qcom,rpm-msg-ram|wpqfprom@784000 >qcom,msm8998-qfpromqcom,qfprom|x@b,hstx-trim@23a|:sdthermal@10ab000!>qcom,msm8998-tsensqcom,tsens-v2|  xuplowcriticalthermal@10ae000!>qcom,msm8998-tsensqcom,tsens-v2|  xuplowcritical iommu@1680000">qcom,msm8998-smmu-v2qcom,smmu-v2|hHlmnopq&iommu@16c0000">qcom,msm8998-smmu-v2qcom,smmu-v2|lxuvwxyzpcie@1c00000$>qcom,pcie-msm8998qcom,pcie-msm8996 |  parfdbielbiconfigppci,$pciephy okay0 00 msi$(%^%[%\%]%_"pipeauxcfgbus_masterbus_slave2%@& J'#pcie@0ppci|,phy@1c06000>qcom,msm8998-qmp-pcie-phy|` okay %`%\%%^auxcfg_ahbrefpipepcie_0_pipe_clk_srcVa%L%N hphycommont()$ufshc@1da4000,>qcom,msm8998-ufshcqcom,ufshcjedec,ufs-2.0|@%  *ufsphy2% okayUncore_clkbus_aggr_clkiface_clkcore_clk_uniproref_clktx_lane0_sync_clkrx_lane0_sync_clkrx_lane1_sync_clk@%m%%l%s"P%r%p%q@ <4`рa%hrst+,, q q-phy@1da7000>qcom,msm8998-qmp-ufs-phy|p"P%o%refref_auxqrefhufsphya-V okayt()*hwlock@1f40000>qcom,tcsr-mutex|syscon@1f60000>qcom,msm8998-tcsrsyscon|0syscon@1fc0000>qcom,msm8998-tcsrsyscon|`cpinctrl@3400000>qcom,msm8998-pinctrl|@ -'9IUQ'sdc2-on-stateiclk-pins jsdc2_clko~cmd-pins jsdc2_cmdo data-pins jsdc2_datao sdc2-off-statekclk-pins jsdc2_clko~cmd-pins jsdc2_cmdodata-pins jsdc2_dataosdc2-cd-statejgpio95gpioojblsp1-uart3-on-statemtx-pinsjgpio45 blsp_uart3_ao~rx-pinsjgpio46 blsp_uart3_aocts-pinsjgpio47 blsp_uart3_aorfr-pinsjgpio48 blsp_uart3_ao~blsp1-i2c1-default-state jgpio2gpio3 blsp_i2c1o~qblsp1-i2c1-sleep-state-state jgpio2gpio3 blsp_i2c1orblsp1-i2c2-default-statejgpio32gpio33 blsp_i2c2o~sblsp1-i2c2-sleep-state-statejgpio32gpio33 blsp_i2c2otblsp1-i2c3-default-statejgpio47gpio48 blsp_i2c3o~ublsp1-i2c3-sleep-statejgpio47gpio48 blsp_i2c3ovblsp1-i2c4-default-statejgpio10gpio11 blsp_i2c4o~wblsp1-i2c4-sleep-statejgpio10gpio11 blsp_i2c4oxblsp1-i2c5-default-statejgpio87gpio88 blsp_i2c5o~yblsp1-i2c5-sleep-statejgpio87gpio88 blsp_i2c5ozblsp1-i2c6-default-statejgpio43gpio44 blsp_i2c6o~{blsp1-i2c6-sleep-statejgpio43gpio44 blsp_i2c6o|blsp1-spi-b-default-statejgpio23gpio28 blsp1_spi_bo~blsp1-spi1-default-statejgpio0gpio1gpio2gpio3 blsp_spi1o~}blsp1-spi2-default-statejgpio31gpio34gpio32gpio33 blsp_spi2o~~blsp1-spi3-default-statejgpio45gpio46gpio47gpio48 blsp_spi2o~blsp1-spi4-default-statejgpio8gpio9gpio10gpio11 blsp_spi4o~blsp1-spi5-default-statejgpio85gpio86gpio87gpio88 blsp_spi5o~blsp1-spi6-default-statejgpio41gpio42gpio43gpio44 blsp_spi6o~blsp2-i2c1-default-statejgpio55gpio56 blsp_i2c7o~blsp2-i2c1-sleep-statejgpio55gpio56 blsp_i2c7oblsp2-i2c2-default-state jgpio6gpio7 blsp_i2c8o~blsp2-i2c2-sleep-state jgpio6gpio7 blsp_i2c8oblsp2-i2c3-default-statejgpio51gpio52 blsp_i2c9o~blsp2-i2c3-sleep-statejgpio51gpio52 blsp_i2c9oblsp2-i2c4-default-statejgpio67gpio68 blsp_i2c10o~blsp2-i2c4-sleep-statejgpio67gpio68 blsp_i2c10oblsp2-i2c5-default-statejgpio60gpio61 blsp_i2c11o~blsp2-i2c5-sleep-statejgpio60gpio61 blsp_i2c11oblsp2-i2c6-default-statejgpio83gpio84 blsp_i2c12o~blsp2-i2c6-sleep-statejgpio83gpio84 blsp_i2c12oblsp2-spi1-default-statejgpio53gpio54gpio55gpio56 blsp_spi7o~blsp2-spi2-default-statejgpio4gpio5gpio6gpio7 blsp_spi8o~blsp2-spi3-default-statejgpio49gpio50gpio51gpio52 blsp_spi9o~blsp2-spi4-default-statejgpio65gpio66gpio67gpio68 blsp_spi10o~blsp2-spi5-default-statejgpio58gpio59gpio60gpio61 blsp_spi11o~blsp2-spi6-default-statejgpio81gpio82gpio83gpio84 blsp_spi12o~remoteproc@4080000>qcom,msm8998-mss-pil|  qdsp6rmbL.....0wdogfatalreadyhandoverstop-ackshutdown-ack@%%$%%%%""2ifacebusmemgpll0_msssnoc_aximnoc_axiqdssxo/stopa%l hmss_restart00P@211cxmx okaymba2mpss3metadata4glink-edge  modemgpu@5000000>qcom,adreno-540.1qcom,adreno|kgsl_3d0_reg_memory0%M5%%K55)ifacerbbmtimermemmem_ifacerbcprcore ,6;721  disabledopp-table>operating-points-v27opp-710000097*QOopp-670000048'cO@opp-596000097#=aOopp-515000097G!Oopp-414000000#Oopp-342000000bO@opp-257000000Q@O0iommu@5040000">qcom,msm8998-smmu-v2qcom,smmu-v2|%M%%Kifacememmem_iface$IJK256clock-controller@5065000>qcom,msm8998-gpuccU'|P"% xogpll05remoteproc@5800000>qcom,msm8998-slpi-pas|@@@8888#wdogfatalreadyhandoverstop-ack+9"xo:;stop21ssc_cx okayglink-edge  dspsstm@6002000 >arm,coresight-stmarm,primecell| (stm-basestm-stimulus-base okay"" apb_pclkatclkout-portsportendpoint5<>funnel@6041000+>arm,coresight-dynamic-funnelarm,primecell| okay"" apb_pclkatclkout-portsportendpoint5=Bin-ports,port@7|endpoint5><funnel@6042000+>arm,coresight-dynamic-funnelarm,primecell|  okay"" apb_pclkatclkout-portsportendpoint5?Cin-ports,port@6|endpoint5@Vfunnel@6045000+>arm,coresight-dynamic-funnelarm,primecell|P okay"" apb_pclkatclkout-portsportendpoint5AGin-ports,port@0|endpoint5B=port@1|endpoint5C?replicator@6046000/>arm,coresight-dynamic-replicatorarm,primecell|` okay"" apb_pclkatclkout-portsportendpoint5DHin-portsportendpoint5EFetf@6047000 >arm,coresight-tmcarm,primecell|p okay"" apb_pclkatclkout-portsportendpoint5FEin-portsportendpoint5GAetr@6048000 >arm,coresight-tmcarm,primecell| okay"" apb_pclkatclkEin-portsportendpoint5HDetm@7840000">arm,coresight-etm4xarm,primecell| okay"" apb_pclkatclkMout-portsportendpoint5INetm@7940000">arm,coresight-etm4xarm,primecell| okay"" apb_pclkatclkM out-portsportendpoint5JOetm@7a40000">arm,coresight-etm4xarm,primecell| okay"" apb_pclkatclkM out-portsportendpoint5KPetm@7b40000">arm,coresight-etm4xarm,primecell| okay"" apb_pclkatclkM out-portsportendpoint5LQfunnel@7b60000">arm,coresight-etm4xarm,primecell|  disabled"" apb_pclkatclkout-portsportendpoint5MWin-ports,port@0|endpoint5NIport@1|endpoint5OJport@2|endpoint5PKport@3|endpoint5QLport@4|endpoint5RXport@5|endpoint5SYport@6|endpoint5TZport@7|endpoint5U[funnel@7b70000+>arm,coresight-dynamic-funnelarm,primecell|  disabled"" apb_pclkatclkout-portsportendpoint5V@in-portsportendpoint5WMetm@7c40000">arm,coresight-etm4xarm,primecell| okay"" apb_pclkatclkM out-portsportendpoint5XRetm@7d40000">arm,coresight-etm4xarm,primecell| okay"" apb_pclkatclkM out-portsportendpoint5YSetm@7e40000">arm,coresight-etm4xarm,primecell| okay"" apb_pclkatclkMout-portsportendpoint5ZTetm@7f40000">arm,coresight-etm4xarm,primecell| okay"" apb_pclkatclkMout-portsportendpoint5[Usram@290000>qcom,rpm-stats|)spmi@800f000>qcom,spmi-pmic-arb(|@ @ @"0corechnlsobsrvrintrcnfg periph_irq FX`,pmic@4>qcom,pm8005qcom,spmi-pmic|,gpio@c000 >qcom,pm8005-gpioqcom,spmi-gpio|9-\I\pmic@5>qcom,pm8005qcom,spmi-pmic|,regulators>qcom,pm8005-regulatorsYs16mpmic@0>qcom,pm8998qcom,spmi-pmic|,pon@800>qcom,pm8998-pon|pwrkey>qcom,pm8941-pwrkey= tresin>qcom,pm8941-resin=   disabledtemp-alarm@2400>qcom,spmi-temp-alarm|$$]thermal!charger@2800*>qcom,pm8998-coincellqcom,pm8941-coincell|(  disabledadc@3100>qcom,spmi-adc-rev2|11,]channel@6|  die_tempadc-tm@3400>qcom,spmi-adc-tm-hc|44,  disabledrtc@6000>qcom,pm8941-rtc|`a rtcalarmagpio@c000 >qcom,pm8998-gpioqcom,spmi-gpio|9-^I^pmic@1>qcom,pm8998qcom,spmi-pmic|,pmic@2>qcom,pmi8998qcom,spmi-pmic|,charger@1000>qcom,pmi8998-charger|@-usb-pluginbat-ovwdog-barkusbin-icl-change__usbin_iusbin_v  disabledgpio@c000!>qcom,pmi8998-gpioqcom,spmi-gpio|9-`I`adc@4500>qcom,pmi8998-rradc|E_pmic@3>qcom,pmi8998qcom,spmi-pmic|,labibb>qcom,pmi8998-lab-ibbibb  sc-errocplab  sc-errocppwm>qcom,pmi8998-lpg,  disabledled-controller@d300+>qcom,pmi8998-flash-ledqcom,spmi-flash-led|  disabledleds@d800>qcom,pmi8998-wled|  ovpshort  backlight  disabledusb@a8f8800>qcom,msm8998-dwc3qcom,dwc3|  okay,(%G%t% %v%u#cfg_noccoreifacesleepmock_utmi %u%t $'$[pwr_eventqusb2_physs_phy_irq2%a%usb@a800000 >snps,dwc3|   . G _abusb2-phyusb3-phy ~  hostphy@c010000>qcom,msm8998-qmp-usb3-phy|  %w%%y%xauxrefcfg_ahbpipeusb3_phy_pipe_clk_srcVa%E%F hphyphy_phy cD okayt()bphy@c012000>qcom,msm8998-qusb2-phy|   okayV%y% cfg_ahbrefa%j de fammc@c0a4900%>qcom,msm8998-sdhciqcom,sdhci-msm-v4| I @hccore}hc_irqpwr_irqifacecorexo%e%f"  okay '_ g h defaultsleep ij "kjdma-controller@c144000>qcom,bam-v1.7.0| @P %%bam_clk ,X 7 P ]lserial@c171000%>qcom,msm-uartdm-v1.4qcom,msm-uartdm|  m%5%% coreiface jll otxrx default m okaybluetooth>qcom,wcn3990-bt y n o p 0i2c@c175000>qcom,i2c-qup-v2.2.1| P _%&%% coreiface jll otxrx defaultsleep q "r  disabled,i2c@c176000>qcom,i2c-qup-v2.2.1| ` `%(%% coreiface jll  otxrx defaultsleep s "t  disabled,i2c@c177000>qcom,i2c-qup-v2.2.1| p a%*%% coreiface jl l  otxrx defaultsleep u "v  disabled,i2c@c178000>qcom,i2c-qup-v2.2.1|  b%,%% coreiface jl l  otxrx defaultsleep w "x  disabled,i2c@c179000>qcom,i2c-qup-v2.2.1|  c%.%% coreiface jll otxrx defaultsleep y "z  disabled,i2c@c17a000>qcom,i2c-qup-v2.2.1|  d%0%% coreiface jll otxrx defaultsleep { "|  disabled,spi@c175000>qcom,spi-qup-v2.2.1| P _%'%% coreiface jll otxrx default }  disabled,spi@c176000>qcom,spi-qup-v2.2.1| ` `%)%% coreiface jll  otxrx default ~  disabled,spi@c177000>qcom,spi-qup-v2.2.1| p a%+%% coreiface jl l  otxrx default   disabled,spi@c178000>qcom,spi-qup-v2.2.1|  b%-%% coreiface jl l  otxrx default   disabled,spi@c179000>qcom,spi-qup-v2.2.1|  c%/%% coreiface jll otxrx default   disabled,spi@c17a000>qcom,spi-qup-v2.2.1|  d%1%% coreiface jll otxrx default   disabled,dma-controller@c184000>qcom,bam-v1.7.0| @P %6bam_clk ,X 7 P ]serial@c1b0000%>qcom,msm-uartdm-v1.4qcom,msm-uartdm|  r%E%6 coreiface okayi2c@c1b5000>qcom,i2c-qup-v2.2.1| P e%7%6 coreiface j otxrx defaultsleep  "  disabled,i2c@c1b6000>qcom,i2c-qup-v2.2.1| ` f%9%6 coreiface j  otxrx defaultsleep  "  disabled,i2c@c1b7000>qcom,i2c-qup-v2.2.1| p g%;%6 coreiface j  otxrx defaultsleep  "  disabled,i2c@c1b8000>qcom,i2c-qup-v2.2.1|  h%=%6 coreiface j  otxrx defaultsleep  "  disabled,i2c@c1b9000>qcom,i2c-qup-v2.2.1|  i%?%6 coreiface j otxrx defaultsleep  "  disabled,i2c@c1ba000>qcom,i2c-qup-v2.2.1|  j%A%6 coreiface j otxrx defaultsleep  "  disabled,spi@c1b5000>qcom,spi-qup-v2.2.1| P e%8%6 coreiface j otxrx default   disabled,spi@c1b6000>qcom,spi-qup-v2.2.1| ` f%:%6 coreiface j  otxrx default   disabled,spi@c1b7000>qcom,spi-qup-v2.2.1| p g%<%6 coreiface j  otxrx default   disabled,spi@c1b8000>qcom,spi-qup-v2.2.1|  h%>%6 coreiface j  otxrx default   disabled,spi@c1b9000>qcom,spi-qup-v2.2.1|  i%@%6 coreiface j otxrx default   disabled,spi@c1ba000>qcom,spi-qup-v2.2.1|  j%B%6 coreiface j otxrx default   disabled,clock-controller@c8c0000>qcom,mmcc-msm8998U'| Jxogpll0dsi0dsidsi0bytedsi1dsidsi1bytehdmiplldplinkdpvcogpll0_divD"%%display-subsystem@c900000>qcom,msm8998-mdss| mdss S>@Cifacebuscore2,  disableddisplay-controller@c901000>qcom,msm8998-dpu |   @mdpregdmavbifvbif_nrt(>@CFifacebusmnoccorevsync F $;21opp-table>operating-points-v2opp-171430000 7popp-275000000d*opp-330000000fopp-412500000@ ports,port@0|endpoint5port@1|endpoint5dsi@c994000)>qcom,msm8998-dsi-ctrlqcom,mdss-dsi-ctrl| @ dsi_ctrl0HRAJ>@$bytebyte_intfpixelcoreifacebus / ;21dsi,  disabledports,port@0|endpoint5port@1|endpointphy@c994400>qcom,dsi-phy-10nm-8998| D F Jdsi_phydsi_phy_lanedsi_pll>" ifacerefV  disableddsi@c996000)>qcom,msm8998-dsi-ctrlqcom,mdss-dsi-ctrl| ` dsi_ctrl0ISBK>@$bytebyte_intfpixelcoreifacebus 0 ;21dsi,  disabledports,port@0|endpoint5port@1|endpointphy@c996400>qcom,dsi-phy-10nm-8998| d f jdsi_phydsi_phy_lanedsi_pll>" ifacerefV  disabledvideo-codec@cc00000>qcom,msm8998-venus|  2 89:;coreifacebusmbus     !()+,-1  disabledvideo-decoder>venus-decoder<core2video-encoder>venus-encoder=core2iommu@cd00000">qcom,msm8998-smmu-v2qcom,smmu-v2| iface-mmiface-smmubus-smmu   2 remoteproc@17300000>qcom,msm8998-adsp-pas|0@@@#wdogfatalreadyhandoverstop-ack"xostop21cx okayglink-edge  lpass mailbox@17911000<>qcom,msm8998-apcs-hmss-globalqcom,msm8994-apcs-kpss-global| timer@17920000,>arm,armv7-timer-mem|frame@17921000 | frame@17923000   |0  disabledframe@17924000   |@  disabledframe@17925000   |P  disabledframe@17926000   |`  disabledframe@17927000   |p  disabledframe@17928000  |  disabledinterrupt-controller@17a00000 >arm,gic-v3|,    wifi@18800000>qcom,wcn3990-wifi okay|membase"cxo_ref_clk_pin  2 N cn uo paliases /soc@0/serial@c1b0000 /soc@0/serial@c171000vph-pwr-regulator>regulator-fixed vph_pwr  interrupt-parentqcom,msm-id#address-cells#size-cellsmodelcompatiblechassis-typeqcom,board-idstdout-pathdevice_typeregrangesno-mapphandleqcom,client-idqcom,vmidalloc-rangessize#clock-cellsclock-frequencyclock-output-namesenable-methodcapacity-dmips-mhzcpu-idle-statesnext-level-cachecache-levelcache-unifiedcpuentry-methodidle-state-namearm,psci-suspend-paramentry-latency-usexit-latency-usmin-residency-uslocal-timer-stopopp-hzrequired-oppsinterruptsqcom,rpm-msg-rammboxesqcom,glink-channelsclocksclock-names#power-domain-cellsoperating-points-v2opp-levelvdd_s1-supplyvdd_s2-supplyvdd_s3-supplyvdd_s4-supplyvdd_s5-supplyvdd_s6-supplyvdd_s7-supplyvdd_s8-supplyvdd_s9-supplyvdd_s10-supplyvdd_s11-supplyvdd_s12-supplyvdd_s13-supplyvdd_l1_l27-supplyvdd_l2_l8_l17-supplyvdd_l3_l11-supplyvdd_l4_l5-supplyvdd_l6-supplyvdd_l7_l12_l14_l15-supplyvdd_l9-supplyvdd_l10_l23_l25-supplyvdd_l13_l19_l21-supplyvdd_l16_l28-supplyvdd_l18_l22-supplyvdd_l20_l24-supplyvdd_l26-supplyvdd_lvs1_lvs2-supplyregulator-min-microvoltregulator-max-microvoltregulator-allow-set-loadregulator-system-loadvdd_bob-supplymemory-regionhwlocksqcom,smemqcom,local-pidqcom,remote-pidqcom,entry-name#qcom,smem-state-cellsinterrupt-controller#interrupt-cellspolling-delay-passivethermal-sensorstemperaturehysteresis#reset-cellsprotected-clocksbits#qcom,sensorsinterrupt-names#thermal-sensor-cells#iommu-cells#global-interruptsreg-nameslinux,pci-domainbus-rangenum-lanesphysphy-namesstatusinterrupt-map-maskinterrupt-mappower-domainsiommu-mapperst-gpios#phy-cellsresetsreset-namesvdda-phy-supplyvdda-pll-supplylanes-per-directionfreq-table-hzvcc-supplyvccq-supplyvccq2-supplyvdd-hba-supplyvcc-max-microampvccq-max-microampvccq2-max-microamp#hwlock-cellsgpio-rangesgpio-controller#gpio-cellsgpio-reserved-rangespinsdrive-strengthbias-disablebias-pull-upfunctionbias-pull-downinterrupts-extendedqcom,smem-statesqcom,smem-state-namesqcom,halt-regspower-domain-nameslabeliommusopp-supported-hwpx-supplyremote-endpointarm,scatter-gatherqcom,eeqcom,channelregulator-enable-ramp-delayregulator-always-onmode-bootloadermode-recoverydebouncelinux,codeio-channelsio-channel-names#io-channel-cells#pwm-cellsassigned-clocksassigned-clock-ratessnps,dis_u2_susphy_quirksnps,dis_enblslpm_quirksnps,parkmode-disable-ss-quirksnps,has-lpm-erratumsnps,hird-thresholddr_modeqcom,tcsr-regnvmem-cellsvdda-phy-dpdm-supplybus-widthcd-gpiosvmmc-supplyvqmmc-supplypinctrl-namespinctrl-0pinctrl-1#dma-cellsqcom,controlled-remotelynum-channelsqcom,num-eesdmasdma-namesvddio-supplyvddxo-supplyvddrf-supplyvddch0-supplymax-speedassigned-clock-parents#mbox-cellsframe-number#redistributor-regionsredistributor-strideqcom,snoc-host-cap-8bit-quirkqcom,no-msa-ready-indicatorvdd-0.8-cx-mx-supplyvdd-1.8-xo-supplyvdd-1.3-rfa-supplyvdd-3.3-ch0-supplyserial0serial1regulator-nameregulator-boot-on